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* i965/nir: Enable NIR-vec4 pass on geometry shadersIago Toral Quiroga2015-08-032-1/+5
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Fix output swizzle in get_mul_for_srcSamuel Iglesias Gonsalvez2015-08-031-1/+12
| | | | | | | | | | | | | | | Avoid copying an overwritten swizzle, use the original values. Example: Former swizzle[] = xyzw src->swizzle[] = zyxx The expected output swizzle = zyxx but if we reuse swizzle in the loop, then output swizzle would be zyzz. Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Add implementation of nir_emit_texture()Alejandro Piñeiro2015-08-031-1/+194
| | | | | | | | Uses the nir structure to get all the info needed (sources, dest reg, etc), and then it uses the common vec4_visitor::emit_texture to emit the final code. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/ir/vec4: Refactor visit(ir_texture *ir)Alejandro Piñeiro2015-08-032-173/+209
| | | | | | | | Splitted in two. The emission is moved to a new vec4_visitor method, vec4_visitor::emit_texture, ir order to be reused on the nir path. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Add a new dst_reg constructor accepting a brw_reg_typeAlejandro Piñeiro2015-08-032-0/+13
| | | | | | | | | | | | | | | This is useful for the upcoming texture support in NIR->vec4 pass, as we found several cases where the brw_type is available, but not the glsl_type. Without this new constructor, the alternative would be: dst_reg reg(MRF, <reg>) reg.type = <brw_type> reg.writemask = <mask> Adding a new constructor makes code easier to read. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Change vec4_visitor::swizzle_result() method to allow reuseAlejandro Piñeiro2015-08-032-8/+15
| | | | | | | | This patch changes the signature of swizzle_result() to accept lower level arguments. The purpose is to reuse it in the upcoming NIR->vec4 pass. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Change vec4_visitor::gather_channel() method to allow reuseEduardo Lima Mitev2015-08-032-5/+6
| | | | | | | | This patch changes the signature of gather_channel() to accept the gather component directly instead of fetching it internally from ir_texture. This will allow reuse in the upcoming NIR->vec4 pass. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Change vec4_visitor::emit_mcs_fetch() method to allow reuseEduardo Lima Mitev2015-08-032-6/+8
| | | | | | | This patch changes the signature of emit_mcs_fetch() to accept lower level arguments. The purpose is to reuse it in the upcoming NIR->vec4 pass. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Move is_high_sample() method to vec4_visitor classEduardo Lima Mitev2015-08-032-3/+4
| | | | | | | | The is_high_sample() method is currently accessible only in the implementation of vec4_visitor. Since we need to reuse it in the upcoming NIR->vec4 pass, lets make it a method of the class instead. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir: Add new utility method brw_glsl_base_type_for_nir_type()Eduardo Lima Mitev2015-08-033-14/+25
| | | | | | | | This method returns the glsl_base_type corresponding to a nir_alu_type. It will factorize code currently present in fs_nir, that can be reused in vec4_nir on its upcoming emit_texture support. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement nir_emit_jumpEduardo Lima Mitev2015-08-031-1/+14
| | | | | | This implementation is taken as-is from fs_nir. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Mark as unreachable ops that should be already loweredAntia Puentes2015-08-031-0/+17
| | | | | | | | | | | | | | | | | | | | | | NIR ALU operations: * nir_op_fabs * nir_op_iabs * nir_op_fneg * nir_op_ineg * nir_op_fsat should be lowered by lower_source mods * nir_op_fdiv should be lowered in the compiler by DIV_TO_MUL_RCP. * nir_op_fmod should be lowered in the compiler by MOD_TO_FLOOR. * nir_op_fsub * nir_op_isub should be handled by ir_sub_to_add_neg. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement vector "any" operationAntia Puentes2015-08-031-0/+14
| | | | | | | | | Adds NIR ALU operations: * nir_op_bany2 * nir_op_bany3 * nir_op_bany4 Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement the dot product operationAntia Puentes2015-08-031-0/+15
| | | | | | | | | Adds NIR ALU operations: * nir_op_fdot2 * nir_op_fdot3 * nir_op_fdot4 Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement conditional selectAntia Puentes2015-08-031-0/+6
| | | | | | | Adds NIR ALU operations: * nir_op_bcsel Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement linear interpolationAntia Puentes2015-08-031-0/+5
| | | | | | | Adds NIR ALU operation: * nir_op_flrp Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Return the emitted instruction in emit_lrp()Antia Puentes2015-08-032-6/+6
| | | | | | | Needed in the NIR backend to set the "saturate" value of the instruction. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement floating-point fused multiply-addAntia Puentes2015-08-031-0/+9
| | | | | | | Adds NIR ALU operation: * nir_op_ffma Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement "shift" operationsAntia Puentes2015-08-031-0/+12
| | | | | | | | | Adds NIR ALU operations: * nir_op_ishl * nir_op_ishr * nir_op_ushr Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement the "sign" operationAntia Puentes2015-08-031-0/+33
| | | | | | | | | | | Follows the vec4_visitor IR implementation but sets the saturate value in addition. Adds NIR ALU operations: * nir_op_fsign * nir_op_isign Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement bit operationsAntia Puentes2015-08-031-0/+62
| | | | | | | | | | | | | | | | | | Same implementation than the IR case. Adds NIR ALU operations: * nir_op_bitfield_reverse * nir_op_bit_count * nir_op_ufind_msb * nir_op_ifind_msb * nir_op_find_lsb * nir_op_ubitfield_extract * nir_op_ibitfield_extract * nir_op_bfm * nir_op_bfi * nir_op_bitfield_insert Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement pack/unpack operationsAntia Puentes2015-08-031-0/+44
| | | | | | | | | | | | | | | | * Lowered floating-point pack and unpack operations are not valid in VS. * Pack and unpack 2x16 operations should be handled by lower_packing_builtins. * Adds NIR ALU operations: * nir_op_pack_half_2x16 * nir_op_unpack_half_2x16 * nir_op_unpack_unorm_4x8 * nir_op_unpack_snorm_4x8 * nir_op_pack_unorm_4x8 * nir_op_pack_snorm_4x8 Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: "noise" ops should already be loweredAntia Puentes2015-08-031-0/+18
| | | | | | Marked them as unreachable. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement "bool<->int,float" format conversionAntia Puentes2015-08-031-0/+19
| | | | | | | | | | | | Used the same implementation than the vec4_visitor NIR. Adds NIR ALU operations: * nir_op_b2i * nir_op_b2f * nir_op_f2b * nir_op_i2b Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement logical operatorsAntia Puentes2015-08-031-0/+16
| | | | | | | | | | Adds NIR ALU operations: * nir_op_inot * nir_op_ixor * nir_op_ior * nir_op_iand Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement non-equality ops on vectorsAntia Puentes2015-08-031-0/+34
| | | | | | | | | | | | Adds NIR ALU operations: * nir_op_bany_fnequal2 * nir_op_bany_inequal2 * nir_op_bany_fnequal3 * nir_op_bany_inequal3 * nir_op_bany_fnequal4 * nir_op_bany_inequal4 Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement equality ops on vectorsAntia Puentes2015-08-031-0/+33
| | | | | | | | | | | | Adds NIR ALU operations: * nir_op_ball_fequal2 * nir_op_ball_iequal2 * nir_op_ball_fequal3 * nir_op_ball_iequal3 * nir_op_ball_fequal4 * nir_op_ball_iequal4 Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement non-vector comparison opsAntia Puentes2015-08-031-0/+14
| | | | | | | | | | | | | | | | Adds NIR ALU operations: * nir_op_flt * nir_op_ilt * nir_op_ult * nir_op_fge * nir_op_ige * nir_op_uge * nir_op_feq * nir_op_ieq * nir_op_fne * nir_op_ine Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir: Add utility method for comparisonsAntia Puentes2015-08-031-0/+39
| | | | | | | | | This method returns the brw_conditional_mod value used when emitting comparative ALU operations. It could be moved to brw_nir in the future to reuse it in fs_nir backend. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Derivatives are not allowed in VSAntia Puentes2015-08-031-0/+8
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement min/max operationsAntia Puentes2015-08-031-0/+14
| | | | | | | | | | | | Adds NIR ALU operations: * nir_op_fmin * nir_op_imin * nir_op_umin * nir_op_fmax * nir_op_imax * nir_op_umax Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Return the emitted instruction in emit_minmax()Antia Puentes2015-08-032-3/+5
| | | | | | | Needed in the NIR backend to set the "saturate" value of the instruction. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement various rounding functionsAntia Puentes2015-08-031-0/+35
| | | | | | | | | | | Adds NIR ALU operations: * nir_op_ftrunc * nir_op_fceil * nir_op_ffloor * nir_op_ffrac * nir_op_fround_even Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement carry/borrow for addition/subtractionAntia Puentes2015-08-031-0/+16
| | | | | | | | Adds NIR ALU operations: * nir_op_uadd_carry * nir_op_usub_borrow Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement more math operationsAntia Puentes2015-08-031-0/+52
| | | | | | | | | | | | | | | | | | | | Adds NIR ALU operations: * nir_op_frcp * nir_op_fexp2 * nir_op_flog2 * nir_op_fexp * nir_op_flog * nir_op_fsin * nir_op_fcos * nir_op_idiv * nir_op_udiv * nir_op_umod * nir_op_ldexp * nir_op_fsqrt * nir_op_frsq * nir_op_fpow Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Return the last emitted instruction in emit_math()Antia Puentes2015-08-032-4/+7
| | | | | | | Needed in the NIR backend to set the "saturate" value of the instruction. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement multiplicationAntia Puentes2015-08-031-0/+44
| | | | | | | | | | | | | Implementation based on the vec4_visitor IR implementation for the operations ir_binop_mul and ir_binop_imul_high. Adds NIR ALU operations: * nir_op_fmul * nir_op_imul * nir_op_imul_high * nir_op_umul_high Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement the addition operationAntia Puentes2015-08-031-0/+7
| | | | | | | | Adds NIR ALU operations: * nir_op_fadd * nir_op_iadd Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement int<->float format conversion opsAntia Puentes2015-08-031-0/+11
| | | | | | | | | | Adds NIR ALU operations: * nir_op_f2i * nir_op_f2u * nir_op_i2f * nir_op_u2f Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Lower "vecN" instructions and mark them unreachableAntia Puentes2015-08-032-0/+10
| | | | | | This enables NIR pass "lower_vec_to_movs" on shaders that work on vec4. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement single-element "mov" operationsAntia Puentes2015-08-031-0/+13
| | | | | | | | Adds NIR ALU operations: * nir_op_imov * nir_op_fmov Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir: Disable alu_to_scalar pass on non-scalar shadersAlejandro Piñeiro2015-08-031-6/+10
| | | | | | | Disables nir_lower_alu_to_scalar when the shader stage being processed work on vec4 vectors, like the upcoming NIR->vec4 backend. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Prepare source and destination registers for ALU operationsAntia Puentes2015-08-031-1/+18
| | | | | | | This patch resolves and initializes the destination and the source registers that are common to most ALU operations. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement loading values from an UBOAntia Puentes2015-08-031-2/+59
| | | | | | | | | | | | | | | Based on the vec4_visitor IR implementation for the ir_binop_load_ubo operation. Notice that unlike the vec4_visitor IR, adding the !=0 comparison for UBO bools is not needed here because that comparison is already added by the nir_visitor when processing the ir_binop_load_ubo (in UBOs "true" is any value different from zero, but for us is ~0). Adds NIR instrinsics: * nir_intrinsic_load_ubo_indirect * nir_intrinsic_load_ubo Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement atomic counter intrinsics (read, inc and dec)Alejandro Piñeiro2015-08-031-2/+25
| | | | | | The implementation is based on its fs_nir counterpart. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement load_uniform intrinsicIago Toral Quiroga2015-08-031-2/+24
| | | | | | | | | For the indirect case we need to take the index delivered by NIR and compute the parent uniform that we are accessing (the one that we uploaded to a surface) and the constant offset into that surface. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement intrinsics that load system valuesAlejandro Piñeiro2015-08-031-6/+21
| | | | | | | | | | | | | These include: nir_intrinsic_load_vertex_id_zero_base nir_intrinsic_load_base_vertex nir_intrinsic_load_instance_id The source register is fetched from the nir_system_values map initialized during nir_setup_system_values stage. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement store_output intrinsicEduardo Lima Mitev2015-08-032-3/+19
| | | | | | | | | | | | | | This implementation is based on the current URB setup in vec4_visitor, which requires the output register to be stored in the output_reg array at variable's original shader location index. But since nir_lower_io() pass uses the value in var->data.driver_location, we need to put there var->data.location instead, prior to calling nir_lower_io(), so that we end up with the correct index in const_index[0]. The driver_location is not used at all, so this patch also disables the nir_assign_var_locations pass on non-scalar shaders. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Make sure that register types always match during emit_urb_slot()Eduardo Lima Mitev2015-08-031-5/+10
| | | | | | | | | | | | Instead of relying on backends (currently vec4_visitor and soon NIR-vec4) to store registers in output_reg with the correct type, this patch makes sure that the common code in emit_urb_slot() always emit MOVs from output registers using the same type on source and destination. Since the actual type is not important, only that they match, we default to float. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement load_input intrinsicEduardo Lima Mitev2015-08-031-2/+20
| | | | | | | The source register is fetched from the nir_inputs map built during nir_setup_inputs stage. Reviewed-by: Jason Ekstrand <[email protected]>
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