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* i965: Fix BRW_MEMZONE_LOW_4G heap size.Kenneth Graunke2019-05-071-1/+4
* intel/compiler: Unset flag reg when FB write is not predicatedMatt Turner2019-05-071-0/+1
* intel/disasm: Disassemble immediate value properly for dimSagar Ghuge2019-05-071-3/+12
* intel/disasm: Disassemble JIP offset for whileSagar Ghuge2019-05-071-1/+2
* intel/compiler: Replicate 16 bit immediate value correctlySagar Ghuge2019-05-072-0/+6
* intel/compiler: Print quad value in hex formatSagar Ghuge2019-05-071-1/+1
* intel/tools: Add unit tests for assemblerSagar Ghuge2019-05-07594-0/+28756
* intel/tools: Initialize offset correctly for i965_asmMika Kuoppala2019-05-071-10/+7
* intel/tools: Add meson pthread dependancy for i965_asmMika Kuoppala2019-05-071-0/+1
* intel/tools: New i965 instruction assembler toolSagar Ghuge2019-05-075-0/+3040
* iris: Also handle res->offset for buffer sampler/image viewsKenneth Graunke2019-05-071-8/+9
* iris: support dmabuf imports with offsetsMike Blumenkrantz2019-05-074-12/+12
* gallivm: fix broken 8-wide s3tc decodingRoland Scheidegger2019-05-071-17/+15
* lima: enable sin and cos lowering for GPVasily Khoruzhick2019-05-071-0/+1
* nir: implement lowering for fsin and fcosVasily Khoruzhick2019-05-074-0/+142
* freedreno/ir3: move const_state to ir3_shaderRob Clark2019-05-0710-30/+33
* freedreno/ir3: split out const_state setupRob Clark2019-05-073-52/+61
* freedreno/ir3: move immediates to const_stateRob Clark2019-05-075-30/+29
* freedreno/ir3: consolidate const stateRob Clark2019-05-079-90/+113
* freedreno/ir3: move ir3_pointer_size()Rob Clark2019-05-074-9/+9
* vulkan/overlay-layer: fix cast errorsLionel Landwerlin2019-05-071-7/+7
* anv: fix alphaToCoverage when there is no color attachmentSamuel Iglesias Gonsálvez2019-05-071-10/+33
* intel/compiler: Don't always require precise lowering of flrpIan Romanick2019-05-061-1/+1
* nir/algebraic: Reassociate open-coded flrp(1, b, c)Ian Romanick2019-05-061-0/+3
* nir/flrp: Lower flrp(a, b, #c) differentlyIan Romanick2019-05-061-0/+17
* nir/flrp: Lower flrp(a, b, c) differently if another flrp(_, b, c) existsIan Romanick2019-05-061-1/+56
* nir/flrp: Lower flrp(a, b, c) differently if another flrp(a, _, c) existsIan Romanick2019-05-061-0/+89
* nir/flrp: Lower flrp(±1, b, c) and flrp(a, ±1, c) differentlyIan Romanick2019-05-061-0/+134
* nir/flrp: Lower flrp(#a, #b, c) differentlyIan Romanick2019-05-061-0/+68
* intel/compiler: Use the flrp lowering pass for all stages on Gen4 and Gen5Ian Romanick2019-05-062-16/+10
* nir: Use the flrp lowering pass instead of nir_opt_algebraicIan Romanick2019-05-069-3/+187
* nir/flrp: Add new lowering pass for flrp instructionsIan Romanick2019-05-064-0/+293
* nir/algebraic: Pull common multiplication out of flrp argumentsIan Romanick2019-05-061-0/+5
* nir/algebraic: Pull common addition out of flrp argumentsIan Romanick2019-05-061-0/+16
* glsl_to_nir: drop supports_intsChristian Gmeiner2019-05-071-23/+8
* nir: nir_shader_compiler_options: drop native_integersChristian Gmeiner2019-05-0712-53/+11
* panfrost: Refactor blend descriptorsAlyssa Rosenzweig2019-05-073-120/+122
* lima/gpir: enable lowering for ftruncVasily Khoruzhick2019-05-071-0/+1
* lima/gpir: implement nir_op_fmovVasily Khoruzhick2019-05-071-0/+1
* lima: use int_to_float lowering passVasily Khoruzhick2019-05-071-2/+6
* nir: add int_to_float lowering passVasily Khoruzhick2019-05-074-0/+215
* radeonsi: add config entry for Counter-Strike Global OffensiveTimothy Arceri2019-05-071-0/+3
* lima/gpir: fix float uniform alignment issueVasily Khoruzhick2019-05-061-2/+1
* draw: flush when setting stream-out targetsErik Faye-Lund2019-05-061-0/+2
* llvmpipe: pass stream-out targets to draw-module earlyErik Faye-Lund2019-05-062-11/+8
* virgl: do not use inline writes for subdataChia-I Wu2019-05-061-4/+7
* virgl: rework queriesChia-I Wu2019-05-061-45/+71
* virgl: export resource_is_busy from winsysChia-I Wu2019-05-063-11/+16
* radv: fix rowPitch for R32G32B32 formats on GFX9Samuel Pitoiset2019-05-061-1/+13
* iris: Enable PIPE_CAP_SURFACE_REINTERPRET_BLOCKSKenneth Graunke2019-05-062-6/+95
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