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* Revert "mesa: only update framebuffer-state for clears"Jakob Bornecrantz2018-09-191-20/+14
| | | | This reverts commit fb86365148d5b8f3f06c5e42d9c8440fc1f6693f.
* radv: use a 64-bit unsigned integer when allocating a descriptor poolSamuel Pitoiset2018-09-191-1/+1
| | | | | | | pool->size is a 64-bit unsigned integer too. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: enable VK_SUBGROUP_FEATURE_ARITHMETIC_BITSamuel Pitoiset2018-09-192-0/+2
| | | | | | | | All CTS pass on Polaris/Vega with LLVM 6, 7 and master, so I think it's safe to enable the feature. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not support blitting surfaces with depth and stencilSamuel Pitoiset2018-09-191-0/+4
| | | | | | | | | | | Fixes: dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal_nearest And all friends that try to blit a surface with different depth and stencil formats. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* mesa: only update framebuffer-state for clearsErik Faye-Lund2018-09-191-14/+20
| | | | | | | | If we update the program-state etc, we risk compiling needless shaders, which can cost quite a bit of performance. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* nir: add initializer data to fix MSVC compile errorJuan A. Suarez Romero2018-09-191-1/+1
| | | | | | | CC: Jason Ekstrand <[email protected]> Fixes: 82799a5d1b8 ("nir: Add a small pass to rematerialize derefs per-block") Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* nir: Add some asserts that we don't put derefs in phisJason Ekstrand2018-09-193-0/+6
| | | | | | | | | The lcssa and phis_to_regs passes are used by various NIR optimizations that modify the CFG. Putting a couple of asserts will help ensure that we don't accidentally put derefs in phis as part of an optimization pass. Reviewed-by: Iago Toral Quiroga <[email protected]>
* nir/opt_if: Re-materialize derefs in use blocks before peeling loopsJason Ekstrand2018-09-191-6/+7
| | | | | | Reviewed-by: Iago Toral Quiroga <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107879 Cc: "18.2" <[email protected]>
* nir/loop_unroll: Re-materialize derefs in use blocks before unrollingJason Ekstrand2018-09-191-9/+4
| | | | | | | | | | When we're about to re-arrange a bunch of blocks, it's a good idea to make sure that we don't have deref uses crossing block boundaries. Otherwise we may end up with a deref going through a phi and that would be bad. Reviewed-by: Iago Toral Quiroga <[email protected]> Cc: "18.2" <[email protected]>
* nir: Add a small pass to rematerialize derefs per-blockJason Ekstrand2018-09-192-0/+134
| | | | | | | | | This pass re-materializes deref instructions on a per-block basis to ensure that every use of a deref occurs in the same block as the instruction which uses it. Reviewed-by: Iago Toral Quiroga <[email protected]> Cc: "18.2" <[email protected]>
* Revert "radv: fix descriptor pool allocation size"Bas Nieuwenhuizen2018-09-181-2/+1
| | | | | | | | | | This reverts commit 90819abb56f6b1a0cd4946b13b6caf24fb46e500. This logic was wrong, the original code is correct. The direct impact is that we allocate up to approximately a squared amount of memory compared to what we should allocate. Acked-by: Samuel Pitoiset <[email protected]>
* radv: implement VK_EXT_conservative_rasterizationSamuel Pitoiset2018-09-183-1/+63
| | | | | | | | | Only supported by GFX9+. The conservativeraster Sascha demo seems to work as expected. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not re-create the sampler for every blits in CmdBlitImage()Samuel Pitoiset2018-09-181-15/+17
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: allow to force anisotropy via RADV_TEX_ANISOSamuel Pitoiset2018-09-182-2/+47
| | | | | | | Ported from RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* mesa: enable EXT_framebuffer_object in core profileTimothy Arceri2018-09-184-27/+17
| | | | | | | | | | | | Since user defined names are not allowed in core profile we remove the allow_user_names bool and just check if we have a core profile like all other buffer/texture object handling code does. This extension is required by "Wolfenstein: The Old Blood" and is exposed in core in the Nvidia binary driver. Reviewed-by: Marek Olšák <[email protected]>
* mesa: move legacy dri config option texture_depthTimothy Arceri2018-09-188-134/+13
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: move legacy dri config option fthrottle_modeTimothy Arceri2018-09-188-114/+12
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: move legacy dri config option def_max_anisotropyTimothy Arceri2018-09-188-29/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: move legacy dri config option no_neg_lod_biasTimothy Arceri2018-09-188-31/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: move legacy dri config option round_modeTimothy Arceri2018-09-187-70/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: remove unused dri option float_depthTimothy Arceri2018-09-187-29/+0
| | | | | | | This seems to have only been used by DRI1 drivers which were removed with e4344161bde2. Reviewed-by: Marek Olšák <[email protected]>
* mesa: move legacy dri config option dither_modeTimothy Arceri2018-09-187-92/+12
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: move legacy dri config option color_reductionTimothy Arceri2018-09-188-82/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: move legacy TCL dri config optionsTimothy Arceri2018-09-189-151/+15
| | | | Reviewed-by: Marek Olšák <[email protected]>
* util: use force_compat_profile for Wolfenstein The Old BloodTimothy Arceri2018-09-181-0/+4
| | | | | | | | | | | This game is looking for some odd extension after creating a core context such as ARB_vertex_program and EXT_framebuffer_object. Rather then enabling these in core this forces the game to use compat. This allows the game to run and seems to work without issues. All other id tech games/engines use a compat profile. Reviewed-by: Marek Olšák <[email protected]>
* mesa/st: add force_compat_profile option to driconfigTimothy Arceri2018-09-183-2/+14
| | | | Reviewed-by: Marek Olšák <[email protected]>
* Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"Timothy Arceri2018-09-183-52/+40
| | | | | | | | | | This reverts commit bc65dcab3bc48673ff6180afb036561a4b8b1119. This was manually reverted. Reverting stops the menu hanging in some id tech games such as RAGE and Wolfenstein The New Order. Reviewed-by: Marek Olšák <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107891
* v3d: Switch from FLUSH_ALL_STATE to FLUSH for ending our bin CLs.Eric Anholt2018-09-171-6/+6
| | | | | | The HW for FLUSH_ALL_STATE isn't validated, since the closed driver only uses FLUSH. Now that we don't have any new state at the end of our bin CLs, follow their lead.
* v3d: Stop clearing the OQ state at the end of the job.Eric Anholt2018-09-173-18/+1
| | | | | | Ever since we added OQ support, we've been clearing OQ state at the start of the job anyway. We're intentionally breaking old-and-new-driver-mix systems, because we need to stop using the unvalidated FLUSH_ALL_STATE.
* v3d: Always emit a TF disable at the start of drawing on V3D 4.x.Eric Anholt2018-09-173-10/+8
| | | | | | | | | | The HW's FLUSH_ALL_STATE is not validated, so we probably shouldn't use it, meaning that we need to reset state at the start. By doing this, we also make ourselves more resilient to another client leaving the TF state enabled at the end of their batch (as we now do, ourselves). However, we still need to emit a single TF disable at the end of the frame, for SWVC5-718.
* build: Don't overlink gallium xlib targetDylan Baker2018-09-172-2/+1
| | | | | | | | | | | | | | | | | | | | | Currently gallium's xlib target will fail to link due to multiple definitions of all the symbols in libmesautil, this only shows up in autotools, and not in meson due to differences in the way that meson and autotools handle linking static archives into static archives. Autotools uses -Wl,--whole-archive implicitly, meson requires this behavior to be opted-into. The solution is just to remove libmesautils from the libgl-xlib target, since it will get all of those symbols form libmesagallium. I've dropped the link from meson as well, it doesn't seem to hurt anything and should make linking just a little faster. Fixes: 8396043f304bb2a752130230055605c5c966e89f ("Replace uses of _mesa_bitcount with util_bitcount") bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107923 Tested-by: Brian Paul <[email protected]> Tested-by: Vinson Lee <[email protected]> Cc: Sergii Romantsov<[email protected]>
* move pthread_setaffinity_np check to the build systemDylan Baker2018-09-171-4/+0
| | | | | | | | | | | | | | | | | Rather than trying to encode all of the rules in a header, lets just put them in the build system where they belong. This fixes the build on FreeBSD, which does have pthraed_setaffinity_np, but it's in a pthread_np.h, not behind _GNU_SOURCE. FreeBSD also implements cpu_set slightly differently, so additional changes would be required to get it working right there anyway. v2: - fix #define in autotools Fixes: 9f1bbbdbbd77d346c74c7abbb31f399151a85713 ("util: try to fix the Android and MacOS build") Cc: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* mesa: FramebufferParameteri parameter checkingFritz Koenig2018-09-171-0/+1
| | | | | | | | | Missing break; causes parameter checking to never pass GL_FRAMEBUFFER_FLIP_Y_MESA parameters. Fixes: 318c265160 ("mesa: GL_MESA_framebuffer_flip_y extension [v4]") Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: Additional FlipY applicationsFritz Koenig2018-09-172-3/+3
| | | | | | | | | | | | | Instances where direction was determined based on winsys or user fbo and should be determined based on FlipY. Key STATE_FB_WPOS_Y_TRANSFORM for of FlipY instead of _mesa_is_user_fbo. This corrects gl_FragCoord usage when applying GL_MESA_framebuffer_flip_y. Fixes: ab05dd183cc ("i965: implement GL_MESA_framebuffer_flip_y [v3]") Reviewed-by: Brian Paul <[email protected]>
* radv: Use build ID if available for cache UUID.Bas Nieuwenhuizen2018-09-171-8/+35
| | | | | | | | | | | To get an useful UUID for systems that have a non-useful mtime for the binaries. I started using SHA1 to ensure we get reasonable mixing in the various possibilities and the various build id lengths. CC: <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radv: enable shaderInt16 capabilitySamuel Pitoiset2018-09-172-1/+2
| | | | | | | | | Not sure if this is all wired up. CTS does pass and the Tangrams demo works fine on Vega. There are corruption issues on Polaris but not sure if that related to 16-bit support. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support to ac_build_bitfield_reverse()Samuel Pitoiset2018-09-171-0/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support to ac_build_bit_count()Samuel Pitoiset2018-09-171-0/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support to ac_find_lsb()Samuel Pitoiset2018-09-171-2/+13
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support to ac_build_umsb()Samuel Pitoiset2018-09-171-2/+16
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support to ac_build_isign()Samuel Pitoiset2018-09-171-5/+16
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit constant values for zero and oneSamuel Pitoiset2018-09-172-0/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add ac_build_bifield_reverse() helperSamuel Pitoiset2018-09-173-1/+26
| | | | | | | Are we missing 64-bit support? Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add ac_build_bit_count() helperSamuel Pitoiset2018-09-173-6/+31
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: fix use of unreachable() in the meta blit pathSamuel Pitoiset2018-09-171-4/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* Revert "radv: Optimize rebinding the same descriptor set."Samuel Pitoiset2018-09-171-7/+1
| | | | | | This introduces random GPU hangs on Vega, at least. This reverts commit 02a43edf186cb9998741ba765cb948bb238a122d.
* radv: fix descriptor pool allocation sizeSamuel Pitoiset2018-09-171-1/+2
| | | | | | | | | | | The size has to be multiplied by the number of sets. This gets rid of the OUT_OF_POOL_KHR error and fixes a crash with the Tangrams demo. CC: 18.1 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* anv/query: Add an emit_srm helperJason Ekstrand2018-09-171-32/+21
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Add a mi_memset and use it for zeroing queriesJason Ekstrand2018-09-173-12/+23
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/query: Use anv_address everywhereJason Ekstrand2018-09-171-57/+64
| | | | | | | Instead of passing around BOs and offsets, use addresses which are anv's GPU equivalent of pointers. Reviewed-by: Lionel Landwerlin <[email protected]>