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* mesa: rework vbo_exec_init()Timothy Arceri2017-06-093-8/+18
| | | | | | | | | | Here we make some assumptions about the AEcontext and set the recalculate bools directly. Some formating fixes are also made while we are here. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: stop passing state bitfield to UpdateState()Timothy Arceri2017-06-0913-22/+33
| | | | | | | | | | | | | | | | | | The code comment which seems to have been added in cab974cf6c2db (from year 2000) says: "Set ctx->NewState to zero to avoid recursion if Driver.UpdateState() has to call FLUSH_VERTICES(). (fixed?)" As far as I can tell nothing in any of the UpdateState() calls should cause it to be called recursively. V2: add a wrapper around the osmesa update function so it can still be used internally. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: add st_invalidate_buffers() helperTimothy Arceri2017-06-094-16/+26
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* r200/radeon: stop calling _ae_invalidate_state() directlyTimothy Arceri2017-06-092-4/+0
| | | | | | | It is already called via _vbo_InvalidateState(). Reviewed-by: Marek Olšák <[email protected]> Tested-by: Ian Romanick <[email protected]>
* swr: relax c++ requirement from c++14 to c++11Tim Rowley2017-06-083-16/+17
| | | | | | | | | | | Remove c++14 generic lambda to keep compiler requirement at c++11. No regressions on piglit or vtk test suites. Tested-by: Chuck Atkins <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]> CC: [email protected]
* radeonsi: call LLVMAddEarlyCSEMemSSAPass only for LLVM >= 4.0Juan A. Suarez Romero2017-06-081-0/+2
| | | | | | | | LLVMAddEarlyCSEMemSSAPass() is defined in LLVM 4.0. Fixes: 257b538 ("radeonsi: do EarlyCSEMemSSA LLVM pass) Signed-off-by: Marek Olšák <[email protected]>
* gallium/radeon: don't allocate HTILE in a separate bufferMarek Olšák2017-06-088-59/+41
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename depth decompress functionsMarek Olšák2017-06-081-16/+15
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename shader resource decompress masks to their true meaningMarek Olšák2017-06-083-28/+28
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename is_compressed_colortex -> color_needs_decompressionMarek Olšák2017-06-081-5/+5
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: disable the patch ID workaround on SI when the patch ID isn't used ↵Marek Olšák2017-06-082-15/+21
| | | | | | | | | | | | | | (v2) The workaround causes a massive performance decrease on 1-SE parts. (Cape Verde, Hainan, Oland) The performance regression is already part of 17.0 and 17.1. v2: check tess_uses_prim_id Cc: 17.0 17.1 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't update dependent states if it has no effect (v2)Marek Olšák2017-06-083-12/+76
| | | | | | | | | | | | | | This and the previous clip_regs commit decrease IB sizes and the number of si_update_shaders invocations as follows: IB size si_update_shaders calls Borderlands 2 -10% -27% Deus Ex: MD -5% -11% Talos Principle -8% -30% v2: always dirty cb_render_state in set_framebuffer_state Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: Add format/modifier advertisingVarad Gautam2017-06-081-4/+72
| | | | | | | | | v2: Rebase and reuse tiling/modifier map. (Daniel Stone) v3: bump DRIimageExtension to version 15, fill external_only array. v4: Y-tiling works since gen 6 Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Support dmabuf import with modifiersVarad Gautam2017-06-081-18/+76
| | | | | | | | | | | | Add support for createImageFromDmaBufs2, adding a modifier to the original, and allow importing CCS resources with auxiliary data from dmabufs. v2: avoid DRIimageExtension version bump, pass single modifier to createImageFromDmaBufs2. Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Improve same-buffer restriction for importsDaniel Stone2017-06-081-5/+13
| | | | | | | | | | | | | | | | Intel hardware requires that all planes of an image come from the same buffer, which is currently implemented by testing that all FDs are numerically the same. However, when going through a winsys (e.g.) or anything which transits FDs individually, the FDs may be different even if the underlying buffer is the same. Instead of checking the FDs for equality, we must check if they actually point to the same buffer (Jason). Reviewed-by: Varad Gautam <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Allocate tile aligned heightBen Widawsky2017-06-081-5/+26
| | | | | | | | | | | | | | | This patch shouldn't actually do anything because the libdrm function should already do this alignment. However, it preps us for a future patch where we add in the CCS AUX size, and in the process it serves as a good place to find bisectable issues if libdrm or kernel does something incorrectly. v2: Do proper alignment for X tiling, and make sure non-tiled case is handled (Jason) v3: Rebase (Daniel) Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Move fallback size assignment out of bufmgrDaniel Stone2017-06-083-9/+17
| | | | | | | | | | | | | | The bufmgr took a mandatory size argument, which would only be used if the kernel size query failed, i.e. an older kernel. It didn't actually check that the BO size was sufficient for use. Pull the check out of the bufmgr, and actually check that the BO is sufficiently-sized for our import one level up. This also resolves a chicken/egg we have when importing bufers without explicit modifiers, namely that we need the tiling mode to calculate the size, but we need the BO imported to query the tiling mode. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Invert image modifier/tiling inferenceDaniel Stone2017-06-081-17/+18
| | | | | | | | | | | | When allocating images, we record a tiling mode and then work backwards to infer the modifier. Unfortunately this is the wrong way around, since it is a one:many mapping (e.g. TILING_Y can be plain Y-tiling, or Y-tiling with CCS). Invert the mapping, so we record a modifier first and then map this to a tiling mode. Reviewed-by: Jason Ekstrand <[email protected]>
* egl/dri2: Avoid sign extension when building modifierDaniel Stone2017-06-081-3/+2
| | | | | | | | | Since the EGL attributes are signed integers, a straight OR would also perform sign extension, Fixes: 6f10e7c37a ("egl/dri2: Create EGLImages with dmabuf modifiers") Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i915g: Add blitter_context argument.Vinson Lee2017-06-081-1/+1
| | | | | | | | | | | | | | | | | | | Fix build error. CC i915_surface.lo i915_surface.c:108:63: error: too few arguments to function call, expected 4, have 3 util_blitter_default_src_texture(&src_templ, src, src_level); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^ ../../../../src/gallium/auxiliary/util/u_blitter.h:271:1: note: 'util_blitter_default_src_texture' declared here void util_blitter_default_src_texture(struct blitter_context *blitter, ^ Fixes: a893c9169733 ("gallium/u_blitter: use 2D_ARRAY for cubemap blits if possible") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101340 Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Juan A. Suarez Romero <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* etnaviv: flush resource when binding as sampler viewLucas Stach2017-06-081-0/+3
| | | | | | | | As TS is also allowed on sampler resources, we need to make sure to resolve to self when binding the resource as a texture, to avoid stale content being sampled. Signed-off-by: Lucas Stach <[email protected]>
* etnaviv: don't flush resource to self without TSLucas Stach2017-06-081-1/+1
| | | | | | | | A resolve to self is only necessary if the resource is fast cleared, so there is never a need to do so if there is no TS allocated. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* etnaviv: upgrade DISCARD_RANGE to DISCARD_WHOLE_RESOURCE if possibleLucas Stach2017-06-081-0/+14
| | | | | | | | Stolen from VC4. As we don't do any fancy reallocation tricks yet, it's possible to upgrade also coherent mappings and shared resources. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* etnaviv: simplify transfer tiling handlingLucas Stach2017-06-081-41/+29
| | | | | | | | | There is no need to special case compressed resources, as they are already marked as linear on allocation. With that out of the way, there is room to cut down on the number of if clauses used. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* etnaviv: don't read back resource if transfer discards contentsLucas Stach2017-06-081-1/+3
| | | | | | | | | Reduces bandwidth usage of transfers which discard the buffer contents, as well as skipping unnecessary command stream flushes and CPU/GPU synchronization. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* etnaviv: honor PIPE_TRANSFER_UNSYNCHRONIZED flagLucas Stach2017-06-081-12/+23
| | | | | | | | | | | | This gets rid of quite a bit of CPU/GPU sync on frequent vertex buffer uploads and I haven't seen any of the issues mentioned in the comment, so this one seems stale. Ignore the flag if there exists a temporary resource, as those ones are never busy. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* etnaviv: slim down resource waitingLucas Stach2017-06-084-23/+6
| | | | | | | | cpu_prep() already does all the required waiting, so the only thing that needs to be done is flushing the commandstream, if a GPU write is pending. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]>
* glsl: Fix gl_shader_stage enum unsigned comparisonRob Herring2017-06-087-4/+22
| | | | | | | | | | | Replace -1 with MESA_SHADER_NONE enum value to fix sign related warning: external/mesa3d/src/compiler/glsl/link_varyings.cpp:1415:25: warning: comparison of constant -1 with expression of type 'gl_shader_stage' is always true [-Wtautological-constant-out-of-range-compare] (consumer_stage != -1 && consumer_stage != MESA_SHADER_FRAGMENT))) { ~~~~~~~~~~~~~~ ^ ~~ Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Rob Herring <[email protected]>
* Android: vulkan: fix build error due to extra )Rob Herring2017-06-081-1/+1
| | | | | | | | | | | | Commit 621b3410f5f8 ("util/vulkan: Move Vulkan utilities to src/vulkan/util") broke the Android build with the following error: build/core/binary.mk:1427: error: external/mesa3d/src/vulkan/Android.mk: libmesa_vulkan_util: Unused source files: util/vk_util.h). Fixes: 621b3410f5f8 ("util/vulkan: Move Vulkan utilities to src/vulkan/util") Reviewed-by: Tapani Pälli <[email protected]> Cc: Alex Smith <[email protected]> Signed-off-by: Rob Herring <[email protected]>
* Fix glcpp test expectationsIago Toral Quiroga2017-06-082-3/+6
| | | | | | | | | | With commit f7741985be0234 we have changed some preprocessor error messages and warnings. Adapt related glcpp tests expectations accordingly. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101336 Tested-by: Vinson Lee <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* util: make set's deleted_key_value declaration consistent with hash table oneVlad Golovkin2017-06-081-2/+2
| | | | | | | | | | | | | This also silences following clang warnings: no previous extern declaration for non-static variable 'deleted_key' [-Werror,-Wmissing-variable-declarations] const void *deleted_key = &deleted_key_value; ^ no previous extern declaration for non-static variable 'deleted_key_value' [-Werror,-Wmissing-variable-declarations] uint32_t deleted_key_value; ^ Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: Delete intel_resolve_mapJason Ekstrand2017-06-077-213/+2
| | | | | | | | Now that we've moved over to the new array mechanism, it's no longer needed. Reviewed-by: Topi Pohjolainen <[email protected]> Acked-by: Chad Versace <[email protected]>
* i965: Use the new tracking mechanism for HiZJason Ekstrand2017-06-073-128/+127
| | | | | | | | | | | | | | This is similar to the previous commit only for HiZ. For HiZ, apart from everything looking different, there is really only one functional change: We now track the ISL_AUX_STATE_COMPRESSED_NO_CLEAR state. Previously, if you rendered to a resolved slice of the miptree and then did a fast-clear with a different clear color, that slice would get resolved even though it hadn't been fast-cleared. Now that we can track COMPRESSED_NO_CLEAR, we know that it doesn't have any blocks in the "clear" state so we can skip the resolve. Reviewed-by: Topi Pohjolainen <[email protected]> Acked-by: Chad Versace <[email protected]>
* i965/miptree: Make level_has_hiz take a const miptreeJason Ekstrand2017-06-072-2/+2
| | | | Acked-by: Chad Versace <[email protected]>
* i965: Wholesale replace the color resolve tracking codeJason Ekstrand2017-06-073-259/+313
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit reworks the resolve tracking for CCS and MCS to use the new isl_aux_state enum. This should provide much more accurate and easy to reason about tracking. In order to understand, for instance, the intel_miptree_prepare_ccs_access function, one only has to go look at the giant comment for the isl_aux_state enum and follow the arrows. Unfortunately, there's no good way to split this up without making a real mess so there are a bunch of changes in here: 1) We now do partial resolves. I really have no idea how this ever worked before. So far as I can tell, the only time the old code ever did a partial resolve was when it was using CCS_D where a partial resolve and a full resolve are the same thing. 2) We are now tracking 4 states instead of 3 for CCS_E. In particular, we distinguish between compressed with clear and compressed without clear. The end result is that you will never get two partial resolves in a row. 3) The texture view rules are now more correct. Previously, we would only bail if compression was not supported by the destination format. However, this is not actually correct. Not all format pairs are supported for texture views with CCS even if both support CCS individually. Fortunately, ISL has a helper for this. 4) We are no longer using intel_resolve_map for tracking aux state but are instead using a simple array of enum isl_aux_state indexed by level and layer. This is because, now that we're tracking 4 different states, it's no longer clear which should be the "default" and array lookups are faster than linked list searches. 5) The new code is very assert-happy. Incorrect transitions will now get caught by assertions rather than by rendering corruption. Reviewed-by: Topi Pohjolainen <[email protected]> Acked-by: Chad Versace <[email protected]>
* i965: Delete most of the old resolve interfaceJason Ekstrand2017-06-072-131/+10
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Acked-by: Chad Versace <[email protected]>
* i965: Use the new get/set_aux_state functions for color clearsJason Ekstrand2017-06-071-7/+6
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Acked-by: Chad Versace <[email protected]>
* i965: Move blorp to the new resolve functionsJason Ekstrand2017-06-071-45/+19
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Acked-by: Chad Versace <[email protected]>
* i965: Move depth to the new resolve functionsJason Ekstrand2017-06-075-20/+54
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Move images to the new resolve functionsJason Ekstrand2017-06-073-8/+13
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Move framebuffer fetch to the new resolve functionsJason Ekstrand2017-06-073-11/+36
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Remove an unneeded render_cache_set_check_flushJason Ekstrand2017-06-071-3/+3
| | | | | | | | | This is only needed to fix rendering corruptions caused by not flushing after doing a resolve operation. The resolve now does all the needed flushing so this is unnecessary. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Move color rendering to the new resolve functionsJason Ekstrand2017-06-074-34/+62
| | | | | | | | | | This also removes an unneeded brw_render_cache_set_check_flush() call. We were calling it in the case where the surface got resolved to satisfy the flushing requirements around resolves. However, blorp now does this itself, so the extra is just redundant. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Move texturing to the new resolve functionsJason Ekstrand2017-06-073-46/+71
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Use the new resolve function for several simple casesJason Ekstrand2017-06-078-24/+32
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Add new entrypoints for resolve managementJason Ekstrand2017-06-072-0/+259
| | | | | | | | | | | | This commit adds a new unified interface for doing resolves. The basic format is that, prior to any surface access such as texturing or rendering, you call intel_miptree_prepare_access. If the surface was written, you call intel_miptree_finish_write. These two functions take parameters which tell them whether or not auxiliary compression and fast clears are supported on the surface. Later commits will add wrappers around these two functions for texturing, rendering, etc. Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/isl: Add an enum for describing auxiliary compression stateJason Ekstrand2017-06-071-0/+169
| | | | | | | | | | | | This enum describes all of the states that a auxiliary compressed surface can have. All of the states as well as normative language for referring to each of the compression operations is provided in the truly colossal comment for the new isl_aux_state enum. There is also a diagram showing how surfaces move between the different states. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Nanley Chery <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Combine render target resolve codeJason Ekstrand2017-06-072-52/+29
| | | | | | | | | We have two different bits of resolve code for render targets: one in brw_draw where it's always been and one in brw_context to deal with sRGB on gen9. Let's pull them together. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Be a bit more conservative about certain resolvesJason Ekstrand2017-06-074-8/+12
| | | | | | | | | There are several places where we were resolving the entire miptree when we really only needed to resolve a single slice. Let's avoid the unneeded resolving. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/blorp: Move MCS allocation earlier for clearsJason Ekstrand2017-06-071-14/+14
| | | | | | | This way it happens before we call get_aux_state. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
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