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* i965: Add helper for converting isl tiling to bufmgr tilingTopi Pohjolainen2017-06-191-0/+13
| | | | | Reviewed-by: Nanley Chery <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Refactor mapping table allocTopi Pohjolainen2017-06-191-2/+28
| | | | | | | v2 (Nanley): Use minify() instead of direct shift Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen6: Declare minify(depth, level) layers for 3D stencilTopi Pohjolainen2017-06-191-1/+3
| | | | | | | | | Keeps following patch refactoring the table allocation non-functional. Suggested-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen4: Add support for single layer in alignment workaroundTopi Pohjolainen2017-06-197-11/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On gen < 6 one doesn't have level or layer specifiers available for render and depth targets. In order to support rendering to specific level/layer, driver needs to manually offset the surface to the desired slice. There are, however, alignment restrictions to respect as well and in come cases the only option is to use temporary single slice surface which driver copies after rendering to the full miptree. Current alignment workaround introduces new texture images which are added to the parent texture object. Texture validation later on copies the additional levels back to the surface that contains the full mipmap. This only works for non-arrayed surfaces and driver currently creates new arrayed images in vain - individual layers within the newly created are still unaligned the same as before. This patch drops this mechanism and instead attaches single temporary slice into the render buffer. This gets immediately copied back to the mipmapped and/or arrayed surface just after the render is done. Sitting on top of earlier series cleaning up the depth buffer state, this patch additionally fixes the following piglit tests: arb_framebuffer_object.fbo-generatemipmap-cubemap.g965m64 arb_texture_cube_map.copyteximage cube.g965m64 arb_texture_cube_map.copyteximage cube.ilkm64 arb_pixel_buffer_object.texsubimage array pbo.g965m64 ext_framebuffer_object.fbo-cubemap.g965m64 ext_texture_array.copyteximage 1d_array.g45m64 ext_texture_array.copyteximage 1d_array.g965m64 ext_texture_array.copyteximage 1d_array.ilkm64 ext_texture_array.copyteximage 2d_array.g45m64 ext_texture_array.copyteximage 2d_array.g965m64 ext_texture_array.copyteximage 2d_array.ilkm64 ext_texture_array.fbo-array.g965m64 ext_texture_array.fbo-generatemipmap-array.g965m64 ext_texture_array.gen-mipmap.g965m64 Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Separate src and dst slice specifiers in slice copyTopi Pohjolainen2017-06-191-25/+35
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Clarify face/level/layer in slice copyTopi Pohjolainen2017-06-191-19/+20
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* anv: Fix L3 cache programming on Bay TrailJonas Kulla2017-06-191-1/+1
| | | | | | | | | | | Valid values for URBAllocation start at 32, so substract that before programming the register. This was missed when porting from the GL driver. Cc: "17.1" <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* radeonsi: fix dumping shader descriptors into ddebug logsMarek Olšák2017-06-191-35/+41
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add a workaround for inexact SNORM8 blitting againMarek Olšák2017-06-191-0/+37
| | | | | | | | GFX9 is affected. We only have tests for GL_x_SNORM where x is R8, RG8, RGB8, and RGBA8. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix TC-compatible stencil compressionMarek Olšák2017-06-192-2/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix TXF_LZ with 1D texturesMarek Olšák2017-06-191-1/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: disable sparse buffersMarek Olšák2017-06-191-0/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/sid.h: don't use parentheses in PKT3_RELEASE_MEM definitionMarek Olšák2017-06-191-1/+1
| | | | | | | The parses skips the line if it contains parentheses. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: parse EVENT_WRITE_EOP, RELEASE_MEM, WAIT_REG_MEM, NOWHEREMarek Olšák2017-06-192-0/+47
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: simplify returning GL_VENDORMarek Olšák2017-06-192-5/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: remove the "Gallium 0.4 on" prefix from GL_RENDERERMarek Olšák2017-06-192-8/+1
| | | | | | | | | | | | | If you want to keep it for your driver, please raise your hand. The prefix will probably have to be added into the driver instead of here. I cringe when I look at my long renderer string: Gallium 0.4 on AMD Radeon R9 Fury Series (DRM 3.17.0 / 4.11.0-staging-01277-gab25a9e, LLVM 5.0.0) I'm sincerely sorry for all apps that detect Mesa by expecting "Gallium" in the string. Reviewed-by: Eric Anholt <[email protected]>
* st/mesa: don't update MSAA states for GL_FRAMEBUFFER_SRGBMarek Olšák2017-06-191-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: Ignore anisotropic filtering in nearest mode.Kenneth Graunke2017-06-191-2/+4
| | | | | | | | | | | | | | | This fixes both Europa Universalis IV and Stellaris rendering on i965. This was tested on SKL. This fix was discovered by Jakub Szuppe at Stream HPC (https://streamhpc.com/). bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96958 bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95530 Signed-off-by: Kenneth Graunke <[email protected]> Tested-by: Dylan Baker <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: 17.1 <[email protected]>
* glsl: gl_Max{Vertex,Fragment}UniformComponents exist in all desktop GL versionsIago Toral Quiroga2017-06-191-7/+9
| | | | | | | | | | The current implementation assumed that these were replaced in GLSL >= 4.10 by gl_Max{Vertex,Fragment}UniformVectors, however this is not true: both built-ins should be produced from GLSL 4.10 onwards. This was raised by new CTS tests that are in development. Reviewed-by: Nicolai Hähnle <[email protected]>
* st/glsl_to_tgsi: use correct writemask when converting generic intrinsicsNicolai Hähnle2017-06-191-0/+2
| | | | | | | | | | | This fixes a bug when lowering ballotARB: previously, using writemask 0xf, emit_asm would create TGSI_OPCODE_BALLOT instructions that span two registers to cover 4 64-bit channels. This could trample over other a neighbouring temporary. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101360 Cc: 17.1 <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon/gfx9: fix PBO texture uploads to compressed texturesNicolai Hähnle2017-06-191-1/+6
| | | | | | | | | st/mesa creates a surface that reinterprets the compressed blocks as RGBA16UI or RGBA32UI. We have to adjust width0 & height0 accordingly to avoid out-of-bounds memory accesses by CB. Cc: 17.1 <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600: fix off-by-one in egd_tables.pyNicolai Hähnle2017-06-191-1/+1
| | | | | | Port of the corresponding fix in sid_tables.py. Reviewed-by: Marek Olšák <[email protected]>
* amd/common: fix off-by-one in sid_tables.pyNicolai Hähnle2017-06-191-1/+1
| | | | | | | The very last entry in the sid_strings_offsets table ended up missing, leading to out-of-bounds reads and potential crashes. Reviewed-by: Marek Olšák <[email protected]>
* i965: update MaxTextureRectSize to match PRMs and comply with OpenGL 4.1+Iago Toral Quiroga2017-06-191-1/+1
| | | | | | | We were exposing 4096, but we can do up to 8192 in Gen4-6 and up to 16384 in gen7+. OpenGL 4.1+ requires at least 16384. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: add KHR_no_error support for gl*UniformHandleui64*ARBSamuel Pitoiset2017-06-181-19/+39
| | | | | | | | Similar to _mesa_uniform() except that we have to call validate_uniform_parameters() instead of validate_uniform(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: add KHR_no_error support for glGetImageHandleARB()Samuel Pitoiset2017-06-183-1/+20
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: add KHR_no_error support for glGetTexture*HandleARB()Samuel Pitoiset2017-06-183-2/+40
| | | | | | | | | | | | It would be nice to have a no_error path for _mesa_test_texobj_completeness() because this function doesn't only test if the texture is complete. Anyway, that seems enough for now and a bunch of checks are skipped with this patch. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: add KHR_no_error support for glMake{Image,Texture}Handle*ResidentARB()Samuel Pitoiset2017-06-183-4/+62
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: add KHR_no_error support for glIs{Image,Texture}HandleResidentARB()Samuel Pitoiset2017-06-183-2/+23
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: reduce overhead for resident textures which need color decompressionSamuel Pitoiset2017-06-184-34/+58
| | | | | | | | | This is done by introducing a separate list. si_decompress_textures() is now 5x faster. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: reduce overhead for resident textures which need depth decompressionSamuel Pitoiset2017-06-184-8/+29
| | | | | | | This is done by introducing a separate list. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use util_dynarray_foreach for bindless resourcesSamuel Pitoiset2017-06-182-129/+46
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/util: add util_dynarray_clear() helperSamuel Pitoiset2017-06-181-0/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: add a new HUD query for the number of resident handlesSamuel Pitoiset2017-06-184-0/+12
| | | | | | | | | Useful for debugging performance issues when ARB_bindless_texture is enabled. This query doesn't make a distinction between texture and image handles. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965/gen4: Refactor depth/stencil rebaseTopi Pohjolainen2017-06-181-180/+63
| | | | | | | | Effectively there is the same code twice, once for depth and again for stencil. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Drop depth/stencil miptree pointers in alignment workaroundTopi Pohjolainen2017-06-182-15/+3
| | | | | | | | | In brw_workaround_depthstencil_alignment() corresponding renderbuffers are always set to refer to the same temp miptrees. There is no need to carry them in context. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen4: Simplify depth/stencil invalidate checkTopi Pohjolainen2017-06-181-13/+3
| | | | | | | There is no separate stencil on gen < 6. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen4: Remove redundant check for depth when rebasing stencilTopi Pohjolainen2017-06-181-51/+12
| | | | | | | | | | | | | In case of gen < 6 stencil (if present) is always combined with depth. Both stencil and depth attachments point to the same physical surface. Alignment workaround starts by considering depth and updates stencil accordingly. Current logic continues with stencil and in vain considers the case where depth would refer to different surface than stencil. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen4: Remove non-existing stencil and hiz buffer setupTopi Pohjolainen2017-06-182-117/+14
| | | | | | | Separate stencil and hiz are only enabled for gen6+. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* android: ac: add missing libdrm_amdgpu shared dependencyMauro Rossi2017-06-171-0/+3
| | | | | | | | | | | | | | | | Fixes building errors in amd/common: target C: libmesa_amd_common <= external/mesa/src/amd/common/ac_gpu_info.c ... target C: libmesa_amd_common <= external/mesa/src/amd/common/ac_surface.c ... external/mesa/src/amd/common/ac_gpu_info.h:31:10: fatal error: 'amdgpu.h' file not found ^ 2 errors Fixes: 98a2492 ("ac_surface: use radeon_info from ac_gpu_info") Signed-off-by: Emil Velikov <[email protected]>
* r600: include libelf headers only as neededEmil Velikov2017-06-171-0/+2
| | | | | | | | | | | | | | | | | Headers are required only when building with OpenCL. As we're building w/o it libelf may be missing, hence we'll error out as below: src/gallium/drivers/r600/evergreen_compute.c:27:10: fatal error: 'gelf.h' file not found ^ 1 error generated. Fixes: d96a210842 ("r600g,compute: provide local copy of functions from ac_binary.c") Reviewed-by: Jan Vesely <[email protected]> Reported-by: Mauro Rossi <[email protected]> Tested-by: Mauro Rossi <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* radeonsi: include ac_binary.h for struct ac_shader_binaryEmil Velikov2017-06-171-2/+2
| | | | | | | | | | | | | | The header embeds the struct so it needs the header inclusion instead of the dummy forward declaration. Cc: Nicolai Hähnle <[email protected]> Cc: Marek Olšák <[email protected]> Cc: Tom Stellard <[email protected]> Fixes: 32206c5e560 ("radeonsi: Add radeon_shader_binary member to struct si_shader") Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Bas Nieuwenhuizen <[email protected]>
* r600, radeon: move radeon_shader_binary_{init,clean} back to radeonEmil Velikov2017-06-173-23/+28
| | | | | | | | | | | | | Those are used by r600 and radeonsi, so moving them within the former was a bad idea. Fixes: d96a210842b ("r600g,compute: provide local copy of functions from ac_binary.c") Cc: Jan Vesely <[email protected]> Cc: Aaron Watry <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Bas Nieuwenhuizen <[email protected]>
* ac: resolve conflicts introduced with "ac: remove amdgpu.h dependency"Emil Velikov2017-06-171-1/+3
| | | | | | | | | | | | | | | | | | | The commit did not add the relevant includes - in particular stdint.h and stdbool.h for the respective standard types. At the same time, the amdgpu_device_handle typedef redeclaration was off. Fixes: 81945ded0dc ("ac: remove amdgpu.h dependency") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101471 Cc: Mark Janes <[email protected]> Cc: Gregor Münch <[email protected]> Reported-by: Bas Nieuwenhuizen <[email protected]> Reported-by: Mark Janes <[email protected]> Reported-by: Gregor Münch <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Bas Nieuwenhuizen <[email protected]>
* i965/gen4: Set depth offset when there is stencil attachment onlyTopi Pohjolainen2017-06-171-0/+6
| | | | | | | | | | | | | Current version fails to set depthstencil.depth_offset when there is only stencil attachment (it does set the intra tile offsets though). Fixes piglits: g45,g965,ilk: depthstencil-render-miplevels 1024 s=z24_s8 g45,ilk: depthstencil-render-miplevels 273 s=z24_s8 CC: [email protected] Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen6: Remove dead code in hiz surface setupTopi Pohjolainen2017-06-171-7/+6
| | | | | | | | | In intel_hiz_miptree_buf_create() the miptree is unconditionally created with MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD. Reviewed-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl/gen6: Allow arrayed stencilTopi Pohjolainen2017-06-171-1/+0
| | | | | | | | Nothing prevents arrayed stencil surfaces even though hardware doesn't support mipmapping. Reviewed-by: Nanley Chery <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* svga: add new num-failed-allocations HUD queryBrian Paul2017-06-165-2/+26
| | | | | | | This counter is incremented if we fail to allocate memory for vertex/index/const buffers, textures, etc. Reviewed-by: Neha Bhende <[email protected]>
* gallium/hud: support GALLIUM_HUD_DUMP_DIR feature on WindowsBrian Paul2017-06-161-6/+30
| | | | | | | Use a dummy implementation of the access() function. Use \ path separator. Add a few comments. Reviewed-by: Neha Bhende <[email protected]>
* svga: add a few minor commentsBrian Paul2017-06-162-1/+6
| | | | Trivial.
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