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* winsys/radeon: use os_wait_until_zero in radeon_bo_set_tilingMarek Olšák2015-07-051-3/+1
* radeonsi: don't flush an empty IB if the only thing we need is a fenceMarek Olšák2015-07-053-3/+15
* gallium/os: add conversion and wait functions for absolute timeoutsMarek Olšák2015-07-052-0/+67
* gallium/os: add os_wait_until_zero (v2)Marek Olšák2015-07-052-1/+48
* gallium/radeon: mark the gpu load thread stop trigger as volatileMarek Olšák2015-07-051-1/+1
* st/mesa: if a fence isn't returned, assume it's signalledMarek Olšák2015-07-051-1/+13
* gallium: remove redundant pipe_context::fence_signalledMarek Olšák2015-07-0513-131/+0
* gallium: use fence_finish instead of fence_signalled in state trackersMarek Olšák2015-07-055-5/+5
* gallium: handle fence_finish timeout in various driversMarek Olšák2015-07-055-0/+15
* gallium/docs: remove out-of-date document about D3D11 featuresMarek Olšák2015-07-051-462/+0
* radeonsi: fix a hang with DrawTransformFeedback on 4 SE chipsMarek Olšák2015-07-051-0/+4
* glsl: update types for unsized arrays of membersTimothy Arceri2015-07-041-2/+16
* glsl: update assert to support arrays of arraysTimothy Arceri2015-07-041-1/+2
* glsl: allow precision qualifiers for AoATimothy Arceri2015-07-041-3/+1
* nv50/ir: UCMP arguments are float, so make sure modifiers are appliedIlia Mirkin2015-07-031-1/+2
* glsl: add a missing call to _mesa_locale_initErik Faye-Lund2015-07-032-3/+3
* winsys/radeon: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.Mario Kleiner2015-07-031-3/+10
* r600g: disable single-sample fast color clear due to hangsMarek Olšák2015-07-031-1/+6
* r600g,radeonsi: implement get_device_reset_statusMarek Olšák2015-07-036-4/+38
* dri/common: allow BGRX sRGB visualsMarek Olšák2015-07-031-0/+1
* mesa: fix sRGB rendering for GLES1Marek Olšák2015-07-031-6/+4
* egl: sort extension lists alphabeticallyMarek Olšák2015-07-033-54/+51
* egl: implement EGL_KHR_gl_texture_3D_imageAnatoli Antonovitch2015-07-031-3/+17
* freedreno/ir3: don't be confused by eliminated indirectsRob Clark2015-07-032-0/+14
* freedreno/ir3: sched fixes for addr register usageRob Clark2015-07-031-12/+65
* freedreno/ir3: fix indirects trackingRob Clark2015-07-035-10/+23
* gallium/ttn: mark location specially in nir for color0-writes-allIlia Mirkin2015-07-033-1/+16
* nir/lower_phis_to_scalar: undef is trivially scalarizableRob Clark2015-07-031-0/+1
* gallium/ttn: IN/OUT are only array if ArrayID != 0Rob Clark2015-07-031-62/+81
* tgsi: update docs for ArrayID usageRob Clark2015-07-031-0/+1
* i965/fs: Don't disable SIMD16 when using the pixel interpolatorNeil Roberts2015-07-031-8/+3
* nir: Don't allow copying SSA destinationsJason Ekstrand2015-07-021-11/+11
* mesa/prog: relative offsets into constbufs are not constantIlia Mirkin2015-07-021-0/+2
* i965: allocate at least 1 BLEND_STATE elementMike Stroyan2015-07-021-1/+1
* mesa/st: Add checks for signed/unsigned integer conversions in ReadPixelsIago Toral Quiroga2015-07-021-0/+28
* nv50/ir: don't emit src2 in immediate formIlia Mirkin2015-07-021-2/+2
* nvc0: tune PREFER_BLIT_BASED_TEXTURE_TRANSFER capabilityAlexandre Courbot2015-07-011-1/+2
* mesa: reset the source packing when creating temp transfer imageIlia Mirkin2015-07-011-0/+1
* nvc0: create screen fence objects with coherent attributeAlexandre Courbot2015-07-021-2/+6
* i965/gen9: use an unreserved surface alignment valueNanley Chery2015-07-011-4/+4
* i965/fs: Use the builder directly for the gen6 interpolation add(32)Jason Ekstrand2015-07-011-6/+5
* i965/fs: Relax fs_builder channel group assertion when force_writemask_all is...Francisco Jerez2015-07-013-7/+7
* nouveau: rename var name for nouveau_vieux to avoid conflict with nouveauIlia Mirkin2015-07-011-2/+2
* glsl: create program resource list after LinkShaderTapani Pälli2015-07-012-4/+2
* glsl: expose build_program_resource_list functionTapani Pälli2015-07-012-1/+5
* glsl: build stageref mask using IR, not symbol tableTapani Pälli2015-07-011-3/+11
* ilo: remove ilo_image_paramsChia-I Wu2015-07-011-75/+47
* ilo: add image_init_gen6_transfer_layout()Chia-I Wu2015-07-011-75/+37
* ilo: add image_set_gen6_bo_size()Chia-I Wu2015-07-013-118/+89
* ilo: add image_set_gen6_{hiz,mcs}Chia-I Wu2015-07-011-49/+61
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