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* i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround.Kenneth Graunke2017-11-181-1/+5
* anv/cmd_buffer: Take bo_offset into account in fast clear state addressesJason Ekstrand2017-11-171-1/+1
* anv/cmd_buffer: Advance the address when initializing clear colorsJason Ekstrand2017-11-171-3/+6
* i965/gen8+: Fix the number of dwords programmed in MI_FLUSH_DWAnuj Phogat2017-11-172-5/+17
* i965: Program DWord Length in MI_FLUSH_DWAnuj Phogat2017-11-173-3/+3
* Revert "intel/fs: Use a pure vertical stride for large register strides"Matt Turner2017-11-171-13/+3
* i965/fs: Split all 32->64-bit MOVs on CHV, BXT, GLKMatt Turner2017-11-171-4/+4
* i965/fs: Fix extract_i8/u8 to a 64-bit destinationMatt Turner2017-11-171-2/+23
* tgsi/exec: fix LDEXP in softpipeNicolai Hähnle2017-11-171-1/+1
* egl/wayland: Add a fallback when fourcc query isn't supportedDerek Foreman2017-11-171-2/+30
* radv: Free temporary syncobj after waiting on it.Bas Nieuwenhuizen2017-11-171-4/+18
* radv: Free syncobj with multiple imports.Bas Nieuwenhuizen2017-11-171-2/+8
* loader/dri3: Improve dri3 thread-safetyThomas Hellstrom2017-11-172-18/+69
* intel/tools: Fix detection of enabled shader stages.Kenneth Graunke2017-11-171-1/+1
* i965: Upload invariant state once at the start of the batch on Gen4-5.Kenneth Graunke2017-11-174-13/+3
* i965: Implement another VF cache invalidate workaround on Gen8+.Kenneth Graunke2017-11-171-8/+33
* swr/rast: Faster emulated simd16 permuteTim Rowley2017-11-171-23/+11
* swr/rast: Use gather instruction for i32gather_ps on simd16/avx512Tim Rowley2017-11-171-11/+1
* i965: Add stencil buffers to cache set regardless of stencil texturingJason Ekstrand2017-11-171-3/+1
* i965: Use PTE MOCS for all external buffersJason Ekstrand2017-11-172-10/+18
* intel/blorp: Make the MOCS setting part of blorp_addressJason Ekstrand2017-11-176-33/+44
* anv/blorp: Add a device parameter to blorp_surf_for_anv_imageJason Ekstrand2017-11-171-22/+34
* intel/blorp: Use mocs.tex for depth stencilJason Ekstrand2017-11-171-5/+1
* r600: fix isoline tess factor component swapping.Dave Airlie2017-11-171-0/+7
* r600/shader: reserve first register of vertex shader.Dave Airlie2017-11-171-2/+4
* glx/dri3: Fix passing renderType into glXCreateContextAdam Jackson2017-11-171-1/+2
* glx/drisw: Fix glXMakeCurrent(dpy, None, ctx)Adam Jackson2017-11-171-4/+2
* nir/spirv: tg4 requires a samplerAlex Smith2017-11-172-2/+1
* spirv: Use correct type for sampled imagesAlex Smith2017-11-173-6/+6
* glsl: Allow precision mismatch on dead data with GLSL ES 1.00Tomasz Figa2017-11-131-4/+10
* i965: Make L3 configuration atom listen for TCS/TES program updates.Kenneth Graunke2017-11-131-0/+2
* autotools: Set C++ visibility flags on IntelDylan Baker2017-11-131-0/+3
* nir: Don't print swizzles when there are more than 4 componentsMatt Turner2017-11-131-1/+1
* glsl: Fix typo fragement -> fragmentAndreas Boll2017-11-131-1/+1
* broadcom/vc5: Remove unused v3d_compiler.cAndreas Boll2017-11-131-43/+0
* automake: intel: correctly append to the LIBADD variableEmil Velikov2017-11-131-1/+1
* i965: disable NIR linking on HSW and belowTimothy Arceri2017-11-131-1/+4
* automake: include git_sha1.h.in in release tarballJuan A. Suarez Romero2017-11-131-1/+1
* glsl: Transform fb buffers are only active if a variable uses themNeil Roberts2017-11-131-9/+15
* glsl: add varying resources for arrays of complex typesJuan A. Suarez Romero2017-11-131-4/+59
* intel/nir: Use the correct indirect lowering masks in link_shadersJason Ekstrand2017-11-101-6/+4
* mesa: rework how we free gl_shader_program_dataTimothy Arceri2017-11-103-42/+18
* glsl: use the correct parent when allocating program data membersTimothy Arceri2017-11-104-8/+8
* glsl: drop cache_fallbackTimothy Arceri2017-11-105-77/+55
* i965: properly initialize brw->cs.base.stage to MESA_SHADER_COMPUTEKenneth Graunke2017-11-101-0/+1
* intel/nir: Break the linking code into a helper in brw_nir.cJason Ekstrand2017-11-103-34/+40
* intel/nir: Add a helper for getting the NoIndirect maskJason Ekstrand2017-11-101-14/+19
* broadcom/vc5: Add vc5_drm.h to the release tarballAndreas Boll2017-11-101-0/+1
* targets/opencl: don't hardcode the icd file install to /etc/...Emil Velikov2017-11-101-1/+1
* intel/fs: Rework zero-length URB write handlingJason Ekstrand2017-11-101-29/+31
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