mesa.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	Use signbit() in IS_NEGATIVE and DIFFERENT_SIGNS	Matt Turner	2012-09-24	1	-19/+2
*	clover: Silence narrowing conversion warnings in resource.cpp.	Francisco Jerez	2012-09-24	1	-3/+3
*	clover: Handle NULL value for clEnqueueNDRangeKernel local_work_size	Tom Stellard	2012-09-24	1	-7/+6
*	i965/blorp: Increase Y alignment for multisampled stencil blits.	Paul Berry	2012-09-24	1	-2/+7
*	st/mesa: check for zero-size image in st_TestProxyTexImage()	Brian Paul	2012-09-24	1	-0/+5
*	mesa: Silence narrowing warnings in ff_fragment_shader's emit_texenv().	Kenneth Graunke	2012-09-23	1	-4/+4
*	radeon/llvm: support for interpolation intrinsics	Vincent Lejeune	2012-09-22	10	-2/+318
*	draw: fix non-indexed draw calls if there's an index buffer	Marek Olšák	2012-09-22	3	-8/+6
*	r600g: Fix build with LLVM compiler	Tom Stellard	2012-09-21	1	-1/+1
*	r600g: set QUANT_MODE on Cayman too	Marek Olšák	2012-09-22	1	-1/+2
*	r600g: use CS helpers to emit streamout state	Marek Olšák	2012-09-22	2	-33/+14
*	r600g: remove initialization of unused loop register tables	Marek Olšák	2012-09-22	2	-38/+0
*	r600g: remove now-unused SURFACE_BASE_UPDATE logic	Marek Olšák	2012-09-22	3	-9/+3
*	r600g: remove unused CB registers from register lists	Marek Olšák	2012-09-22	2	-87/+0
*	r600g: atomize framebuffer state	Marek Olšák	2012-09-22	11	-868/+664
*	r600g: don't snoop context state while building shaders	Marek Olšák	2012-09-22	3	-28/+43
*	meta: Add on demand compilation of per target shader programs	Anuj Phogat	2012-09-21	1	-57/+84
*	clover: Initialize height and depth to 1 for transfers	Tom Stellard	2012-09-21	1	-1/+1
*	pipe-loader: Remove a few debug_printfs	Tom Stellard	2012-09-21	2	-4/+0
*	radeon/llvm: Handle loads from the constants address space.	Tom Stellard	2012-09-21	2	-0/+10
*	radeon/llvm: Add support for v4f32 stores on R600	Tom Stellard	2012-09-21	3	-9/+27
*	radeon/llvm: Add support for i8 reads on R600	Tom Stellard	2012-09-21	3	-0/+25
*	radeon/llvm: Expand vector fadd and fmul on R600	Tom Stellard	2012-09-21	1	-0/+3
*	radeon/llvm: Add optimization for FP_ROUND	Tom Stellard	2012-09-21	2	-0/+27
*	radeon/llvm: Replace AMDGPU pow intrinsic with the llvm version	Tom Stellard	2012-09-21	4	-7/+26
*	i965/blorp: Fix narrowing warnings.	Paul Berry	2012-09-21	1	-3/+3
*	i965: Remove brw_set_predicate_inverse(p, true) from scratch offset code	Kenneth Graunke	2012-09-21	1	-1/+0
*	mesa: Don't override S3TC internalFormat if data is pre-compressed.	Kenneth Graunke	2012-09-20	1	-1/+1
*	i965/blorp: Add support for blits between SRGB and linear formats.	Kenneth Graunke	2012-09-20	2	-4/+8
*	mesa: Ignore SRGB when determining compatible resolve formats.	Kenneth Graunke	2012-09-20	1	-1/+2
*	gallium: mention PIPE_TIMEOUT_INFINITE in the fence_finish() comment	Brian Paul	2012-09-20	1	-1/+1
*	llvmpipe: fix overflow bug in total texture size computation	Brian Paul	2012-09-20	1	-2/+16
*	r600g/llvm: rs780/rs880 are r600 asics	Alex Deucher	2012-09-20	1	-2/+2
*	mesa: Allow glGetTexParameter of GL_TEXTURE_SRGB_DECODE_EXT	Ian Romanick	2012-09-20	1	-0/+12
*	r300/compiler: Use precomputed q values in the register allocator	Tom Stellard	2012-09-19	1	-1/+69
*	r300g: Init regalloc state during context creation	Tom Stellard	2012-09-19	8	-155/+204
*	r300/compiler: Don't create register classes for inputs	Tom Stellard	2012-09-19	1	-14/+1
*	ra: Add q_values parameter to ra_set_finalize()	Tom Stellard	2012-09-19	5	-5/+18
*	ra: Clarify usage of ra_set_node_reg()	Tom Stellard	2012-09-19	1	-0/+2
*	r600g: Invalidate texture cache when creating vertex buffers for compute v2	Tom Stellard	2012-09-19	1	-1/+3
*	r600g: Use LOOP_START_DX10 for loops	Tom Stellard	2012-09-19	3	-2/+11
*	r600g: Set the correct value of COLOR*_DIM for RATs	Tom Stellard	2012-09-19	1	-2/+2
*	r600g: Make sure to initialize DB_DEPTH_CONTROL register for compute	Tom Stellard	2012-09-19	1	-1/+3
*	r600g: Add some comments and debug printfs to compute code	Tom Stellard	2012-09-19	2	-5/+53
*	r600g: Add missing break to case statement	Tom Stellard	2012-09-19	1	-0/+1
*	radeon/llvm: Emit ISA for ALU instructions in the R600 code emitter	Michal Sciubidlo	2012-09-19	10	-167/+359
*	radeon/llvm: Only support 512 constant registers on R600	Tom Stellard	2012-09-19	1	-1/+1
*	Revert "mesa: consolidate subtexture x/y/width/height error checking code"	Brian Paul	2012-09-19	1	-73/+84
*	Revert "more comment"	Brian Paul	2012-09-19	1	-2/+4
*	Revert "mesa: clean-up and fix glCompressedTexSubImage error checking"	Brian Paul	2012-09-19	1	-81/+64