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* radeonsi: remove unused query codeMarek Olšák2018-04-054-77/+2
* radeonsi: use num_cs_dw_queries_suspendMarek Olšák2018-04-051-2/+6
* radeonsi: remove r600_pipe_common::need_gfx_cs_spaceMarek Olšák2018-04-053-17/+4
* radeonsi: remove r600_pipe_common::set_atom_dirtyMarek Olšák2018-04-053-5/+1
* radeonsi: remove r600_pipe_common::check_vm_faultsMarek Olšák2018-04-053-9/+2
* radeonsi: call CS flush functions directly whenever possibleMarek Olšák2018-04-058-24/+24
* radeonsi: skip DCC render feedback checking if color writes are disabledMarek Olšák2018-04-053-5/+23
* meson: Set .so version for xa like autotools doesDylan Baker2018-04-051-1/+3
* anv: Make blorp update the clear color.Rafael Antognolli2018-04-053-63/+66
* anv: Use clear address for HiZ fast clears too.Rafael Antognolli2018-04-053-3/+27
* anv: Emit the fast clear color address, instead of value.Rafael Antognolli2018-04-053-4/+70
* anv: Add a helper to extract clear color from the attachment.Rafael Antognolli2018-04-052-13/+21
* i965/surface_state: Emit the clear color address instead of value.Rafael Antognolli2018-04-051-0/+22
* i965/blorp: Update the fast clear value buffer.Rafael Antognolli2018-04-052-0/+29
* i965: Add aux_buf variable to simplify code.Rafael Antognolli2018-04-052-21/+14
* i965/miptree: Add new clear color BO for winsys aux buffersRafael Antognolli2018-04-051-0/+17
* i965/miptree: Add space to store the clear value in the aux surface.Rafael Antognolli2018-04-052-0/+33
* intel/blorp: Update clear color state buffer during fast clears.Rafael Antognolli2018-04-051-0/+48
* intel/blorp: Only copy clear color when doing a resolve.Rafael Antognolli2018-04-051-4/+9
* intel/blorp: Add support for fast clear address.Rafael Antognolli2018-04-051-5/+13
* intel/isl: Add support to emit clear value address.Rafael Antognolli2018-04-052-4/+23
* intel: Use Clear Color struct size.Rafael Antognolli2018-04-056-15/+35
* intel/genxml: Add Clear Color struct to gen10+.Rafael Antognolli2018-04-052-0/+18
* intel/genxml: Use a single field for clear color address on gen10.Rafael Antognolli2018-04-052-8/+6
* genxml: Preserve fields that share dword space with addresses.Rafael Antognolli2018-04-051-2/+6
* anv/image: Do not override lower bits of dword.Rafael Antognolli2018-04-052-15/+12
* radv: implement a fast prefetch path for the vertex stageSamuel Pitoiset2018-04-051-10/+30
* radv: rename radv_emit_prefetch() to radv_emit_prefetch_L2()Samuel Pitoiset2018-04-051-19/+11
* radv: use a mask for VBOs and shaders prefetchingSamuel Pitoiset2018-04-052-27/+51
* gallium/pp: fix MLAA shadersMarek Olšák2018-04-041-4/+4
* gallium/pp: use user constant buffersMarek Olšák2018-04-044-33/+25
* st/mesa: set stencil border color the same as intensityMarek Olšák2018-04-041-0/+2
* Fix use of alloca() without #include <c99_alloca.h>Jon Turney2018-04-041-0/+1
* radv: implement out-of-order rasterization when it's safe on VI+Samuel Pitoiset2018-04-046-3/+279
* radv: change blend_enable field to use four bits per CBSamuel Pitoiset2018-04-041-3/+5
* radv: scan which color blend attachments are enabledSamuel Pitoiset2018-04-041-0/+2
* radv: put more fields in radv_blend_stateSamuel Pitoiset2018-04-041-20/+17
* radv: do not always disable dual quad mode when chip has RbPlusSamuel Pitoiset2018-04-041-3/+17
* radv: don't use the SPI barrier management bug workaroundSamuel Pitoiset2018-04-041-0/+5
* radv: mask out high VM address bits in registers where neededSamuel Pitoiset2018-04-043-19/+19
* intel: compiler: silence compiler warningLionel Landwerlin2018-04-041-0/+1
* compiler/spirv: set is_shadow for depth comparitor sampling opcodesIago Toral Quiroga2018-04-041-1/+2
* i965: Extend the negative 32-bit deltas to 64-bitsSergii Romantsov2018-04-031-1/+1
* nir/lower_vec_to_movs: Only coalesce if the vec had a SSA destinationJason Ekstrand2018-04-031-1/+6
* anv: Fix close(fd) before import issue in vkCreateDmaBufImageINTELKevin Strasser2018-04-031-2/+2
* glsl: always call do_lower_jumps() after loop unrollingTimothy Arceri2018-04-041-0/+18
* vulkan/wsi/wayland: fix leaksJames Legg2018-04-031-0/+4
* st/mesa: Also use PIPE_FORMAT_R8G8B8A8_SRGB for framebuffer_sRGB.Jakob Bornecrantz2018-04-031-1/+2
* intel: gen-decoder: print all dword a field belongs toLionel Landwerlin2018-04-032-7/+9
* intel: genxml: decode variable length MI_LRILionel Landwerlin2018-04-0310-0/+40
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