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* egl/x11: Send invalidate to driver on copy_region path in swap_bufferDeepak Rawat2018-05-031-10/+13
* egl: check if colorspace/surface type is supportedJuan A. Suarez Romero2018-05-034-0/+21
* anv/device: expose shaderInt16 support in gen8+Iago Toral Quiroga2018-05-031-1/+1
* anv/pipeline: support SpvCapabilityInt16 in gen8+Iago Toral Quiroga2018-05-031-0/+1
* compiler/spirv: add implementation to check for SpvCapabilityInt16 supportIago Toral Quiroga2018-05-032-1/+4
* intel/compiler: implement 16-bit pack/unpack opcodesIago Toral Quiroga2018-05-031-0/+10
* compiler/spirv: implement 16-bit bitcastsIago Toral Quiroga2018-05-031-9/+22
* compiler/lower_64bit_packing: rename the pass to be more genericIago Toral Quiroga2018-05-037-9/+9
* nir/lower_64bit_packing: extend the pass to handle packing from / to 16-bit.Iago Toral Quiroga2018-05-031-5/+59
* nir: add opcodes for 16-bit packing and unpackingIago Toral Quiroga2018-05-031-0/+19
* intel/compiler: fix 16-bit comparisonsIago Toral Quiroga2018-05-031-8/+30
* intel/compiler: lower some 16-bit integer operations to 32-bitIago Toral Quiroga2018-05-031-0/+21
* compiler/nir: add a lowering pass to convert the bit size of ALU operationsIago Toral Quiroga2018-05-034-0/+134
* intel/compiler: support negate and abs of half float immediatesJose Maria Casanova Crespo2018-05-031-2/+4
* intel/compiler: fix brw_imm_w for negative 16-bit integersJose Maria Casanova Crespo2018-05-031-1/+1
* intel/compiler: fix 16-bit int brw_negate_immediate and brw_abs_immediateJose Maria Casanova Crespo2018-05-031-4/+8
* intel/compiler: implement nir_instr_type_load_const for 16-bit constantsJose Maria Casanova Crespo2018-05-031-0/+5
* intel/compiler: implement conversions from 16-bit int/float to boolIago Toral Quiroga2018-05-031-5/+11
* intel/compiler: implement conversion between float/int 16-bit typesIago Toral Quiroga2018-05-031-0/+4
* i965/compiler: handle conversion to smaller type in the lowering pass for thatIago Toral Quiroga2018-05-032-12/+7
* intel/compiler: fix isign for 16-bit integersIago Toral Quiroga2018-05-031-5/+12
* i965: Always try to create a logical contextChris Wilson2018-05-031-15/+14
* spirv: Apply OriginUpperLeft to FragCoordNeil Roberts2018-05-031-3/+3
* spirv: convert some operands for bitwise shift and bitwise ops to uint32Samuel Iglesias Gonsálvez2018-05-031-0/+35
* mesa: enable geom shaders in OpenGL 3.2 Compat profileTimothy Arceri2018-05-031-2/+1
* radv: UseEnumerateInstanceVersion for the default version.Bas Nieuwenhuizen2018-05-021-1/+1
* radv: Don't check the incoming apiVersion on CreateInstance.Bas Nieuwenhuizen2018-05-021-9/+0
* radv: Allow vkEnumerateInstanceVersion ProcAddr without instance.Bas Nieuwenhuizen2018-05-021-1/+1
* intel: aubinator: add an option to limit the number of decoded VBO linesLionel Landwerlin2018-05-021-16/+23
* intel: decoder: limit to the number decoded lines from VBOLionel Landwerlin2018-05-023-8/+17
* anv: Advertise variableMultisampleRateJason Ekstrand2018-05-021-1/+1
* nir: add missing dependency in meson.buildRob Clark2018-05-021-1/+1
* radv: fix multisample image copiesMatthew Nicholls2018-05-022-110/+196
* intel: Fix 3DSTATE_CONSTANT buffer decoding.Kenneth Graunke2018-05-021-15/+25
* intel: fix aubinator includeLionel Landwerlin2018-05-021-1/+1
* i965: Reuse batch decoder infrastructure rather than open coding it.Kenneth Graunke2018-05-023-223/+55
* intel: Give the batch decoder a callback to ask about state size.Kenneth Graunke2018-05-024-6/+28
* intel: Move batch decoder/disassembler from tools/ to common/Kenneth Graunke2018-05-027-11/+9
* i965: Allocate shadow batches to explicitly be the BO size.Kenneth Graunke2018-05-021-7/+5
* intel: batch-decoder: iterate VERTEX_BUFFER_STATE fieldsLionel Landwerlin2018-05-021-31/+39
* intel: decoder: fix starting dword of struct fieldsLionel Landwerlin2018-05-021-2/+3
* intel: decoder: document when fields should be usedLionel Landwerlin2018-05-021-3/+2
* intel: decoder: identify groups with fixed lengthLionel Landwerlin2018-05-022-6/+13
* intel: decoder: make the field iterator use more naturalLionel Landwerlin2018-05-022-30/+36
* nv50: Extract needed value bits without shifting them before calling bitcountVlad Golovkin2018-05-021-1/+1
* intel: activate the gl_BaseVertex loweringAntia Puentes2018-05-028-27/+11
* compiler/nir: Add conditional lowering for gl_BaseVertexAntia Puentes2018-05-022-0/+21
* intel: emit is_indexed_draw in the same VE than gl_DrawIDAntia Puentes2018-05-027-48/+78
* intel/compiler: Add uses_is_indexed_draw flagAntia Puentes2018-05-022-0/+5
* compiler: Add SYSTEM_VALUE_IS_INDEXED_DRAW and instrinsicsAntia Puentes2018-05-025-0/+14
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