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* i965: add brw_imm_dfConnor Abbott2016-05-102-0/+10
* i965/eu: Allow 3-src float ops with doublesTopi Pohjolainen2016-05-101-6/+18
* i965/disasm: fix disasm of 3-src doublesConnor Abbott2016-05-101-0/+1
* i965: Tell backend register about double precision typeTopi Pohjolainen2016-05-101-1/+2
* i965: Determine size of double precision float registerTopi Pohjolainen2016-05-101-0/+1
* i965: Lower DFRACEXP/DLDEXPTopi Pohjolainen2016-05-101-0/+1
* i965: use pack/unpackDouble loweringConnor Abbott2016-05-101-0/+1
* i965: use double lowering passConnor Abbott2016-05-102-0/+10
* freedreno/ir3: lower lrp when operating with double operandsSamuel Iglesias Gonsálvez2016-05-101-0/+1
* i965: enable lrp lowering for doublesSamuel Iglesias Gonsálvez2016-05-101-0/+1
* st/glsl_to_tgsi: brown paper bag for the input offsets fix.Dave Airlie2016-05-101-1/+1
* glsl: check geometry output vertices limits.Dave Airlie2016-05-101-0/+8
* mesa/vbo: fix check for zero aliases with 2/10/10/10Dave Airlie2016-05-101-1/+1
* nir/print: Print memory qualifiers in a variable declarationEduardo Lima Mitev2016-05-101-0/+7
* glsl: Apply memory qualifiers to vars inside named block interfacesEduardo Lima Mitev2016-05-101-7/+15
* st/glsl_to_tgsi: handle offsets from inputsDave Airlie2016-05-101-0/+9
* Revert "Revert "i965: Switch to scalar TCS by default.""Kenneth Graunke2016-05-091-1/+1
* i965: Actually assign binding table offsets for the TCS.Kenneth Graunke2016-05-091-0/+5
* i965: Clamp "Maximum VP Index" to 1 when gl_ViewportIndex isn't written.Kenneth Graunke2016-05-091-3/+10
* i965/hsw: Fix brw_store_data_imm*Jordan Justen2016-05-091-10/+12
* i965: Reimplement ARB_transform_feedback2 on Haswell and later.Kenneth Graunke2016-05-095-12/+318
* i965: Add a brw_load_register_reg64 helper.Kenneth Graunke2016-05-092-0/+20
* i965: Only enable ARB_query_buffer_object for newer kernels on Haswell.Kenneth Graunke2016-05-093-1/+15
* mesa/objectlabel: don't return info on genned but never bound textures.Dave Airlie2016-05-101-1/+1
* mesa: don't use genned but unnamed xfb objects.Dave Airlie2016-05-102-1/+14
* nv50/ir: silence unsupported TGSI_PROPERTY_CS_FIXED_BLOCK_*Samuel Pitoiset2016-05-091-0/+5
* mesa/compute: Fix indirect dispatch buffer size check on 32-bit systemsJordan Justen2016-05-091-1/+1
* freedreno/ir3: fix fallout from new block iteratorsRob Clark2016-05-091-1/+1
* radeonsi: workaround for tesselation on SINicolai Hähnle2016-05-091-0/+8
* radeonsi: always allocate export memory for pixel shadersNicolai Hähnle2016-05-091-5/+10
* radeonsi: expose performance counters as 64 bitNicolai Hähnle2016-05-092-16/+19
* nir/search: fix typoRob Clark2016-05-091-1/+1
* gallium: enable intel jitevents profilingTim Rowley2016-05-091-0/+9
* swr: Add missing break in query switch statement.Bruce Cherniak2016-05-091-0/+1
* freedreno/ir3: allow for additional VS sysval inputsRob Clark2016-05-091-2/+5
* r300g: add support for PIPE_FORMAT_x8R8G8B8_*Marek Olšák2016-05-092-15/+77
* Revert "i965: Always use Y-tiled buffers on SKL+"Daniel Stone2016-05-094-30/+8
* mesa/shader_query: add missing subroutines casesDave Airlie2016-05-091-0/+13
* spirv: Fix structure splitting with per-vertex interface arrays.Kenneth Graunke2016-05-071-1/+2
* compiler: Add a C wrapper for glsl_type::without_array().Kenneth Graunke2016-05-072-0/+7
* radeonsi: fix undefined behavior (memcpy arguments must be non-NULL)Nicolai Hähnle2016-05-071-1/+3
* radeonsi: fix some reported undefined left-shiftsNicolai Hähnle2016-05-071-3/+3
* gallium/radeon: clean left-shift undefined behaviorNicolai Hähnle2016-05-0711-3989/+3989
* gallium: fix various undefined left shifts into sign bitNicolai Hähnle2016-05-076-8/+8
* compiler/glsl: do not downcast list sentinelNicolai Hähnle2016-05-071-1/+4
* mesa/main: fix another undefined left shiftNicolai Hähnle2016-05-071-1/+1
* mesa/main: define _NEW_xxx flags as unsigned shiftsNicolai Hähnle2016-05-071-30/+30
* radeonsi: Compute correct LDS size for fragment shaders.Bas Nieuwenhuizen2016-05-061-3/+6
* vc4: Add support for loading immediate values in QIR.Eric Anholt2016-05-064-0/+32
* vc4: Make vc4_qpu_validate() produce more verbose failures.Eric Anholt2016-05-061-35/+71
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