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* i965: Be a bit more conservative about certain resolvesJason Ekstrand2017-06-074-8/+12
* i965/blorp: Move MCS allocation earlier for clearsJason Ekstrand2017-06-071-14/+14
* i965/blorp: Refactor do_single_blorp_clearJason Ekstrand2017-06-071-17/+23
* i965/blorp: Take an explicit fast clear op in resolve_colorJason Ekstrand2017-06-073-15/+18
* i965/miptree: Move color resolve on map to intel_miptree_mapJason Ekstrand2017-06-071-5/+1
* i965: Inline renderbuffer_att_set_needs_depth_resolveJason Ekstrand2017-06-074-21/+21
* i965: Get rid of intel_renderbuffer_resolve_*Jason Ekstrand2017-06-073-52/+5
* i965/miptree: Refactor intel_miptree_resolve_colorJason Ekstrand2017-06-076-38/+35
* i965/miptree: Clean up the depth resolve helpers a littleJason Ekstrand2017-06-071-40/+30
* i965/surface_state: Images can't handle CCS at allJason Ekstrand2017-06-071-6/+6
* i965: Mark depth surfaces as needing a HiZ resolve after blittingJason Ekstrand2017-06-071-0/+2
* st_glsl_to_tgsi: cleanup variable storage search.Dave Airlie2017-06-081-6/+4
* mesa/main: fix gl_buffer_index enum comparisonRob Herring2017-06-073-7/+8
* glsl: fix bounds check in blob_overwrite_bytesRob Herring2017-06-071-1/+1
* st_glsl_to_tgsi: replace variables tracking list with a hash tableDave Airlie2017-06-081-13/+33
* st_glsl_to_tgsi: rewrite rename registers to use array fully.Dave Airlie2017-06-081-26/+23
* st_glsl_to_tgsi: bump index back up to 32-bitDave Airlie2017-06-081-2/+2
* util/u_queue: fix a use-before-initialization race for queue->threadsMarek Olšák2017-06-072-17/+14
* ac/nir: remove another unused variableGrazvydas Ignotas2017-06-081-1/+0
* radv/meta: remove an unused variableGrazvydas Ignotas2017-06-081-1/+0
* ac/nir: convert several ifs to a switchGrazvydas Ignotas2017-06-081-9/+11
* ac/nir: mark some arguments constGrazvydas Ignotas2017-06-081-30/+31
* radeonsi: Use libdrm to get chipset nameSamuel Li2017-06-073-1/+20
* util: Add extern c to u_dynarray.hThomas Helland2017-06-071-0/+8
* nir: Delete nir_array.hThomas Helland2017-06-072-100/+0
* nir: Port to u_dynarrayThomas Helland2017-06-072-5/+5
* nir: Remove unused includeThomas Helland2017-06-071-1/+0
* util: Port nir_array functionality to u_dynarrayThomas Helland2017-06-077-18/+45
* util: Remove unused includes and convert to lower-case memory opsThomas Helland2017-06-071-15/+12
* util: Move u_dynarray to src/utilThomas Helland2017-06-073-1/+1
* gallium: Add missing includesThomas Helland2017-06-074-0/+4
* radeonsi: update clip_regs on shader state changes only when it's neededMarek Olšák2017-06-071-3/+32
* radeonsi: precompute some fields for PA_CL_VS_OUT_CNTL in si_shader_selectorMarek Olšák2017-06-074-16/+25
* radeonsi: add a new helper si_get_vsMarek Olšák2017-06-072-17/+19
* radeonsi: isolate real framebuffer changes from the decompression passes (v3)Samuel Pitoiset2017-06-073-2/+28
* radeonsi: do EarlyCSEMemSSA LLVM passMarek Olšák2017-06-071-0/+2
* radeonsi: remove 8 bytes from si_shader_keyMarek Olšák2017-06-073-14/+17
* radeonsi: move PSIZE and CLIPDIST unique IO indices after GENERICMarek Olšák2017-06-072-8/+14
* svga: Always set the alpha value to 1 when sampling using an XRGB viewThomas Hellstrom2017-06-071-13/+30
* svga: Fix imported surface view creationThomas Hellstrom2017-06-074-11/+33
* svga: Set alpha to 1 for non-alpha viewsThomas Hellstrom2017-06-071-0/+18
* svga: Allow format differences in 16-bit RGBA surface sharingThomas Hellstrom2017-06-071-1/+5
* dri/vmwgfx: Disable a couple of glx extensions also for Ubuntu unity / compizThomas Hellstrom2017-06-071-0/+4
* dri: Turn of a couple of glx extensions for gnome-shell on vmwgfx.Thomas Hellstrom2017-06-071-0/+7
* st/dri: Allow gallium drivers to turn off two GLX extensionsThomas Hellstrom2017-06-071-0/+2
* dri: Optionally turn off a couple of GLX extensions based on driconf optionsThomas Hellstrom2017-06-073-3/+25
* st/dri: Allow dri users to query also driver optionsThomas Hellstrom2017-06-071-1/+64
* radeonsi: clean up decompress blend state namesMarek Olšák2017-06-074-10/+10
* gallium/radeon: clean up a misleading statement from the old daysMarek Olšák2017-06-071-4/+1
* radeonsi: don't use 1D tiling for Z/S on VI to get TC-compatible HTILEMarek Olšák2017-06-071-3/+13
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