summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'master' into asm-shader-rework-1Ian Romanick2009-08-18553-20469/+25403
|\ | | | | | | | | Conflicts: src/mesa/shader/arbprogparse.c
| * r300: fix big endian buildDave Airlie2009-08-181-0/+1
| |
| * gallium: memset() tgsi_exec_machine to all zeros in tgsi_exec_machine_create()Brian Paul2009-08-171-8/+2
| | | | | | | | This fixes invalid values for CondStackTop, LoopStackTop, etc.
| * r600: fix counting error after the last commitAlex Deucher2009-08-171-1/+1
| |
| * r600: make sure the number of indices is validAlex Deucher2009-08-171-1/+54
| | | | | | | | | | | | make sure the number of indices is valid for the requested prim type. glxgears sends invalid quad strips with only 2 indices for example.
| * radeon: remove RADEON_DEBUG_BO stuffAlex Deucher2009-08-1710-237/+16
| | | | | | | | | | This stuff was a vestige of the r600 bring up and now mostly serves to periodically break the build.
| * nv50: remove a few cases of directly casting struct pipe_contextMaarten Maathuis2009-08-172-3/+3
| |
| * nv50: borrow some flushing code from the ddxMaarten Maathuis2009-08-171-3/+11
| | | | | | | | | | - This fixes neverball corruption. - I'm unsure about what we're actually flushing here.
| * gallium: Make PIPE_TRANSFER_{READ,WRITE,READ_WRITE} bitmask friendly.Maarten Maathuis2009-08-171-3/+3
| |
| * nv50: whitespace fixes and deobfuscationMaarten Maathuis2009-08-179-69/+85
| |
| * cell: fix incorrect pipe_transfer testsBrian Paul2009-08-171-2/+4
| | | | | | | | The value is an enum, not a bitmask.
| * r300: split vbo rendering with big drawarray caseJerome Glisse2009-08-171-4/+15
| | | | | | | | | | Split vbo rendering when the number of elements requested by drawarrays is bigger than 65536.
| * nv50: fix stencil stateChristoph Bumiller2009-08-171-6/+6
| | | | | | | | | | | | | | It's the front stencil methods that have contiguous offsets, not the back ones. Unfortunately the names in the header still have FRONT/BACK reversed, so I'm using hex values until it gets updated.
| * radeon: turn off bo debuggingDave Airlie2009-08-171-1/+1
| |
| * r300: disable ZTOP only when occlusion queries are usedMaciej Cencora2009-08-161-1/+3
| |
| * Merge branch 'oq'Maciej Cencora2009-08-1614-11/+361
| |\
| | * r300: enable ARB_occlusion_queryMaciej Cencora2009-08-151-0/+8
| | | | | | | | | | | | | | | Supported only on HW with TCL block and with proper radeon drm. Required minimum radeon drm version is 1.30 or KMS.
| | * radeon: add flag for drm OQ supportMaciej Cencora2009-08-152-5/+8
| | |
| | * r300: temporary occlusion query hackMaciej Cencora2009-08-151-1/+1
| | |
| | * r300: clear not_flushed OQ list after flushMaciej Cencora2009-08-153-4/+15
| | |
| | * r300/oq: add some debugging infoMaciej Cencora2009-08-151-0/+21
| | |
| | * r300: add occlusion queries supportMaciej Cencora2009-08-158-1/+308
| | | | | | | | | | | | | | | | | | | | | TODO: - use proper interface for checking if bo is idle when it's available - disable ZTOP only when needed - make it work under KMS
| * | nv50: avoid a NULL-ptr dereference when the pipe context changesMaarten Maathuis2009-08-151-1/+26
| | | | | | | | | | | | - We cannot assume all state objects are present when the pipe context changes.
| * | nv50: align registers used with TEX to 4Christoph Bumiller2009-08-151-1/+2
| |/ | | | | | | | | | | | | | | The TEX instruction is passed the first index of a contiguous range of 4 TEMP registers that contain coordinates / LOD and, after execution, the texel values. It seems the first index is required to be a multiple of 4 on some (older ?) cards.
| * radeon space: realign with drm space check codeDave Airlie2009-08-151-1/+1
| |
| * r300: fixup space checks since VBO codeDave Airlie2009-08-151-16/+9
| | | | | | | | Hopefully this gets the ordering correct so the space checks don't fail.
| * r300: add just in case warn I don't think this can actually happenDave Airlie2009-08-151-0/+5
| |
| * radeon: enable vertex splitting for IBsDave Airlie2009-08-152-13/+47
| | | | | | | | | | | | Based on Maciej's code, just fixed up the alignments for INDX_BUFFER ut2004 runs AS-Convoy
| * i965: disable bounds checking on arrays with stride 0Roland Scheidegger2009-08-151-1/+1
| | | | | | | | | | | | | | | | if stride is 0 we cannot use count as max index for bounds checking, since the hardware will simply return 0 as data for indices failing bounds check. If stride is 0 any index should be valid hence simply disable bounds checking in this case. This fixes bugs introduced with e643bc5fc7afb563028f5a089ca5e38172af41a8.
| * i965: Add support for GL_ARB_seamless_cube_mapIan Romanick2009-08-142-17/+28
| |
| * Regenerate files for GL_ARB_seamless_cube_mapIan Romanick2009-08-142-328/+342
| |
| * Infrastructure for GL_ARB_seamless_cube_mapIan Romanick2009-08-147-0/+34
| |
| * Regenerate files for GL_APPLE_flush_buffer_rangeIan Romanick2009-08-149-3395/+3675
| |
| * Merge branch 'vbo_clean'Maciej Cencora2009-08-1513-334/+621
| |\ | | | | | | | | | | | | Conflicts: src/mesa/drivers/dri/r300/r300_draw.c
| | * r300: mark VBO buffer objects as persistentMaciej Cencora2009-08-151-3/+6
| | |
| | * r300: unmap buffer objects after usageMaciej Cencora2009-08-141-1/+11
| | |
| | * r300: remove broken vertex splittingMaciej Cencora2009-08-142-13/+5
| | | | | | | | | | | | Revert to previous behaviour of dropping to big render operations.
| | * r300: rework index buffer setupMaciej Cencora2009-08-143-119/+126
| | | | | | | | | | | | Copy elements directly to DMA bo to get rid of one memcpy, and prepare for using VBOs for index buffer.
| | * r300: remove unused software TNL pathMaciej Cencora2009-08-144-118/+6
| | | | | | | | | | | | This doesn't remove software TCL path - so RS480 and RS690 work as before.
| | * r300: use VBOs for vertex attributesMaciej Cencora2009-08-143-84/+187
| | |
| | * r300: add required symlinksMaciej Cencora2009-08-142-0/+2
| | | | | | | | | | | | Reported by adamk on #radeon
| | * radeon: handle debug versions of radeon_bo_openMaciej Cencora2009-08-141-1/+10
| | |
| | * radeon: add VBO support (not enabled yet)Maciej Cencora2009-08-143-1/+271
| | |
| | * radeon: export emitvec* functionsMaciej Cencora2009-08-142-2/+4
| | |
| | * radeon: constify some parametersMaciej Cencora2009-08-142-8/+8
| | |
| * | mesa: append uniform values to the log file the first time we use a shaderBrian Paul2009-08-142-0/+28
| | | | | | | | | | | | | | | This info is essential to using/debugging a shader outside of its normal application.
| * | mesa: also pass the GPU program to _mesa_append_uniforms_to_file()Brian Paul2009-08-142-3/+5
| | | | | | | | | | | | We want the post-link program at this points.
| * | vbo: call _mesa_valid_to_render()Brian Paul2009-08-141-4/+2
| | |
| * | Merge branch 'mesa_7_5_branch'Brian Paul2009-08-145-150/+178
| |\ \
| | * | Allow external settings of MAX_WIDTH/HEIGHT.Brian Paul2009-08-141-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Conditionalize MAX_WIDTH / MAX_HEIGHT defines so that users can set them via CFLAGS. (cherry picked from master, commit 66bc17e80e22d8f205cc02171b1c266feab6631f)
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-04 08:12:05 +0000