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* nir: use nir_foreach_ssa_def for indexing ssa defsJason Ekstrand2015-02-191-23/+5
| | | | | | | This is both simpler and more correct. The old code didn't properly index load_const instructions. Reviewed-by: Connor Abbott <[email protected]>
* nir/from_ssa: Use the nir_block_dominance function instead of our ownJason Ekstrand2015-02-191-7/+2
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir/dominance: Add a constant-time mechanism for comparing blocksJason Ekstrand2015-02-192-0/+39
| | | | | | | | | This is mostly thanks to Connor. The idea is to do a depth-first search that computes pre and post indices for all the blocks. We can then figure out if one block dominates another in constant time by two simple comparison operations. Reviewed-by: Connor Abbott <[email protected]>
* nir/dominance: Expose the dominance intersection functionJason Ekstrand2015-02-192-0/+24
| | | | | | | | | | Being able to find the least common anscestor in the dominance tree is a useful thing that we may want to do in other passes. In particular, we need it for GCM. v2: Handle NULL inputs by returning the other block Reviewed-by: Connor Abbott <[email protected]>
* st/mesa: lower DFRACEXP/DLDEXP when they are not supportedIlia Mirkin2015-02-191-0/+3
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* st/mesa: disable lowering of dops to dfrac when dround is availableIlia Mirkin2015-02-191-7/+6
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* st/mesa: add support for new double opcodesIlia Mirkin2015-02-191-1/+5
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* gallium: add shader cap for dldexp/dfracexp supportIlia Mirkin2015-02-198-0/+10
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* gallium: add a cap to enable double rounding opcodesIlia Mirkin2015-02-198-1/+15
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* gallium: add some more double opcodes to avoid unnecessary loweringIlia Mirkin2015-02-193-1/+50
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* st/mesa: add st fp64 support (v7.1)Dave Airlie2015-02-202-125/+460
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support to the state tracker for ARB_gpu_shader_fp64. The details are explained in comments within the code. v2 : add double to int/unsigned conversion v3: handle fp64 consts better v4: use DRSQ v4.1: add d2b v4.2: drop DDIV v5: split out some prep patches. v5.1: add some comments. v5.2: more comments v6: simplify down the double instruction generation loop. v7: Merge Ilia's two cleanup patches. v7.1: minor fixups for Ilia patch + cleanups Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa/st_tgsi_to_glsl: prepare add_constant for fp64Dave Airlie2015-02-201-20/+21
| | | | | | | | This just moves stuff around a little to make the next patch cleaner. Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* st/glsl_to_tgsi: convert dst to an arrayDave Airlie2015-02-201-65/+65
| | | | | | | | This is just prep work for fp64 support where we need an array of 2 dst values. Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965: just avoid warnings with fp64Dave Airlie2015-02-205-0/+42
| | | | | | | This just fills in some blanks to avoid warnings in the i965 driver. Reviewed-by: Chris Forbes <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* glsl: Add compute to _mesa_shader_stage_to_string(); use unreachable.Kenneth Graunke2015-02-191-2/+2
| | | | | | | | This is basically Ian's review feedback for my patch that added _mesa_shader_stage_to_abbrev() - it just makes both consistent again. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/vec4: Print "VS" or "GS" when compiles fail, not "vec4".Kenneth Graunke2015-02-191-1/+1
| | | | | | | | | | This is now trivial to do right. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/vec4: Replace debug_flag with debug_enabled.Kenneth Graunke2015-02-196-10/+5
| | | | | | | | | | | backend_visitor now handles this, so we can delete the vec4_visitor specific code. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Make scheduler cycle estimates use the proper stage name.Kenneth Graunke2015-02-191-5/+6
| | | | | | | | | | | | | | | Previously, the vec4 backend labeled shaders as "vec4" - now it uses the specific names "VS" and "GS". The FS backend now correctly prints "VS" for vertex shaders (rather than "fs"). It also prints "FS" instead of "fs" for fragment shaders; preserving that behavior didn't seem essential. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/fs: Un-hardcode DEBUG_WM, "FS", and "fragment".Kenneth Graunke2015-02-192-7/+8
| | | | | | | | | | These code paths can (or will) be used for other shader stages. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Create backend_visitor fields for debugging messages.Kenneth Graunke2015-02-192-0/+6
| | | | | | | | | | | | | We introduce three new fields in backend_visitor: - debug_enabled: whether or not INTEL_DEBUG & DEBUG_<stage flag> - stage_name: "vertex", "fragment", etc. for use in messages - stage_abbrev: "VS", "FS", etc. for use in messages Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Add a function to translate MESA_SHADER_* into DEBUG_* enums.Kenneth Graunke2015-02-192-0/+15
| | | | | | | | | | | | When compiling, we have a gl_shader_stage (MESA_SHADER_*) enum, and want to know whether debugging is enabled for that stage. This allows us to easily translate it into the corresponding debug flag. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* glsl: Create a _mesa_shader_stage_to_abbrev() function.Kenneth Graunke2015-02-192-0/+20
| | | | | | | | | | | | | This is similar to _mesa_shader_stage_to_string(), but returns "VS" instead of "vertex". v2: Use unreachable() and add MESA_SHADER_COMPUTE (requested by Ian). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/fs: Use VARYING_SLOT checks rather than strcmp().Kenneth Graunke2015-02-192-3/+3
| | | | | | | | | | | | | | Comparing the location field is equivalent and more efficient. We'll also need this when we start using NIR for ARB programs, as our NIR converter will set the location field correctly, but probably won't use the GLSL names for these concepts. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/fs: Remove type parameter from emit_vs_system_value().Kenneth Graunke2015-02-192-5/+4
| | | | | | | | | | | Every VS system value has type D. We can always add this back if that changes, but for now, it's extra typing. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* glsl: add lowering for double divide to rcp/mulDave Airlie2015-02-201-3/+4
| | | | | | | | It looks like no hw does div anyways, so we should just lower at the GLSL level. Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* softpipe/tgsi: expose doubles for softpipe.Dave Airlie2015-02-201-1/+1
| | | | | Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi: add support for flt64 constantsDave Airlie2015-02-208-6/+113
| | | | | | | | | | | | | | These act like flt32 except they take up two slots, and you can only add 2 x flt64 constants in one slot. The main reason they are different is we don't want to match half a flt64 constants against a flt32 constant in the matching code, we need to make sure we treat both parts of the flt64 as an single structure. Cleaned up printing/parsing by Ilia Mirkin <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium: add double opcodes and TGSI execution (v4.2)Dave Airlie2015-02-204-30/+876
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for a set of double opcodes to TGSI. It is an update of work done originally by Michal Krol on the gallium-double-opcodes branch. The opcodes have a hint where they came from in the header file. v2: add unsigned/int <-> double v2.1: update docs. v3: add DRSQ (Glenn), fix review comments (Glenn). v4: drop DDIV v4.1: cleanups, fix some docs bugs, (Ilia) rework store_dest and fetch_source fns. (Ilia) 4.2: fixup float comparisons (Ilia) This is based on code by Michael Krol <[email protected]> Roland and Glenn also reviewed earlier versions. Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium/util: indentation fixBrian Paul2015-02-191-3/+3
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* st/mesa: add GSL_TYPE_DOUBLE, new ir_unop_* switch casesBrian Paul2015-02-191-0/+12
| | | | | | | | To silence compiler warnings about unhandled switch cases. v2: move GSL_TYPE_DOUBLE case to the "Invalid type in type_size" section, per Ilia. Reviewed-by: Ilia Mirkin <[email protected]>
* nir: add missing GLSL_TYPE_DOUBLE case in type_size()Brian Paul2015-02-191-0/+1
| | | | | | | To silence compiler warning about unhandled switch case. v2: move GLSL_TYPE_DOUBLE to the "not reached" section, per Ilia. Reviewed-by: Ilia Mirkin <[email protected]>
* st/mesa: fix sampler view reference counting bug in glDraw/CopyPixelsBrian Paul2015-02-191-6/+9
| | | | | | | | | | | Use pipe_sampler_view_reference() instead of ordinary assignment. Also add a new sanity check assertion. Fixes piglit gl-1.0-drawpixels-color-index test crash. But note that the test still fails. Cc: "10.4, 10.5" <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* swrast: fix multiple color buffer writingBrian Paul2015-02-191-11/+14
| | | | | | | | | | If a fragment program wrote to more than one color buffer, the first fragment color got replicated to all dest buffers. This fixes 5 piglit FBO tests, including fbo-drawbuffers-arbfp. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45348 Cc: "10.4, 10.5" <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: remove unused _math_trans_4chan()Brian Paul2015-02-192-31/+0
| | | | | Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Calculate register allocation q values manually.Francisco Jerez2015-02-191-1/+17
| | | | | | | | | | | | This fixes a regression in the running time of Piglit introduced by commit 78e9043475d4bed8b50f7e413963c960fa0935bb, which increased the number of register allocation classes set up by the VEC4 back-end from 2 to 16. The algorithm used by ra_set_finalize() to calculate them is unnecessarily expensive, do it manually like the FS back-end does. Reported-by: Mark Janes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Don't compact instructions with unmapped bits.Francisco Jerez2015-02-191-0/+53
| | | | | | | | | | | | | | | | | Some instruction bits don't have a mapping defined to any compacted instruction field. If they're ever set and we end up compacting the instruction they will be forced to zero. Avoid using compaction in such cases. v2: Align multiple lines of an expression to the same column. Change conditional compaction of 3-source instructions to an assertion. (Matt) v3: The 3-source instruction bit 105 is part of SourceIndex on CHV. Add assertion that reserved bit 7 is not set. (Matt) Document overlap with UIP and 64-bit immediate fields. v4: Make some more unmapped bit checks assertions. (Matt) Reviewed-by: Matt Turner <[email protected]>
* i965: Handle F16TO32/F32TO16 with dword src/dst consistently on both back-ends.Francisco Jerez2015-02-191-2/+12
| | | | | | | | | | | | | | Due to the way it's implemented in hardware, the F16TO32/F32TO16 instructions require the source/destination register to be of some 16-bit type in Align1 mode, while they require it to be some 32-bit type in Align16 mode (and as an undocumented feature the high 16 bits of the destination register are zeroed out in the case of the F32TO16 instruction on Gen7). Make their behaviour consistent so you can specify a 32 bit register type as source or destination and get predictable results in the most significant bits no matter what access mode is being used. Reviewed-by: Matt Turner <[email protected]>
* i965/gen8: Fix F32TO16 in vec4 mode if the source and destination registers ↵Francisco Jerez2015-02-191-9/+27
| | | | | | | | | | alias. We cannot zero out the destination register if it overlaps with the source. Use an Align1 instruction instead to zero out the high 16 bits after the conversion to half float. Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Replace ud_reg_to_w() with a more general helper function.Francisco Jerez2015-02-192-24/+25
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Don't attempt to reduce swizzles of send from GRF instructions.Francisco Jerez2015-02-191-1/+2
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Fix constant propagation across different types.Francisco Jerez2015-02-191-0/+10
| | | | | | | | | | If the source type differs from the original type of the constant we need to bit-cast it before propagating, otherwise the original type information will be lost. If the constant was a vector float there isn't much we can do, because the result of bit-casting the component values of a vector float cannot itself be represented as an immediate. Reviewed-by: Matt Turner <[email protected]>
* glsl: A shader cannot redefine or overload built-in functions in GLSL ES 3.00Samuel Iglesias Gonsalvez2015-02-193-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | Create a new search function to look for matching built-in functions by name and use it for built-in function redefinition or overload in GLSL ES 3.00. GLSL ES 3.0 spec, chapter 6.1 "Function Definitions", page 71 "A shader cannot redefine or overload built-in functions." While in GLSL ES 1.0 specification, chapter 8 "Built-in Functions" "User code can overload the built-in functions but cannot redefine them." So this check is specific to GLSL ES 3.00. This patch fixes the following dEQP tests: dEQP-GLES3.functional.shaders.functions.invalid.overload_builtin_function_vertex dEQP-GLES3.functional.shaders.functions.invalid.overload_builtin_function_fragment dEQP-GLES3.functional.shaders.functions.invalid.redefine_builtin_function_vertex dEQP-GLES3.functional.shaders.functions.invalid.redefine_builtin_function_fragment No piglit regressions. Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Adds check for integer internal format and num samples in ↵Eduardo Lima Mitev2015-02-191-0/+10
| | | | | | | | | | | | | glRenderbufferStorageMultisample Per GLES3 specification, section 4.4 Framebuffer objects page 198, "If internalformat is a signed or unsigned integer format and samples is greater than zero, then the error INVALID_OPERATION is generated.". Fixes 1 dEQP test: * dEQP-GLES3.functional.negative_api.buffer.renderbuffer_storage_multisample Reviewed-by: Matt Turner <[email protected]>
* mesa: Returns correct error values from gl(Get)SamplerParameter*() on GL-ES 3.0+Eduardo Lima Mitev2015-02-191-12/+60
| | | | | | | | | | | | | | | | | | | '3.8.2 Sampler Objects' section of the GL-ES 3.0 specification states: "An INVALID_OPERATION error is generated if sampler is not the name of a sampler object previously returned from a call to GenSamplers." In desktop GL, an GL_INVALID_VALUE is returned instead. Fixes 6 dEQP failing tests: * dEQP-GLES3.functional.negative_api.shader.get_sampler_parameteriv * dEQP-GLES3.functional.negative_api.shader.get_sampler_parameterfv * dEQP-GLES3.functional.negative_api.shader.sampler_parameteri * dEQP-GLES3.functional.negative_api.shader.sampler_parameteriv * dEQP-GLES3.functional.negative_api.shader.sampler_parameterf * dEQP-GLES3.functional.negative_api.shader.sampler_parameterfv Reviewed-by: Matt Turner <[email protected]>
* glsl: remove bogus 'd' constant qualifiersIlia Mirkin2015-02-191-2/+2
| | | | | | | | | 0.0 is a double anyways. Apparently my version of gcc was happy with 0.0d as well, but this is not true of all compilers. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89218 Signed-off-by: Ilia Mirkin <[email protected]>
* st/mesa: don't die for ETC2 formats when no driver supportIlia Mirkin2015-02-191-0/+3
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nir: Add an ALU op builder kind of like ir_builder.hEric Anholt2015-02-185-0/+175
| | | | | | | | | | | | | | | | | v2: Rebase on the nir_opcodes.h python code generation support. v3: Use SSA values, and set an appropriate writemask on dot products. v4: Make the arguments be SSA references as well. This lets you stack up expressions in the arguments of other expressions, at the cost of having to insert a fmov/imov if you want to swizzle. Also, add the generated file to NIR_GENERATED_FILES. v5: Use more pythonish style for iterating the list. v6: Infer the size of the dest from the size of the srcs, and auto-swizzle a single small src out to the appropriate size. v7: Add little helpers for initializing the struct, add a typedef for the struct like other nir types have. Reviewed-by: Kenneth Graunke <[email protected]> (v6) Reviewed-by: Connor Abbott <[email protected]> (v7)
* glsl/tests: add DOUBLE typesIlia Mirkin2015-02-191-0/+9
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* glsl: add a lowering pass for frexp/ldexp with double argumentsIlia Mirkin2015-02-192-1/+279
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* glsl: lower double optional passes (v2)Dave Airlie2015-02-192-0/+176
| | | | | | | | | | | | These lowering passes are optional for the backend to request, currently the TGSI softpipe backend most likely the r600g backend would want to use these passes as is. They aim to hit the gallium opcodes from the standard rounding/truncation functions. v2: also lower floor in mod_to_floor Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
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