summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Collapse)AuthorAgeFilesLines
* softpipe: use tgsi_shader_info fields for fragcoord origin, center, etc.Brian Paul2011-07-214-17/+5
|
* tgsi: add info fields for fragcoord origin, center, etcBrian Paul2011-07-212-10/+31
|
* softpipe: remove obsolete commentBrian Paul2011-07-211-4/+0
|
* softpipe: rename a functionBrian Paul2011-07-211-7/+7
|
* st/mesa: more helpful debug message in destroy_program_variants_cb()Brian Paul2011-06-081-2/+2
|
* svga: fix typos, update commentsBrian Paul2011-06-081-7/+5
|
* glx: Remove some GLX_USE_APPLEGL guards around glapiJeremy Huddleston2011-06-081-7/+3
| | | | | | Now that we're using glapi, we don't need some GLX_USE_APPLEGL ifdef-foo Signed-off-by: Jeremy Huddleston <[email protected]>
* darwin: Use -fvisibility=hidden to set default symbol visibilityJeremy Huddleston2011-06-082-20/+7
| | | | Signed-off-by: Jeremy Huddleston <[email protected]>
* intel: Request DRI2 buffers for separate stencil and hizChad Versace2011-06-083-14/+444
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When it is sensible to do so, 1) intelCreateBuffer() now attaches separate depth and stencil buffers to the framebuffer it creates. 2) intel_update_renderbuffers() requests for the framebuffer a separate stencil buffer (DRI2BufferStencil). The criteria for "sensible" is: - The GLX config has nonzero depth and stencil bits. - The hardware supports separate stencil. - The X driver supports separate stencil, or its support has not yet been determined. If the hardware supports hiz too, then intel_update_renderbuffers() also requests DRI2BufferHiz. If after requesting DRI2BufferStencil we determine that X driver did not actually support separate stencil, we clean up the mistake and never ask for DRI2BufferStencil again. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add assertions to intelCreateBuffer()Chad Versace2011-06-081-3/+12
| | | | | | | | | | | | | | | Assert that the GLX config has an expected depth/stencil bit combination: one of d24/s8, d16/s0, d0/s0. These are the only depth/stencil configurations that we advertise. Remove the check for software stencil, because given the assertions' constraints the check always fails. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Refactor intel_update_renderbuffers()Chad Versace2011-06-081-111/+212
| | | | | | | | | | | | | | | | | | | | | | Extract the code that queries DRI2 to obtain the DRIdrawable's buffers into intel_query_dri2_buffers_no_separate_stencil(). Extract the code that assigns the DRI buffer's DRM region to the corresponding renderbuffer into intel_process_dri2_buffer_no_separate_stencil(). Rationale --------- The next commit enables intel_update_renderbuffers() to query for separate stencil and hiz buffers. Without separating the separate-stencil and no-separate-stencil paths, intel_update_renderbuffers() degenerates into an impenetrable labyrinth of if-trees. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add function intel_renderbuffer_set_hiz_region()Chad Versace2011-06-082-0/+17
| | | | | | | | | | | It's the analog of intel_renderbuffer_set_region(), but for the hiz region of course. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel/intel_context.c: Remove unused functionsChad Versace2011-06-081-48/+0
| | | | | | | | | | | Remove functions intel_override_hiz() and intel_override_separate_stencil(). They are now located in intel_screen.c. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add flags to intel_screen for hiz and separate stencilChad Versace2011-06-083-7/+73
| | | | | | | | | | | | | | | | | | | | | Add the fields below to intel_screen. The expression in parens is the value to which intelInitScreen2() currently sets the field. GLboolean hw_has_separate_stencil (true iff gen >= 7) GLboolean hw_must_use_separate_stencil (true iff gen >= 7) GLboolean hw_has_hiz (always false) enum intel_dri2_has_hiz dri2_has_hiz (INTEL_DRI2_HAS_HIZ_UNKNOWN) The analogous fields in intel_context now inherit their values from intel_screen. When hiz and separate stencil become completely implemented for a given chipset, then the respective fields need to be enabled. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Define enum intel_dri2_has_hizChad Versace2011-06-081-0/+56
| | | | | | | | | | | | | ... which indicates if the X driver supports DRI2BufferHiz and DRI2BufferStencil. I'm placing this in its own commit due to the large comment block. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Define span functions for S8 renderbuffersChad Versace2011-06-081-0/+64
| | | | | | | | | Since the stencil buffer is interleaved, the generic Mesa renderbuffer accessors do not suffice. Custom span functions are necessary. Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965/brw: Emit state for hiz and separate stencil buffersChad Versace2011-06-082-9/+107
| | | | | | | | | | When emitting 3DSTATE_DEPTH_BUFFER, also emit 3DSTATE_HIER_DEPTH_BUFFER if there is a hiz buffer. Ditto for 3DSTATE_STENCIL_BUFFER and a separate stencil buffer. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* st/egl: set EGL_ALPHA_MASK_SIZEChia-I Wu2011-06-091-0/+4
|
* mesa: merge glapidispatch.h into dispatch.hChia-I Wu2011-06-088-12298/+12257
| | | | | | | | | glapidispatch.h was located in glapi and shared with mesa core. Because the way it was shared, mesa core must include it indirectly via main/dispatch.h. Now that it is no longer needed by glapi and is located in core mesa, merging it with main/dispatch.h to avoid wrong uses.
* mesa: fix function remapping for dlistChia-I Wu2011-06-081-1/+0
| | | | | | glapidispatch.h should not be included directly. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36282
* mesa: fix GLES remap table setup againChia-I Wu2011-06-082-11/+16
| | | | | | | | | Generate different glapidispatch.h's for GL and GLES. For GLES, we want a local remap table. This reverts commit 5af46e836073d2112b147b524e441bdb808cc128. The commit will break GL remap table setup when main/glapidispatch.h is regenerated.
* r600g: fix mixup in GPR resource reg setupAlex Deucher2011-06-081-3/+10
| | | | | | | GLOBAL_GPR regs should be 0. Need to set the number of temp regs in SQ_GPR_RESOURCE_MGMT_1. Signed-off-by: Alex Deucher <[email protected]>
* vbo: run 'indent' on vbo_save_api.cBrian Paul2011-06-081-362/+456
|
* vbo: rename DO_FALLBACK -> dlist_fallbackBrian Paul2011-06-081-9/+9
|
* vbo: remove node->count > 0 test in vbo_save_playback_vertex_list()Brian Paul2011-06-081-9/+11
| | | | | | | | | | | | | | See piglit dlist-fdo31590.c test and http://bugs.freedesktop.org/show_bug.cgi?id=31590 In this case we had node->prim_count=1 but node->count==0 because the display list started with glBegin() but had no vertices. The call to glEvalCoord1f() triggered the DO_FALLBACK() path. When replaying the display list, the old condition basically no-op'd the call to vbo_save_playback_vertex_list call(). That led to the invalid operation error being raised in glEnd(). NOTE: This is a candidate for the 7.10 branch.
* vbo: check array indexes to prevent negative indexingBrian Paul2011-06-082-10/+13
| | | | | | See the piglit dlist-fdo31590.c test NOTE: This is a candidate for the 7.10 branch.
* st: use _mesa_is_bufferobj()Brian Paul2011-06-081-3/+4
|
* vbo: added a commentBrian Paul2011-06-081-1/+1
|
* gallium: fix comments for pipe_stream_output_stateBrian Paul2011-06-081-7/+9
|
* mesa: remove old commentBrian Paul2011-06-081-1/+0
|
* mesa: add more sampler types to is_sampler_type()Brian Paul2011-06-081-0/+4
|
* gallium: s/bool/boolean/Brian Paul2011-06-0813-21/+21
|
* draw: fix edge flag handling in clipper (for unfilled tris/quads/polygons)Brian Paul2011-06-081-5/+57
| | | | | | | | | | | | | | | | | | | | Previously, we were errantly drawing some interior edges of clipped polygons and quads. Also, we were introducing extra edges where polygons intersected the view frustum clip planes. The main problem was that we were ignoring the edgeflags encoded in the primitive header's 'flags' field which are set during polygon/quad ->tri decomposition. We need to observe those during clipping. Since we can't modify the existing vert's edgeflag fields, we need to store them in a parallel array. Edge flags also need to be handled differently for view frustum planes vs. user-defined clip planes. In the former case we don't want to draw new clip edges but in the later case we do. This matches NVIDIA's behaviour and it just looks right. Finally, note that the LLVM draw code does not properly set vertex edge flags. It's OK on the regular software path though.
* osmesa: Fix missing symbols when GLX_INDIRECT_RENDERING is defined.Jeremy Huddleston2011-06-071-0/+28
| | | | | | | | | When GLX_INDIRECT_RENDERING is defined, some symbols are used in libglapi.a but are not defined. Define them through the help of glapitemp.h. Signed-off-by: Jeremy Huddleston <[email protected]> Signed-off-by: Chia-I Wu <[email protected]>
* apple: Update dispatch table to current OpenGL specsJeremy Huddleston2011-06-071-25/+233
| | | | | | | This updates the apple dispatch table to match the current glapi. Aliases are still not handled very well. Signed-off-by: Jeremy Huddleston <[email protected]>
* apple: Dead code removalJeremy Huddleston2011-06-0724-52219/+0
| | | | | | Now that we're using glapi, all of this is no longer needed. Signed-off-by: Jeremy Huddleston <[email protected]>
* apple: Remove apple_glx_get_proc_addressJeremy Huddleston2011-06-073-54/+0
| | | | | | Now that we're using glapi, we don't need to special case this. Signed-off-by: Jeremy Huddleston <[email protected]>
* apple: Use glapi rather than reinventing the wheelJeremy Huddleston2011-06-0710-53/+1065
| | | | | | | | | | | | | | | | | | With this change, Apple's libGL is now using glapi rather than implementing its own dispatch. In this implementation, two dispatch tables are created: __ogl_framework_api always points into OpenGL.framework. __applegl_api is the vtable that is used. It points into OpenGL.framework or to local implementations that override / interpose this in OpenGL.framework The initialization for __ogl_framework_api was copied from XQuartz with some modifications and probably still needs further edits to better deal with aliases. This is a good step towards supporting both indirect and direct rendering on darwin. Signed-off-by: Jeremy Huddleston <[email protected]>
* apple: Rename __gl_api to __ogl_framework_apiJeremy Huddleston2011-06-074-14/+14
| | | | | | | In starting the migration to using mapi, rename __gl_api to __ogl_framework_api since it is a vtable for OpenGL.framework Signed-off-by: Jeremy Huddleston <[email protected]>
* r600g: missed one line in eg dyn gpr fallback.Dave Airlie2011-06-081-0/+1
| | | | | | need more sleep or something. Signed-off-by: Dave Airlie <[email protected]>
* r600g: set enable always bits for r600/r700 sq registers.Dave Airlie2011-06-081-11/+11
| | | | | | This makes sure these are enabled even if set to 0 at startup. Signed-off-by: Dave Airlie <[email protected]>
* r600g: condition evergreen dyn gpr resource managementDave Airlie2011-06-082-2/+33
| | | | | | | So only with kernel version 2.7 can this work, thanks to Alex for pointing that out. Also add a workaround for a hw bug. Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix warnings in winsys.Dave Airlie2011-06-081-5/+2
| | | | Signed-off-by: Dave Airlie <[email protected]>
* r600g: enable dynamic GPR resource management on evergreenDave Airlie2011-06-083-20/+11
| | | | | | | | | | | Evergreen can do this as well as cayman, so we should enable it. This fixes a gpu lockup with glsl-vs-vec4-indexing-temp-dst-in-nested-loop-combined.shader_test I need to add a better workaround for r600/r700. Signed-off-by: Dave Airlie <[email protected]>
* r600g: only add blocks once to the dirty/enabled lists.Dave Airlie2011-06-081-3/+5
| | | | | | This caused a loop in some tests. Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix regression in recent state changes.Dave Airlie2011-06-081-0/+1
| | | | | | | | | | We weren't emitting the SQ setup regs at all which really is fail. When a state is always enabled we need to add it to the dirty list as well. Signed-off-by: Dave Airlie <[email protected]>
* r600g: move simple part of bo reloc processing inline.Dave Airlie2011-06-082-12/+17
| | | | | | | This just moves the messy stuff out of the fast path, and leaves the fast-case in the fast path. Signed-off-by: Dave Airlie <[email protected]>
* r600g: take alpha ref update out of line.Dave Airlie2011-06-081-5/+4
| | | | Signed-off-by: Dave Airlie <[email protected]>
* r600g: split resource emit path from main register emit pathDave Airlie2011-06-084-17/+106
| | | | | | | | | Since resources don't generally vary in size, this splits the emit path, it also takes into a/c that texture and vertex resources have different number of relocs, and avoids emitting the extra reloc for vertex resources. Signed-off-by: Dave Airlie <[email protected]>
* r600g: exit bo per reg scanning loop early.Dave Airlie2011-06-082-9/+13
| | | | | | | | | Exit this loop early to avoid pointless iterations later. Move the resource bos to the first two regs, it actually doesn't matter which regs we use for this in resource land. Signed-off-by: Dave Airlie <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 21:04:31 +0000