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* mapi: Add the ability to parse GLAPI XML.Chia-I Wu2011-01-201-5/+76
| | | | | A prerequisite if we want to convert vgapi.csv to vgapi.xml, or to use mapi for glapi.
* glapi: Add gl_and_es_API.xml.Chia-I Wu2011-01-206-0/+1255
| | | | | | | gl_and_es_API.xml defines OpenGL ES 1.1 and 2.0 API as well as OpenGL API. It consists of gl_API.xml and the newly added es_EXT.xml, ARB_get_program_binary.xml, OES_single_precision.xml, and OES_fixed_point.xml.
* Add machine generated files to .gitignoretwied2011-01-193-0/+7
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* glsl: Don't bother unsetting a destructor that was never set.Kenneth Graunke2011-01-191-6/+3
| | | | This was totally copied and pasted from glsl_symbol_table.
* softpipe: Bind samplers to views instead of the underlying resource.Henri Verbeet2011-01-195-55/+39
| | | | Signed-off-by: Brian Paul <[email protected]>
* softpipe: Get rid of the redundant resource parameter to get_sampler_variant().Henri Verbeet2011-01-191-5/+1
| | | | Signed-off-by: Brian Paul <[email protected]>
* r200: fix up some problems with TFP on r200Dave Airlie2011-01-201-5/+15
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* llvmpipe: implement TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFSBrian Paul2011-01-191-3/+14
| | | | Fixes http://bugs.freedesktop.org/show_bug.cgi?id=33284
* i965/fs: Take the shared mathbox into account in instruction scheduling.Eric Anholt2011-01-191-0/+15
| | | | | | I don't have evidence for this amounting to any improvement, but it does codify a bit more what we understand so far about the pipeline.
* i965/fs: Add a helper function for detecting math opcodes.Eric Anholt2011-01-192-8/+13
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* i965/fs: Assign URB/CURB register numbers after instruction scheduling.Eric Anholt2011-01-191-2/+3
| | | | | | | | | | | | This fixes a bunch of unnecessary barriers due to the scheduler not knowing what that arbitrary register description refers to when trying to reason about its dependencies. The result is rescheduling in the convolution kernel shader in Lightsmark, which results in avoiding register spilling and increasing the performance of the first scene from 6-7 fps midway through the panning to 11fps. The register spilling was a regression from Mesa 7.9 to Mesa 7.10.
* i965/fs: Add an instruction scheduler.Eric Anholt2011-01-194-0/+479
| | | | | | | Improves performance of my GLSL demo by 5.1% (+/- 1.4%, n=7). It also reschedules the giant multiply tree at the end of glsl-fs-convolution-1 so that we end up not spilling registers, producing the expected level of performance.
* i965/fs: Add a helper for detecting texturing opcodes.Eric Anholt2011-01-192-8/+12
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* r600g: fix segfault if texture operand is a literalChristian König2011-01-191-1/+3
| | | | This fixes Bug 33262
* mesa: implement glGetShaderPrecisionFormat()Brian Paul2011-01-193-5/+68
| | | | | Drivers should override the default range/precision info as needed. No drivers do this yet.
* gallium/docs: document result type for some types of queriesBrian Paul2011-01-191-0/+2
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* radeon: avoid segfault on 3D textures.Dave Airlie2011-01-191-0/+3
| | | | This is a candidate for 7.9 and 7.10
* radeon: oops didn't need this logbase2 fnDave Airlie2011-01-191-15/+0
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* radeon: calculate complete texture state inside TFP functionDave Airlie2011-01-191-3/+25
| | | | | | (really not sure why I'm doing this). This is a candidate for 7.9 and 7.10 branches.
* dri/nouveau: allow multiple maps of surface buffersBen Skeggs2011-01-191-2/+4
| | | | | | | | | Can happen during swrast fallbacks if a buffer is somehow bound as a render target and a texture. Fixes gnome-shell on nv20, and gets it mostly working on nv10. Signed-off-by: Ben Skeggs <[email protected]>
* radeon/r200: fix fbo-clearmipmap + gen-teximageDave Airlie2011-01-193-6/+6
| | | | | | | | | | | sw clears were being used and not getting the correct offsets in the span code. also not emitting correct offsets for CB draws to texture levels. (I've no idea why I'm playing with r100). This is a candidate for 7.9 and 7.10
* i965: Fix a comment typo.Eric Anholt2011-01-181-1/+1
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* i965: Fix a bug in i965 compute-to-MRF.Eric Anholt2011-01-181-0/+1
| | | | | | Fixes piglit glsl-fs-texture2d-branching. I couldn't come up with a testcase that didn't involve dead code, but it's still worthwhile to fix I think.
* r600g: fix reserve_cfile for R700+Christian König2011-01-191-19/+17
| | | | | | According to R700 ISA we have only two channels for cfile constants. This patch makes piglit tests "glsl1-constant array with constant indexing" happy on RV710.
* glsl: Fix segfault due to missing printf argumentChad Versace2011-01-181-1/+2
| | | | | | | | Fixes the following Piglit tests: glslparsertest/shaders/array2.frag glslparsertest/shaders/dataType6.frag NOTE: This is a candidate for the 7.9 and 7.10 branches.
* glsl: Fix semantic checks on precision qualifiersChad Versace2011-01-181-9/+8
| | | | | | The check for Precision qualifiers only apply to floating point and integer types. was incomplete. It rejected only type 'bool' and structures.
* llvmpipe: make sure binning is active when we begin/end a queryBrian Paul2011-01-181-0/+4
| | | | | | | This fixes a potential failure when a begin/end_query is the first thing to happen after flushing the scene. NOTE: This is a candidate for the 7.10 and 7.9 branches.
* softpipe: rename some functions for consistencyBrian Paul2011-01-181-7/+7
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* r600g: Kill trailing whitespace.Henri Verbeet2011-01-188-66/+66
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* r600g: Remove the unused eg_states_inc.h and r600_states_inc.h.Henri Verbeet2011-01-182-1001/+0
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* r600g: Simplify some r600_bc_add_alu_type() calls to r600_bc_add_alu().Henri Verbeet2011-01-181-3/+3
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* vbo: initialize num_instances in a few placesBrian Paul2011-01-182-0/+2
| | | | | | This fixes https://bugs.freedesktop.org/show_bug.cgi?id=33247 There might still be some issues with drawing multiple instances with VBO splitting to investigate someday.
* ra: Take advantage of the adjacency list in finding a node to spill.Eric Anholt2011-01-181-6/+6
| | | | | | | | This revealed a bug in ra_get_spill_benefit where we only considered the benefit of the first adjacency we were to remove, explaining some of the ugly spilling I've seen in shaders. Because of the reduced spilling, it reduces the runtime of glsl-fs-convolution-1 36.9% +/- 0.9% (n=5).
* ra: Remove unused "name" field in regs.Eric Anholt2011-01-181-1/+0
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* ra: Take advantage of the adjacency list in ra_select() too.Eric Anholt2011-01-181-5/+6
| | | | Reduces runtime of glsl-fs-convolution-1 another 13.9% +/- 0.6% (n=5).
* ra: Add an adjacency list to trade space for time in ra_simplify().Eric Anholt2011-01-181-14/+21
| | | | | | This was recommended in the original paper, but I figued "make it run" before "make it fast". Now we make it fast. Reduces the runtime of glsl-fs-convolution-1 by 12.7% +/- 0.6% (n=5).
* glsl: Skip the rest of loop unrolling if no loops were found.Eric Anholt2011-01-183-2/+9
| | | | | Shaves 1.6% (+/- 1.0%) off of ff_fragment_shader glean texCombine time (n=5).
* ra: Trade off some space to get time efficiency in ra_set_finalize().Eric Anholt2011-01-181-6/+32
| | | | | | | | | | | | | | | | | Our use of the register allocator in i965 is somewhat unusual. Whereas most architectures would have a smaller set of registers with fewer register classes and reuse that across compilation, we have 1, 2, and 4-register classes (usually) and a variable number up to 128 registers per compile depending on how many setup parameters and push constants are present. As a result, when compiling large numbers of programs (as with glean texCombine going through ff_fragment_shader), we spent much of our CPU time in computing the q[] array. By keeping a separate list of what the conflicts are for a particular reg, we reduce glean texCombine time 17.0% +/- 2.3% (n=5). We don't expect this optimization to be useful for 915, which will have a constant register set, but it would be useful if we were switch to this register allocator for Mesa IR.
* softpipe: added some null pointer checksBrian Paul2011-01-181-3/+3
| | | | | This shouldn't really be needed but it may help with http://bugs.freedesktop.org/show_bug.cgi?id=32309
* softpipe: s/tex_cache/fragment_tex_cache/Brian Paul2011-01-185-9/+9
| | | | Just to be more consistant with the vertex and geometry tex cache fields.
* Remove executables from source tree.José Fonseca2011-01-185-0/+0
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* r600c: preserve correct buffer when using fboAndre Maasikas2011-01-181-1/+1
| | | | Hopefully better than previous - this passes more mipgen tests
* r600: set border color as RGBAAndre Maasikas2011-01-181-2/+2
| | | | border color is RGBA for samples - this passes texenv tests
* r600c: use STATE_FB_WPOS_Y_TRANSFORM variable to do wpos transformAndre Maasikas2011-01-181-7/+9
| | | | | use introduced STATE_FB_WPOS_Y_TRANSFORM variable (thanks Marek) this gets coords also right when using fbo
* i965: Fix dead pointers to fp->Parameters->ParameterValues[] after realloc.Eric Anholt2011-01-172-10/+36
| | | | | | | Fixes texrect-many regression with ff_fragment_shader -- as we added refs to the subsequent texcoord scaling paramters, the array got realloced to a new address while our params[] still pointed at the old location.
* llvmpipe: enable PIPE_CAP_INDEP_BLEND_FUNCBrian Paul2011-01-171-1/+1
| | | | | | | | | | The driver was saying that independend blend functions was not supported, but it really was. The driver was using the per-target independend blend factors but the state tracker was only setting the 0th one (per the Gallium spec). Fixes a piglit fbo-drawbuffers2-blend regression. See https://bugs.freedesktop.org/show_bug.cgi?id=33215
* st/mesa: move PIPE_CAP_INDEP_BLEND_FUNC codeBrian Paul2011-01-171-4/+4
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* glsl: Refresh autogenerated parser filesChad Versace2011-01-172-431/+442
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* glsl: Remove redundant semantic check in parserChad Versace2011-01-171-6/+0
| | | | | | | | The removed semantic check also exists in ast_type_specifier::hir(), which is a more natural location for it. The check verified that precision statements are applied only to types float and int.
* glsl: Add support for default precision statementsChad Versace2011-01-174-9/+67
| | | | | | * Add new field ast_type_specifier::is_precision_statement. * Add semantic checks in ast_type_specifier::hir(). * Alter parser rules accordingly.