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* i965: Test that nonrepresentable floats cannot be converted to VF.Matt Turner2015-11-201-0/+15
* i965: Use ldexpf() in VF float test set up.Matt Turner2015-11-201-8/+3
* i965/vec4: Initialize nir_inputs with src_reg().Matt Turner2015-11-201-1/+1
* i965/fs: Add support for gl_HelperInvocation system value.Matt Turner2015-11-201-0/+52
* i965: Add brw_imm_uv().Matt Turner2015-11-201-0/+9
* i965: Don't bother setting regioning on immediates.Matt Turner2015-11-201-6/+0
* nir: Add support for gl_HelperInvocation system value.Matt Turner2015-11-202-0/+5
* freedreno/a4xx: use hardware RGTC texture samplersIlia Mirkin2015-11-206-24/+19
* freedreno/a4xx: hook up RGB565 formatIlia Mirkin2015-11-202-1/+2
* freedreno/a4xx: logic op handlingIlia Mirkin2015-11-206-29/+35
* freedreno/a4xx: add 16-bit unorm/snorm format texturing/renderingIlia Mirkin2015-11-202-25/+47
* freedreno/a4xx: point regid to "red" even for alpha-only rb formatsIlia Mirkin2015-11-201-7/+0
* ttn: add TEX2 supportIlia Mirkin2015-11-201-3/+11
* freedreno: always set all border colorsIlia Mirkin2015-11-201-30/+8
* freedreno/a4xx: fix dst_alpha blend for RGBX render targetsIlia Mirkin2015-11-203-5/+32
* radeon: re-prepare query buffers on begin_query for predicate queriesNicolai Hähnle2015-11-202-15/+18
* radeon: reset query buffers for PIPE_QUERY_TIMESTAMPNicolai Hähnle2015-11-201-8/+18
* mesa: update some old-style (K&R?) function pointer callsBrian Paul2015-11-206-7/+7
* svga: add num-bytes-uploaded HUD queryBrian Paul2015-11-205-6/+30
* svga: add some sanity check assertions in svga_buffer_transfer_map()Brian Paul2015-11-201-0/+5
* glsl: add subroutine index qualifier supportTimothy Arceri2015-11-219-4/+91
* glsl: add support for complie-time constant expressionsTimothy Arceri2015-11-215-164/+195
* glsl: add new type for compile time constantsTimothy Arceri2015-11-212-0/+80
* glsl: call set_shader_inout_layout() earlierTimothy Arceri2015-11-211-3/+3
* glsl: replace binding layout min boundary checkTimothy Arceri2015-11-211-11/+12
* glsl: encapsulate binding validation and settingTimothy Arceri2015-11-211-32/+28
* glsl: move stream layout max validationTimothy Arceri2015-11-212-16/+19
* glsl: move stream layout qualifier validationTimothy Arceri2015-11-212-20/+35
* glsl: replace index layout min boundary checkTimothy Arceri2015-11-211-3/+6
* glsl: remove duplicate validation for index layout qualifierTimothy Arceri2015-11-211-7/+1
* glsl: move location layout qualifier validationTimothy Arceri2015-11-212-15/+15
* glsl: add process_qualifier_constant() helperTimothy Arceri2015-11-211-0/+17
* nv50: expose two groups of compute-related MP perf countersSamuel Pitoiset2015-11-206-2/+63
* i965/gen9: Support fast clears for 32b floatBen Widawsky2015-11-202-10/+6
* Revert "i965/gen9: Enable rep clears on gen9"Ben Widawsky2015-11-201-5/+0
* Revert "i965/gen9: Disable MCS for 1x color surfaces"Ben Widawsky2015-11-201-8/+0
* i965/meta/gen9: Individually fast clear color attachmentsBen Widawsky2015-11-201-13/+65
* i965/skl: skip fast clears for certain surface formatsBen Widawsky2015-11-202-27/+33
* i965: Add lossless compression to surface format tableBen Widawsky2015-11-203-252/+282
* i965/skl: Add fast color clear infrastructureBen Widawsky2015-11-204-20/+81
* radeon/vce: disable two pipe mode for stoneyLeo Liu2015-11-201-1/+2
* radeon/vce: add new firmware interface supportLeo Liu2015-11-204-5/+262
* egl: don't forget to ship platform_x11_dri3.h into the tarballEmil Velikov2015-11-201-1/+3
* glsl: move builtin_type_macros.h into the correct listEmil Velikov2015-11-201-1/+1
* mesa: remove unused var in _mesa_PushDebugGroup()Brian Paul2015-11-201-1/+0
* mesa: whitespaces fixes in _mesa_one_time_init_extension_overrides()Brian Paul2015-11-201-6/+7
* radeon: ensure that timing/profiling queries are suspended on flushNicolai Hähnle2015-11-202-9/+6
* st/mesa: add support for batch driver queries to perfmonNicolai Hähnle2015-11-202-7/+82
* gallium/hud: add support for batch queriesNicolai Hähnle2015-11-203-46/+261
* gallium: add the concept of batch queriesNicolai Hähnle2015-11-204-6/+42
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