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| * i965: Remove unneeded #includes.Matt Turner2015-11-131-4/+0
| * i965: Silence warning.Matt Turner2015-11-131-2/+2
| * i965: Don't write beyond allocated memory.Juha-Pekka Heikkila2015-11-131-1/+1
| * i965: Use BRW_MRF_COMPR4 macro in more places.Matt Turner2015-11-134-6/+6
| * i965: Combine register file field.Matt Turner2015-11-137-34/+27
| * i965: Replace HW_REG with ARF/FIXED_GRF.Matt Turner2015-11-1313-211/+157
| * i965/fs: Set stride correctly for immediates in fs_reg(brw_reg).Matt Turner2015-11-131-0/+6
| * i965/fs: Handle type-V immediates in brw_reg_from_fs_reg().Matt Turner2015-11-131-0/+3
| * i965: Rename GRF to VGRF.Matt Turner2015-11-1330-194/+194
| * i965: Move BAD_FILE from the beginning of enum register_file.Matt Turner2015-11-131-1/+1
| * i965: Initialize registers.Matt Turner2015-11-133-2/+18
| * i965: Use brw_reg's nr field to store register number.Matt Turner2015-11-1325-290/+276
| * i965: Unwrap some lines.Matt Turner2015-11-134-12/+4
| * i965/vec4: Remove swizzle/writemask fields from src/dst_reg.Matt Turner2015-11-132-8/+1
| * i965: Remove fixed_hw_reg field from backend_reg.Matt Turner2015-11-1311-162/+139
| * i965: Use immediate storage in inherited brw_reg.Matt Turner2015-11-1310-95/+96
| * i965: Add and use enum brw_reg_file.Matt Turner2015-11-134-19/+23
| * i965: Reorganize brw_reg fields.Matt Turner2015-11-131-8/+8
| * i965: Make 'dw1' and 'bits' unnamed structures in brw_reg.Matt Turner2015-11-1314-178/+185
| * i965: Delete type field from backend_reg.Matt Turner2015-11-131-1/+0
| * i965: Delete abs/negate fields from backend_reg.Matt Turner2015-11-133-5/+2
| * i965: Make backend_reg inherit from brw_reg.Matt Turner2015-11-131-3/+3
| * i965/fs: Replace nested ternary with if ladder.Matt Turner2015-11-131-6/+7
| * radeonsi: remove dead code after ES-GS linkage changeMarek Olšák2015-11-133-57/+0
| * radeonsi: link ES-GS just like LS-HSMarek Olšák2015-11-133-39/+19
| * radeonsi: calculate optimal GS ring sizes to fix GS hangs on TongaMarek Olšák2015-11-135-47/+113
| * radeonsi: rename si_update_gs_ringsMarek Olšák2015-11-131-2/+2
| * radeonsi: calculate ESGS_RING_ITEMSIZE in create_shaderMarek Olšák2015-11-132-1/+3
| * radeonsi: move maximum gs stream calculation into create_shaderMarek Olšák2015-11-132-16/+7
| * radeonsi: clean up small duplication in si_shader_gsMarek Olšák2015-11-132-6/+8
| * gallium/radeon: shorten render_cond variable namesMarek Olšák2015-11-135-13/+13
| * gallium/radeon: remove predicate_drawing flagMarek Olšák2015-11-134-4/+2
| * gallium/radeon: atomize render condition (SET_PREDICATION)Marek Olšák2015-11-1310-45/+45
| * gallium/radeon: simplify restoring render condition after flushMarek Olšák2015-11-133-26/+5
| * gallium/radeon: don't use PREDICATION_OP_CLEARMarek Olšák2015-11-131-36/+24
| * gallium/radeon: simplify disabling render condition for u_blitterMarek Olšák2015-11-135-23/+22
| * r600g: don't set predication on non-draw packetsMarek Olšák2015-11-131-8/+8
| * gallium/radeon: inline the r600_rings structureMarek Olšák2015-11-1324-266/+262
| * radeonsi: prevent recursion in si_context_gfx_flushMarek Olšák2015-11-132-0/+8
| * gallium/radeon: remove the IB flushing flagMarek Olšák2015-11-134-14/+2
| * gallium/radeon: move GFX/DMA flushing from add_to_buffer_list to need_cs_spaceMarek Olšák2015-11-134-15/+14
| * radeonsi: rename cache flushing flags once moreMarek Olšák2015-11-137-35/+30
| * radeonsi: set the DISABLE_WR_CONFIRM flag on CI-VI as wellMarek Olšák2015-11-131-2/+2
| * radeonsi: initialize SX_PS_DOWNCONVERT to 0 on StoneyMarek Olšák2015-11-131-0/+3
| * radeonsi: add glClearBufferSubData accelerationMarek Olšák2015-11-131-0/+60
| * radeonsi: add SI_SAVE_FRAGMENT_STATE blitter flagMarek Olšák2015-11-131-19/+25
| * gallium/u_blitter: add support for multi-dword clear values in clear_bufferMarek Olšák2015-11-131-11/+14
| * radeonsi: fix a future crash in emit_cb_target_maskMarek Olšák2015-11-131-1/+1
| * radeonsi: fix unaligned clear_buffer fallbackMarek Olšák2015-11-131-6/+8
| * r600g: fix clear_buffer fallback with offset != 0Marek Olšák2015-11-131-0/+1
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