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* egl/dri: link directly to libglapi.soEmil Velikov2017-10-025-40/+10
| | | | | | | | | | | | | | | | | | | | | | | Shared glapi (libglapi.so) has been a requirement for years, in order to build EGL. Remove the no longer necessary dlopen/dlsym dance and link to the library directly. This allows us to remove a handful of platform specific workarounds, due to the different name of the library. v2: - Android: export the include dir (RobH) - Drop unused local variable (Eric) Cc: Jonathan Gray <[email protected]> Cc: Jon Turney <[email protected]> Cc: Julien Isorce <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (v1) Tested-by: Tomasz Figa <[email protected]> (v1) Tested-by: Rob Herring <[email protected]>
* swr/rast: do not crash on NULL strings returned by getenvEmil Velikov2017-10-021-1/+2
| | | | | | | | | | | | | | | | | | | | The current convenience function GetEnv feeds the results of getenv directly into std::string(). That is a bad idea, since the variable may be unset, thus we feed NULL into the C++ construct. The latter of which is not allowed and leads to a crash. v2: Better variable name, implicit char* -> std::string conversion (Eric) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101832 Fixes: a25093de718 ("swr/rast: Implement JIT shader caching to disk") Cc: Tim Rowley <[email protected]> Cc: Laurent Carlier <[email protected]> Cc: Bernhard Rosenkraenzer <[email protected]> [Emil Velikov: make an actual commit from the misc diff] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (v1) Reviewed-by: Laurent Carlier <[email protected]> (v1)
* freedreno/a5xx: align height to GMEMRob Clark2017-10-021-1/+5
| | | | | | | | | | | | | | | | | Similar to the way width/pitch alignment works, it seems like we need to do similar for height. Otherwise the BLIT from system memory to GMEM can over-fetch beyond the end of the buffer, triggering a fault. I'm not sure if there is a better solution yet. Possibly we could fall back to pre-a5xx style DRAW packets for cases where BLIT might over- fetch. (We in theory have that problem already with rendering to higher mipmap levels, although fortunately those tend to use GMEM bypass.) This fixes issues reported with glamor. Reported-by: [email protected] Cc: 17.2 <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* radeonsi: adjust clip discard based on line width / point sizeNicolai Hähnle2017-10-023-11/+27
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: remove si_context::{scissor_enabled,clip_halfz}Nicolai Hähnle2017-10-023-26/+24
| | | | | | They are just copies of the rasterizer state. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: simplify the signature of si_update_vs_writes_viewport_indexNicolai Hähnle2017-10-023-7/+6
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move current_rast_prim into si_contextNicolai Hähnle2017-10-026-15/+11
| | | | | | v2: rebase fixes Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move and rename scissor and viewport state and functionsNicolai Hähnle2017-10-0210-182/+184
| | | | | | v2: change GET_MAX_SCISSOR to SI_MAX_SCISSOR Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: remove si_apply_scissor_bug_workaroundNicolai Hähnle2017-10-022-19/+0
| | | | | | It only affects pre-SI chips. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move r600_viewport.c to si_viewport.cNicolai Hähnle2017-10-023-2/+2
| | | | | | | This is purely a file-move + #include fixup + build system changes. Other cleanups will follow in subsequent commits. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix maximum advertised point size / line widthNicolai Hähnle2017-10-022-8/+3
| | | | | | | | | | The hardware registers store the half-size/width in 12.4 fixed point format, so 8192 is the maximum. Fixes dEQP-GLES3.functional.rasterization.* Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: deduce rast_prim correctly for tessellation point modeNicolai Hähnle2017-10-021-3/+6
| | | | | | | | Together with the previous patches, this fixes dEQP-GLES31.functional.primitive_bounding_box.wide_points.* Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: don't discard points and linesNicolai Hähnle2017-10-022-2/+26
| | | | | | | | | This is a bit conservative, but a more precise solution requires access to the rasterizer state. This is something to tackle after the fork between r600 and radeonsi. Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move current_rast_prim to r600_common_contextNicolai Hähnle2017-10-025-9/+13
| | | | | | | | | | We'll use it in the scissors / clip / guardband state. v2: avoid a performance regression on r600 when applied to (pre-fork) stable branches Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: use R10G10B10X2 format where applicableNicolai Hähnle2017-10-021-3/+8
| | | | | | | | This is the last step of fixing dEQP-GLES3.functional.fbo.completeness.renderable.texture.color0.rgb_unsigned_int_2_10_10_10_rev for radeonsi. Reviewed-by: Marek Olšák <[email protected]>
* gallium: add PIPE_FORMAT_R10G10B10X2_UNORMNicolai Hähnle2017-10-024-0/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa/main: R10G10B10_(A2) formats are not color renderable in ESNicolai Hähnle2017-10-021-2/+5
| | | | | | | | | | | | | The EXT_texture_type_2_10_10_10_REV (ES only) states the following issue: "1. Should textures specified with this type be renderable? UNRESOLVED: No. A separate extension could provide this functionality." This partially fixes dEQP-GLES3.functional.fbo.completeness.renderable.texture.color0.{rgb,rgba}_unsigned_int_2_10_10_10_rev Reviewed-by: Marek Olšák <[email protected]>
* mesa/main: select the R10G10B10X2_UNORM internal format based on data typeNicolai Hähnle2017-10-021-1/+3
| | | | | | | ES requires it. This is a partial fix for dEQP-GLES3.functional.fbo.completeness.renderable.texture.color0.rgb_unsigned_int_2_10_10_10_rev Reviewed-by: Marek Olšák <[email protected]>
* glsl: do not set the 'smooth' qualifier by default on ES shadersNicolai Hähnle2017-10-023-13/+23
| | | | | | | | | | | | It leads to surprising states with integer inputs and outputs on vertex processing stages (e.g. geometry stages). Instead, rely on the driver to choose smooth interpolation by default. We still allow varyings to match when one stage declares it as smooth and the other declares it without interpolation qualifiers. Reviewed-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* freedreno: fix PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVERob Clark2017-10-022-4/+5
| | | | | | | | Fixes an assert in fd_acc_query_register_provider() about query provider not already registered. Fixes: 3f6b3d9d ("gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE") Signed-off-by: Rob Clark <[email protected]>
* egl/wayland: simplify LIBGL_ALWAYS_SOFTWARE logicEric Engestrom2017-10-021-8/+4
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* radeonsi: fix a regression in integer cube map handlingNicolai Hähnle2017-10-021-8/+26
| | | | | | | | | | | | A recent commit fixed the case of 8888 integer cube maps, which need the workaround of replacing the data format with USCALED/SSCALED. However, this broke the case of non-8888 integer cube maps; those still need the fix of shifting the texture coordinates. Fixes KHR-GL45.texture_gather.plain-gather-int-cube-array and similar. Fixes: 6fb0c1013b35 ("radeonsi: workaround for gather4 on integer cube maps") Reviewed-by: Marek Olšák <[email protected]>
* amd/common: move ac_build_phi from radeonsiNicolai Hähnle2017-10-023-17/+22
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radv: remove unused radv_meta_state::btoi::render_pass handleSamuel Pitoiset2017-10-021-1/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not check the number of levels when doing fast htileSamuel Pitoiset2017-10-021-3/+0
| | | | | | | | We shouldn't reach this point because HTILE is only enabled when the number of levels is 1. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: cleanup radv_device_finish_meta_XXX() helpersSamuel Pitoiset2017-10-028-219/+136
| | | | | | | Unnecessary to double check that handles are not NULL. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: select the pipeline outside of emit_fast_clear_flush()Samuel Pitoiset2017-10-021-12/+11
| | | | | | | It can't change during the decompression pass. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: drop useless param in emit_depth_decomp()Samuel Pitoiset2017-10-021-5/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: drop useless check in depth_view_can_fast_clear()Samuel Pitoiset2017-10-021-2/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_subpass_clear_attachment() helperSamuel Pitoiset2017-10-021-20/+32
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_attachment_needs_clear() helperSamuel Pitoiset2017-10-021-39/+31
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove unused param in radv_handle_{cmask,dcc}_image_transition()Samuel Pitoiset2017-10-021-8/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_vi_dcc_enabled() helperSamuel Pitoiset2017-10-023-2/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not need to double zero-init the meta state structuresSamuel Pitoiset2017-10-0212-28/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: inline destroy_render_pass()Samuel Pitoiset2017-10-021-9/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: use pipeline handles instead of objects for meta clear operationsSamuel Pitoiset2017-10-022-44/+36
| | | | | | | To be consistent with other meta operations. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: inline blit2d_unbind_dst()Samuel Pitoiset2017-10-021-9/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: rework DCC/CMASK/FMASK/HTILE allocationsSamuel Pitoiset2017-10-021-27/+56
| | | | | | | Add helpers and some comments to make the thing more readable. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* i965: skip reading unused slots at the begining of the URB for the FSIago Toral Quiroga2017-10-023-14/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can start reading the URB at the first offset that contains varyings that are actually read in the URB. We still need to make sure that we read at least one varying to honor hardware requirements. This helps alleviate a problem introduced with 99df02ca26f61 for separate shader objects: without separate shader objects we assign locations sequentially, however, since that commit we have changed the method for SSO so that the VUE slot assigned depends on the number of builtin slots plus the location assigned to the varying. This fixed layout is intended to help SSO programs by avoiding on-the-fly recompiles when swapping out shaders, however, it also means that if a varying uses a large location number close to the maximum allowed by the SF/FS units (31), then the offset introduced by the number of builtin slots can push the location outside the range and trigger an assertion. This problem is affecting at least the following CTS tests for enhanced layouts: KHR-GL45.enhanced_layouts.varying_array_components KHR-GL45.enhanced_layouts.varying_array_locations KHR-GL45.enhanced_layouts.varying_components KHR-GL45.enhanced_layouts.varying_locations which use SSO and the the location layout qualifier to select such location numbers explicitly. This change helps these tests because for SSO we always have to include things such as VARYING_SLOT_CLIP_DIST{0,1} even if the fragment shader is very unlikely to read them, so by doing this we free builtin slots from the fixed VUE layout and we avoid the tests to crash in this scenario. Of course, this is not a proper fix, we'd still run into problems if someone tries to use an explicit max location and read gl_ViewportIndex, gl_LayerID or gl_CullDistancein in the FS, but that would be a much less common bug and we can probably wait to see if anyone actually runs into that situation in a real world scenario before making the decision that more aggresive changes are required to support this without reverting 99df02ca26f61. v2: - Add a debug message when we skip clip distances (Ilia) - we also need to account for this when we compute the urb setup for the fragment shader stage, so add a compiler util to compute the first slot that we need to read from the URB instead of replicating the logic in both places. v3: - Make the util more generic so it can account for all unused slots at the beginning of the URB, that will make it more useful (Ken). - Drop the debug message, it was not what Ilia was asking for. Suggested-by: Kenneth Graunke <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Normalize types for FBL, FBH, etcMatt Turner2017-09-302-15/+11
| | | | | | | | | | | | Allows the instructions to be compacted. The documentation claims that some of these only accept UD types, even though the type doesn't change the operation performed. Just normalize the types to ensure we get instruction compaction. The only functional changes are for FBL and CBIT (always use UD types) and FBH (always use the same types). Reviewed-by: Kenneth Graunke <[email protected]>
* radeonsi: don't use the template keywordMarek Olšák2017-09-301-7/+7
| | | | | | for C++ editors Reviewed-by: Brian Paul <[email protected]>
* glx: don't use the template keywordMarek Olšák2017-09-301-3/+3
| | | | | | for C++ editors Reviewed-by: Brian Paul <[email protected]>
* gallium/vl: don't use the template keywordMarek Olšák2017-09-301-14/+14
| | | | | | for C++ editors Reviewed-by: Brian Paul <[email protected]>
* egl/dri2: don't use the template keywordMarek Olšák2017-09-301-3/+3
| | | | | | for C++ editors Reviewed-by: Brian Paul <[email protected]>
* radeonsi/uvd: clean up si_video_buffer_createBenedikt Schemmer2017-09-301-30/+17
| | | | | | V2: remove code duplication and one unnessecary variable, minor whitespace fix Signed-off-by: Marek Olšák <[email protected]>
* radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bbMarek Olšák2017-09-301-3/+8
| | | | | Tested-by: Benedikt Schemmer <[email protected]> Reviewed-by: Christian König <[email protected]>
* gallium: add new LOD opcodeRoland Scheidegger2017-09-305-5/+74
| | | | | | | | | | The operation performed is all the same as LODQ, but with the usual differences between dx10 and GL texture opcodes, that is separate resource and sampler indices (plus result swizzling, and setting z/w channels to zero). Reviewed-by: Jose Fonseca <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* drirc: whitelist glthread for OutlastKamil Páral2017-09-291-0/+3
| | | | | FPS increase 10-20% in starting locations on Core i5-4570 + Radeon R9 270.
* st/va: add dst rect to avoid scale on deintLeo Liu2017-09-291-6/+6
| | | | | | | | | | | For 1080p video transcode, the height will be scaled to 1088 when deint to progressive buffer. Set dst rect to make sure no scale. Fixes: 3ad8687 "st/va: use new vl_compositor_yuv_deint_full() to deint" Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Acked-by: Andy Furniss <[email protected]>
* radeonsi: emit DLDEXP and DFRACEXP TGSI opcodesNicolai Hähnle2017-09-292-1/+26
| | | | | | | | | Note: this causes spurious regressions in some current piglit tests, because the tests incorrectly assume that there is no denorm support for doubles. I'm going to send out a fix for those tests as well. Reviewed-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>