| Commit message (Collapse) | Author | Age | Files | Lines |
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it also matches GL 4.2
further discussion:
http://lists.freedesktop.org/archives/mesa-dev/2013-August/042680.html
Cc: [email protected]
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Spotted by okias on IRC.
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Not only should we mark states dirty when the underlying resource is renamed,
we should also update the CSO bo when available.
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We will need it in the following commit.
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Reviewed-by: Marek Olšák <[email protected]>
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v2:
- Preserve word boundaries.
v3:
- Use const and restrict.
- Fix indentation.
Reviewed-by: Michel Dänzer <[email protected]>
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Most image functions are required to return a CL_INVALID_OPERATION
error when used on devices without image support.
v2:
- Simplified the code
Reviewed-by: Francisco Jerez <[email protected]>
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v2: Add information about the item's starting point and size
v3: Rebased on top of master
Reviewed-by: Tom Stellard <[email protected]>
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v2: Rebased on top of master
Reviewed-by: Tom Stellard <[email protected]>
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This should allow a deeper pipeline.
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When mapping a busy resource with PIPE_TRANSFER_DISCARD_RANGE or
PIPE_TRANSFER_FLUSH_EXPLICIT, we can avoid blocking by allocating and mapping
a staging bo, and emit pipelined copies at proper places. Since the staging
bo is never bound to GPU, we give it packed layout to save space.
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Enable PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT and reorder caps a bit.
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With the recent clean-ups, we can pass the mapped pointer around between
functions cleanly. Drop it to make ilo_transfer smaller.
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It maps to drm_intel_gem_bo_map_unsynchronized(), which results in
unsynchronized GTT mapping.
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Many of the transfer functions do not need an ilo_context. Drop it.
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Add xfer_map() to replace map_bo_for_transfer(). Add xfer_unmap() and
xfer_alloc_staging_sys() to simplify texture and buffer mapping/unmapping, and
enable more code sharing between them.
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Add a bunch of helper functions and a big comment for
choose_transfer_method(). This also fixes handling of
PIPE_TRANSFER_MAP_DIRECTLY to not ignore tiling.
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We used FREE() in one of the error path.
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Reviewed-by: Francisco Jerez <[email protected]>
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[ Francisco Jerez: Check for devices not associated with the specified
context. Style fix. ]
Reviewed-by: Francisco Jerez <[email protected]>
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With MESA_EXTENSION_OVERRIDE=GL_ARB_compute_shader, this fixes piglit:
built-in-constants tests/spec/arb_compute_shader/minimum-maximums.txt
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Chris Forbes <[email protected]>
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With MESA_EXTENSION_OVERRIDE=GL_ARB_compute_shader, this fixes piglit:
* arb_compute_shader-minmax
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Chris Forbes <[email protected]>
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Signed-off-by: Chris Forbes <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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Instead of falling back to just the block name (which we won't find),
look for the first element of the block array. We'll deal with the rest
in the backend by arranging for the blocks to be laid out contiguously.
V2: Squashed together patches 3, 5 of V1, plus a naming tweak.
Signed-off-by: Chris Forbes <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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Previously this was a block index with special semantics for -1.
With ARB_gpu_shader5, this need not be a compile-time constant, so
allow any rvalue here and convert the -1 to a NULL pointer.
Signed-off-by: Chris Forbes <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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Without doing a lot more work, we have no idea which indices may
be used at runtime, so just mark them all.
Signed-off-by: Chris Forbes <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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Signed-off-by: Chris Forbes <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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Move fence creation to the new ilo_fence_create().
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This allows us two things: we now need less item copies when we have
to defrag+grow the pool (to just one copy per item) and, even in the
case where we don't need to defrag the pool, we reduce the data copied
to just the useful data that the items use.
Note: The fallback path is a bit ugly now, but hopefully we won't need
it much.
Reviewed-by: Tom Stellard <[email protected]>
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Now, before moving everything to host memory, we try to create a
new resource to use as a pool. I we succeed we just use this resource
and delete the previous one. If we fail we fallback to using the
shadow.
This should make growing the pool faster, and we can also save
64KB of memory that were allocated for the 'shadow', even if they
weren't used.
Reviewed-by: Tom Stellard <[email protected]>
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Opps, I should use larger fonts, I guess.
Reported-by: Ilia Mirkin <[email protected]>
Signed-off-by: Rob Clark <[email protected]>
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Move the bits we want to share between generations from fd3_program to
ir3_shader. So overall structure is:
fdN_shader_stateobj -> ir3_shader -> ir3_shader_variant -> ir3
|- ...
\- ir3_shader_variant -> ir3
So the ir3_shader becomes the topmost generation neutral object, which
manages the set of variants each of which generates, compiles, and
assembles it's own ir.
There is a bit of additional renaming to s/fd3_compiler/ir3_compiler/,
etc.
Keep the split between the gallium level stateobj and the shader helper
object because it might be a good idea to pre-compute some generation
specific register values (ie. anything that is independent of linking).
Signed-off-by: Rob Clark <[email protected]>
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First step of reoganization split out compiler (so it can be shared
between a3xx and a4xx). Rename ir3_shader -> ir3 (since we'll want
the name ir3_shader for a higher level object).
Signed-off-by: Rob Clark <[email protected]>
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The scheduler also needs to be aware of predicate register (p0) in
addition to address register (a0).
Signed-off-by: Rob Clark <[email protected]>
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Remove some obsolete comments, rename deref->addr.
Signed-off-by: Rob Clark <[email protected]>
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It seems like for the most part, different behaviors, workarounds, etc,
should be conditional on GPU patch revision (ie. a320.0 vs a320.2)
rather than GPU id (a320 vs a330).
Signed-off-by: Rob Clark <[email protected]>
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The fixed size heap is a remnant of the fdre-a3xx assembler. Yet it is
convenient for being able to free the entire data structure in one shot
without worrying about leaking nodes.
Change it to dynamically grow the heap size (adding chunks) as needed so
we don't have an artificial upper limit on shader size (other than hw
limits) and don't always have to allocate worst-case size.
Signed-off-by: Rob Clark <[email protected]>
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The iteration variables go from 0 anyway.
Signed-off-by: Jan Vesely <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Francisco Jerez <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
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This will be used in the following patch to avoid duplicated code
Reviewed-by: Tom Stellard <[email protected]>
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v2: Remove unnecesary variables
Reviewed-by: Tom Stellard <[email protected]>
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The GBM_DRIVERS_PATH environment variable is not documented, and only
used to set the location of gbm drivers, while LIBGL_DRIVERS_PATH is
used for everything else, and is documented.
Generally this split leads to confusion as to why gbm doesn't work.
This patch will read LIBGL_DRIVERS_PATH as a fallback if
GBM_DRIVERS_PATH is not set.
The comments clearly indicate that using LIBGL_DRIVERS_PATH is
preferred over GBM_DRIVERS_PATH.
v2: - Use GBM_DRIVERS_PATH as a fallback
v3: [[email protected]] - Make LIBGL_DRIVERS_PATH the fallback
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Reviewed-by: Kristian Høgsberg <[email protected]>
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Can we please keep it clean and avoid ending up in messy situation
like ddx.
Signed-off-by: Jérôme Glisse <[email protected]>
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According to a quick micro-benchmark, this new version is 20% faster on my
Haswell laptop.
v2: Removed the XXX note about x86_64 from the comment
v3: Use an intrinsic instead of an __asm__ block. This should give us MSVC
support for free.
v4: Enable it for all x86_64 builds, not just with USE_X86_64_ASM
Signed-off-by: Jason Ekstrand <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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Reviewed-by: Kenneth Graunke <[email protected]>
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Will clarify make the next commit easier to read.
Reviewed-by: Kenneth Graunke <[email protected]>
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... to eliminate an ELSE instruction followed immediately by an ENDIF.
instructions in affected programs: 704 -> 700 (-0.57%)
Reviewed-by: Kenneth Graunke <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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