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* i965/skl: Force the exec size to 8 when initing header for SIMD4x2Neil Roberts2015-05-012-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | On Gen9+ there needs to be a header when sampling using SIMD4x2. The header is set up by copying from the g0 register. Commit 07c571a39f tried to fix this mov instruction to always use an exec size of 8 because previously it was incorrectly using 4. It did this by casting the type of the destination register to vec8. This was done because there is code in brw_set_dest to guess the exec size based on the width of the dest register. However I misunderstood how this works because it is actually only used when the width is less than 8. That means the patch actually changed it to use the default exec size which on SIMD16 would be 16 and the MOV would clobber over the first register in the send message. This patch makes it additionally set the default exec size to 8. This is similar to how the message is set up in fs_generator::generate_tex. I think this wasn't picked up by any Piglit tests because we don't have any fragment shaders that hit this code path so nothing was using SIMD16. However the patch caused failures in deqp tests. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90153 Reviewed-by: Matt Turner <[email protected]> Tested-by: Tapani Pälli <[email protected]>
* i965: Unhardcode a few more stage names and abbreviations.Kenneth Graunke2015-04-302-11/+5
| | | | | | | | | | | | | | | The stage_abbrev and stage_name fields in backend_visitor provide what we need without any additional effort. It also means we'll get the right names for compute shaders, SIMD8 geometry shaders, and both kinds of tessellation shaders. This does unfortunately change the capitalization of the stage abbreviation in the INTEL_DEBUG=optimizer output filenames. It doesn't seem worth adding code to handle, though. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* st/dri: implement the fence interface for CL eventsMarek Olšák2015-04-303-1/+81
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* gallium,clover: add OpenCL interoperability support for CL eventsMarek Olšák2015-04-305-0/+114
| | | | | | | | | | | v2: - move interop.cpp to clover/api - change intptr_t to void* in the interface - add a virtual function fence() to simplify some code v3: - use bool in the interface v4: - enclose the last two interop functions in try..catch Reviewed-by: Francisco Jerez <[email protected]>
* st/dri: implement the fence interfaceMarek Olšák2015-04-301-0/+80
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* egl/dri2: return the latest sync status in eglGetSyncAttribKHRMarek Olšák2015-04-301-1/+8
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* egl/dri2: implement EGL_KHR_cl_event2 (v2)Marek Olšák2015-04-306-12/+111
| | | | v2: fix the SYNC_CONDITION query
* egl/dri2: implement EGL_KHR_wait_syncMarek Olšák2015-04-305-0/+47
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* egl/dri2: implement EGL_KHR_fence_syncMarek Olšák2015-04-303-5/+133
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* mesa: add GL_OES_EGL_syncMarek Olšák2015-04-301-0/+1
| | | | | This is an empty extension whose presence means that EGL sync objects can be used with ES contexts.
* egl/dri: don't expose configs with an accumulation bufferMarek Olšák2015-04-301-0/+9
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* nvc0/ir: fix predicated PFETCH for realIlia Mirkin2015-04-302-2/+2
| | | | | | | | Commit a9d08a250 accidentally didn't make use of the new src1 variable. Use it. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nv50/ir: fix asFlow() const helper for OP_JOINIlia Mirkin2015-04-291-1/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nvc0/ir: fix predicated PFETCH emissionIlia Mirkin2015-04-292-2/+6
| | | | | | | | | src1 would contain the predicate, which would get emitted as a register source by an undiscerning srcId helper. Work around this in the same way as in emitTEX. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* gk110/ir: fix set with a register dest to not auto-set the abs flagIlia Mirkin2015-04-291-1/+1
| | | | | | | This was causing src0 to always have the absolute value flag set. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* i965/blorp: Prepare drawing rectangle for flipped coordinatesTopi Pohjolainen2015-04-301-2/+2
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add support for layered renderingTopi Pohjolainen2015-04-304-5/+9
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Allow blend state to be set for multiple render targetsTopi Pohjolainen2015-04-303-19/+18
| | | | | | | | | | | Original blorp writes only one buffer per shader invocation. Once the launch mechanism is shared with glsl-based programs there will be need for supporting multiple render targets. Also drop the always constant color write disable settings. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Prepare for attributes other than render positionTopi Pohjolainen2015-04-304-7/+12
| | | | | | | | | | | | | | | Note that the magic number of one in gen7 logic is replaced by BRW_SF_URB_ENTRY_READ_OFFSET ( == 1 also) for clarity. On gen6 the change from zero to one (BRW_SF_URB_ENTRY_READ_OFFSET) has no effect for native blorp as blorp doesn't use any additional attributes. In fact, regular pipeline setup always uses BRW_SF_URB_ENTRY_READ_OFFSET even when there are no additional attributes. Hence the change makes the two (blorp and regular) consistent. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Remove unused argumentsTopi Pohjolainen2015-04-303-21/+12
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen7/blorp: Remove unused argumentsTopi Pohjolainen2015-04-301-47/+28
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Allow caller to provide sampler settingsTopi Pohjolainen2015-04-303-8/+14
| | | | | | | v2 (Ken): s/use_unorm_coords/non_normalized_coords/ Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Refactor vertex buffer state setupTopi Pohjolainen2015-04-301-26/+34
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Remove constant parameterTopi Pohjolainen2015-04-303-20/+0
| | | | | | | | This was still needed when we had support for blorp clears but now this is fixed to nop. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen8: Expose state base address setupTopi Pohjolainen2015-04-302-2/+5
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/ps/gen8: Refactor state uploadingTopi Pohjolainen2015-04-302-26/+58
| | | | | | | | | v2: Use SET_FIELD() for sampler count, and for that reason added GEN7_PS_SAMPLER_COUNT_MASK. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/ps/gen7: Refactor state uploadingTopi Pohjolainen2015-04-302-20/+45
| | | | | | | | | | | Now the uploading depends only on the input parameters instead of consulting the current gl-state. v2: Rebased on top of sampler count clamping Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Refactor sampler state setupTopi Pohjolainen2015-04-302-22/+47
| | | | | | | | v2 (Matt): Moved * to the name. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Remove dependency to tex object in default color setupTopi Pohjolainen2015-04-301-11/+11
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Refactor and expose brw_upload_binding_table()Topi Pohjolainen2015-04-302-7/+21
| | | | | | | | | | | | Read and write parts of the state stage are also split into explicit arguments allowing future patches to use constant program data. v2 (Ken): s/BRW_NEW_WM_PROG_DATA/BRW_NEW_FS_PROG_DATA/ Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Expose and refactor brw_update_renderbuffer_surfaces()Topi Pohjolainen2015-04-302-21/+35
| | | | | | | | | | Note that brw_update_renderbuffer_surfaces() already had a helper variable which was used in parallel to direct access of the current draw buffer of the context. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Refactor rb surface setup to allow caller to store offsetsTopi Pohjolainen2015-04-305-58/+59
| | | | | | | | | | | Notice that in gen7_wm_surface_state.c there is also indentation change in the surrounding code removing tabs. v2 (Matt): Fixed whitespace: tabs -> spaces Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen8: Use constant pointers for reading miptree detailsTopi Pohjolainen2015-04-301-2/+2
| | | | | | Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/ps: Use SET_FIELD() for sampler countTopi Pohjolainen2015-04-303-4/+7
| | | | | | | | The value is actually clamped to 0-16 as sample state pointer can be used to support more than 16 samplers. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* glx: Massive update of comments in struct extension_infoIan Romanick2015-04-291-4/+65
| | | | | | | | | In response to another patch, Emil asked for some clarification how this stuff works. Rather than just reply to the e-mail, I decided to update the exlanation in the code. Signed-off-by: Ian Romanick <[email protected]> Cc: Emil Velikov <[email protected]>
* winsys/radeon: add a private interface for radeon_surfaceMarek Olšák2015-04-2917-47/+286
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* winsys/radeon: move radeon_winsys.h to drivers/radeonMarek Olšák2015-04-2919-21/+16
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* clover: remove util/compatEdB2015-04-2912-367/+56
| | | | | Acked-by: Francisco Jerez <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* i965: Don't try to apply the opt_sampler_eot extension for vsNeil Roberts2015-04-291-0/+3
| | | | | | | | | | | | | | | | | | | The opt_sampler_eot optimisation of fs_visitor effectively assumes that it is running on a fragment shader because it casts the program key to a brw_wm_prog_key. However on Skylake fs_visitor can also be used for vertex shaders. It looks like this usually works anyway because the optimisation is skipped if key->nr_color_regions != 1. However for a vertex shader the key is actually a brw_vs_prog_key so the space for nr_color_regions is probably taken up by key->base.program_string_id. This can end up making nr_color_regions be 1 in which case the function will later assert when the last instruction is not FS_OPCODE_FB_WRITE. This was making the DEQP test suite assert. Presumably this only happens there because that compiles a lot of shaders so it would end up with a high value for program_string_id. Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* r300: do not link against libdrm_intelEmil Velikov2015-04-291-1/+1
| | | | | | | | Accidentally added since the introduction of the file. Cc: "10.4 10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* clover: make module::symbol::name a stringEdB2015-04-293-4/+24
| | | | | Acked-by: Francisco Jerez <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* clover: remove compat::stringEdB2015-04-297-129/+26
| | | | | Acked-by: Francisco Jerez <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* clover: remove compat classes that match std oneEdB2015-04-296-70/+6
| | | | | Acked-by: Francisco Jerez <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* clover: compile all sources with c++11EdB2015-04-291-1/+2
| | | | | | | Later we can remove the compat code Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* st/nine: Remove Managed texture hack.Axel Davy2015-04-291-3/+4
| | | | | | | | | | | | Previously binding an unitialized managed texture was causing a crash, and a workaround was added to prevent the crash. This patch removes this workaround and instead set the initial state of managed textures as dirty, so that when the texture is bound for the first time, it is always initialized. Signed-off-by: Axel Davy <[email protected]>
* st/nine: Enforce LOD 0 for D3DUSAGE_AUTOGENMIPMAPAxel Davy2015-04-292-3/+10
| | | | | | | | | For D3DUSAGE_AUTOGENMIPMAP textures, applications can only lock/copy from/get surface descriptor for/etc the first level. Thus it makes sense to restrict the LOD to 0, and use only the first level to generate the sublevels. Signed-off-by: Axel Davy <[email protected]>
* st/nine: Some D3DUSAGE_AUTOGENMIPMAP fixesAxel Davy2015-04-293-2/+17
| | | | Signed-off-by: Axel Davy <[email protected]>
* st/nine: util_gen_mipmap doesn't need we reset states.Axel Davy2015-04-291-2/+0
| | | | | | | util_gen_mipmap uses pipe->blit, and thus doesn't need we restore all states after using it. Signed-off-by: Axel Davy <[email protected]>
* st/nine: D3DUSAGE_AUTOGENMIPMAP is forbidden for volumesAxel Davy2015-04-292-16/+1
| | | | Signed-off-by: Axel Davy <[email protected]>
* st/nine: Fix NineBaseTexture9_PreLoadAxel Davy2015-04-291-1/+1
| | | | | | | It wasn't uploading the texture when the lod had changed. Signed-off-by: Axel Davy <[email protected]>