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* freedreno/ir3: fixes for indirect writesRob Clark2015-06-303-4/+12
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix constlen in case of load_uniform_indirectRob Clark2015-06-301-0/+5
| | | | | | | | We can't rely on what we get from the assembler if we have indirect addressing of constant file, since the assembler doesn't know the array index. This got lost in the transition to NIR. Signed-off-by: Rob Clark <[email protected]>
* glsl: validate sampler array indexing for 'constant-index-expression'Tapani Pälli2015-06-301-0/+77
| | | | | | | | | | | | | | Desktop GLSL < 130 and GLSL ES < 300 allow sampler array indexing where index can contain a loop induction variable. This extra check will warn during linking if some of the indexes could not be turned in to constant expressions. v2: warning instead of error for backends that did not enable EmitNoIndirectSampler option (have dynamic indexing) Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Cc: "10.5" and "10.6" <[email protected]>
* mesa/st: use EmitNoIndirectSampler if !ARB_gpu_shader5Tapani Pälli2015-06-301-0/+5
| | | | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Cc: "10.5" and "10.6" <[email protected]>
* i915: use EmitNoIndirectSamplerTapani Pälli2015-06-301-0/+3
| | | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Cc: "10.5" and "10.6" <[email protected]>
* i965: use EmitNoIndirectSampler for gen < 7Tapani Pälli2015-06-301-0/+4
| | | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Cc: "10.5" and "10.6" <[email protected]>
* mesa/glsl: new compiler option EmitNoIndirectSamplerTapani Pälli2015-06-302-0/+13
| | | | | | | | | | | | | | | | Patch provides new compiler option for backend to force unroll loops that have non-constant expression indexing on sampler arrays. This makes sure that we can never end up with a shader that uses loop induction variable as sampler array index but does not unroll because of having too much instructions. This would not work without dynamic indexing support. v2: change option name as EmitNoIndirectSampler Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Cc: "10.5" and "10.6" <[email protected]>
* glsl: Allow dynamic sampler array indexing with GLSL ES < 3.00Tapani Pälli2015-06-301-18/+18
| | | | | | | | | | | | | | | | | | | | Dynamic indexing of sampler arrays is prohibited by GLSL ES 3.00. Earlier versions allow 'constant-index-expression' indexing, where index can contain a loop induction variable. Patch allows dynamic indexing for sampler arrays when GLSL ES < 3.00. This change makes 'sampler-array-index.frag' parser test in Piglit pass + fishgl.com works when running Chrome on OpenGL ES 2.0 backend v2: small change and some more commit message (Tapani) v3: refactor checks to make it more readable (Ian Romanick) v4: change warning comment in GLSL ES case (Curro) Signed-off-by: Tapani Pälli <[email protected]> Signed-off-by: Kalyan Kondapally <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Cc: "10.5" and "10.6" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84225
* nv50/ir: fix emission of address reg in 3rd sourceIlia Mirkin2015-06-301-2/+6
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91056 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* i965: Don't use GCC extension for ?: with only two operands.Kenneth Graunke2015-06-291-3/+5
| | | | | | | | | | | | | | | | | | | From the "apparently I don't know C" files...GCC apparently supports: x ?: y which is equivalent to x ? x : y except that it doesn't cause side-effects to occur twice. See: https://gcc.gnu.org/onlinedocs/gcc/Conditionals.html#Conditionals This was confusing and looked like a typo. It doesn't really buy us anything, so just write the obvious code in normal C. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* egl/haiku: fix Mesa build under HaikuAlexander von Gluck IV2015-06-291-14/+14
| | | | | Performing a goto crosses the initialization of 'BWindow* win' breaking the build. We also fix a missing semicolon.
* nv30: align transfer stride to 64, required by blit, sifm transfer implsIlia Mirkin2015-06-291-2/+2
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: allow vertex state creation with 0 elementsIlia Mirkin2015-06-291-2/+3
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: reset fragprog bufctx at bind timeIlia Mirkin2015-06-291-1/+8
| | | | | | | | A clear will do a partial validate, which will in turn reference all the buffers in the bufctx again. However the fragprog last validated might have already been deleted. So reset the bufctx when updating state. Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: modernize fp upload logicIlia Mirkin2015-06-291-10/+14
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: provide a minimum map buffer alignmentIlia Mirkin2015-06-291-1/+2
| | | | | | | Otherwise we return 0, which is out of spec. Return 64 like all the other nouveau drivers. Signed-off-by: Ilia Mirkin <[email protected]>
* i965/skl: Extract the blit command setup in to a helperAnuj Phogat2015-06-291-32/+61
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965/gen9: Add XY_FAST_COPY_BLT support to intelEmitCopyBlit()Anuj Phogat2015-06-294-63/+287
| | | | | | | | | | | | | | | | | | This patch enables using XY_FAST_COPY_BLT only for Yf/Ys tiled buffers. It can be later turned on for other tiling patterns (X,Y) too. V3: Flush in between sequential fast copy blits. Fix src/dst alignment requirements. Make can_fast_copy_blit() helper. Use ffs(), is_power_of_two() Move overlap computation inside intel_miptree_blit(). V4: Use _mesa_regions_overlap() function. Add check for src_buffer == dst_buffer. Simplify horizontal and vertical alignment computations. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* mesa/swrast: Use global function _mesa_regions_overlap()Anuj Phogat2015-06-291-13/+3
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa/st: Use global function _mesa_regions_overlap()Anuj Phogat2015-06-291-27/+3
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: Add a new helper function _mesa_regions_overlap()Anuj Phogat2015-06-292-0/+32
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965/gen9: Allocate YF/YS tiled buffer objectsAnuj Phogat2015-06-291-3/+62
| | | | | | | | | | | | | | | | | | | In case of I915_TILING_{X,Y} we need to pass tiling format to libdrm using drm_intel_bo_alloc_tiled(). But, In case of YF/YS tiled buffers libdrm need not know about the tiling format because these buffers don't have hardware support to be tiled or detiled through a fenced region. libdrm still need to know buffer alignment value for its use in kernel when resolving the relocation. Using drm_intel_bo_alloc_for_render() for YF/YS tiled buffers satisfy both the above conditions. V2: Delete min/max buffer size restrictions not valid for i965+. Remove redundant align to tile size statements. Remove some redundant code now when there are no min/max buffer size. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Make a helper function intel_miptree_can_use_tr_mode()Anuj Phogat2015-06-291-11/+19
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Make a helper function intel_miptree_release_levels()Anuj Phogat2015-06-291-6/+12
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965/gen9: Plugin the code for selecting YF/YS tiling on skl+Anuj Phogat2015-06-291-17/+79
| | | | | | | | | | | | | | | | | Buffers with Yf/Ys tiling end up using meta upload / download paths or the blitter for cases where they used tiled_memcpy paths in case of Y tiling. This has exposed some bugs in meta path. To avoid any piglit regressions on SKL this patch keeps the Yf/Ys tiling disabled at the moment. V3: Make brw_miptree_choose_tr_mode() actually choose TRMODE. (Ben) Few cosmetic changes. V4: Get rid of brw_miptree_choose_tr_mode(). Take care of all tile resource modes {Yf, Ys, none} for all generations at one place. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Make a helper function intel_miptree_set_alignment()Anuj Phogat2015-06-291-7/+14
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* mesa/main: free locale at exitErik Faye-Lund2015-06-293-1/+22
| | | | | | | | | In order to save a small leak if mesa is continously loaded and unloaded, let's free the locale when the shared object is unloaded. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* util: port _mesa_strto[df] to CErik Faye-Lund2015-06-296-7/+21
| | | | | | | | | | | | | _mesa_strtod and _mesa_strtof are only used from the GLSL compiler and the ARB_[vertex|fragment]_program code, meaning that the locale doesn't need to be initialized before the first OpenGL context gets initialized. So let's use explicit initialization from the one-time init code instead of depending on a C++ compiler to initialize at image-load time. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* glsl: No need to lock in _mesa_glsl_release_typesErik Faye-Lund2015-06-291-4/+4
| | | | | | | | | | This function only gets called while mesa is unloading, so there's no potential of racing or multiple calls at the same time. So let's just get rid of the locking. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa/main: only call _mesa_destroy_shader_compiler once on exitErik Faye-Lund2015-06-291-5/+2
| | | | | | | | | | | | There's no point in calling _mesa_destroy_shader_compiler multiple times on exit; the resources will only be released once anyway. So let's move the atexit-call into the part that is only called once. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* dri: don't touch the shader compilerErik Faye-Lund2015-06-291-3/+0
| | | | | | | | | | | | | This function is for deleting per-screen resources, and the shader compiler resources are not of such nature. Besides, dri shouldn't need to even know about the presence of a shader compiler. These resources will already be released when mesa gets unloaded, and that should be sufficient. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa/main: Get rid of outdated GDB-hackErik Faye-Lund2015-06-291-27/+0
| | | | | | | | | All of these enums are now in use around in the code, so there's no need to explicitly use them here any more. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* clover: implement CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLEGrigori Goronzy2015-06-293-1/+7
| | | | | | | | | | Work-group size should always be aligned to subgroup size; this is a basic requirement, otherwise some work-items will be no-operation. It might make sense to refine the value according to a kernel's resource usage, but that's a possible optimization for the future. Reviewed-by: Francisco Jerez <[email protected]>
* gallium: add PIPE_COMPUTE_CAP_SUBGROUP_SIZEGrigori Goronzy2015-06-296-1/+42
| | | | | | | We need this to implement OpenCL's CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE. Reviewed-by: Francisco Jerez <[email protected]>
* i965: Don't try to print the GLSL IR if it has been freedNeil Roberts2015-06-291-4/+7
| | | | | | | | | Since commit 104c8fc2c2aa5621261f8 the GLSL IR will be freed if NIR is being used. This was causing it to segfault if INTEL_DEBUG=wm is set. This patch just makes it avoid dumping the GLSL IR in that case. Reviewed-by: Ben Widawsky <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* Revert "glsl: clone inputs and outputs during linking"Kenneth Graunke2015-06-281-3/+1
| | | | | | | | | | | This reverts commit c2ff3485b3d48749ea9dcad07bc1a691627dc3e5. Ilia and I noticed a memory leak caused by this patch: at least with fixed-function programs, we clone things using ProgramResourceList as the context before reralloc makes it non-NULL. I believe Tapani found other bugs with these patches, so I'm just going to revert them for now and let him pursue them further.
* Revert "i965: Delete linked GLSL IR when using NIR."Kenneth Graunke2015-06-281-4/+1
| | | | This reverts commit 104c8fc2c2aa5621261f80aa6b4f76c3163078f1.
* nv30: avoid leaking blit fp/vpIlia Mirkin2015-06-291-0/+6
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv40: enable base vertexIlia Mirkin2015-06-293-4/+5
| | | | | | | Still appears to have issues with negative indices less than -1M, but that's a corner case of a corner case. Signed-off-by: Ilia Mirkin <[email protected]>
* i965/vs: Move compute_clip_distance() out of emit_urb_writes().Kenneth Graunke2015-06-283-7/+15
| | | | | | | | | | | | | | | | | Legacy user clipping (using gl_Position or gl_ClipVertex) is handled by turning those into the modern gl_ClipDistance equivalents. This is unnecessary in Core Profile: if user clipping is enabled, but the shader doesn't write the corresponding gl_ClipDistance entry, results are undefined. Hence, it is also unnecessary for geometry shaders. This patch moves the call up to run_vs(). This is equivalent for VS, but removes the need to pass clip distances into emit_urb_writes(). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Write at least some data in SIMD8 URB write messages.Kenneth Graunke2015-06-281-4/+11
| | | | | | | | | | | | | | According to the "URB SIMD8 Write > Write Data Payload" documentation, "The write data payload can be between 1 and 8 message phases long." Apparently, the simulator considers it an error if you issue an URB SIMD8 message with only a header and no actual data to write. v2: Try to put in a better PRM citation, now that the Broadwell docs actually exist (requested by Jordan). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* gallium/hud: prevent NULL pointer dereference with pipe_query functionsSamuel Pitoiset2015-06-281-6/+8
| | | | | | | | The HUD doesn't check if query_create() fails and it calls other pipe_query functions with NULL pointer instead of a valid query object. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* nouveau: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.Mario Kleiner2015-06-281-1/+5
| | | | | | | | | | | | | | | | | | The dup'ed fd owned by the nouveau_screen for a device node must also be used as key for the winsys hash table, instead of using the original fd passed in for a screen, to make multi-x-screen ZaphodHeads configurations work on nouveau. The original fd's lifetime differs from that of the nouveau_screen stored in the hash. The hash key is the fd, and in order to compare hash entries we fstat them, so the fd must be around for as long as the screen is. This is an extension of the fix in commit a59f2bb1 (nouveau: dup fd before passing it to device). Cc: "10.3 10.4 10.5 10.6" <[email protected]> Signed-off-by: Mario Kleiner <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* meta: Only change and restore viewport 0 in mesa meta modeMike Stroyan2015-06-271-2/+2
| | | | | | | | The meta code was setting a default depth range for all viewports and 'restoring' all viewports to depth range values saved from viewport 0. Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]>
* radeonsi: add support for geometry shader invocations.Dave Airlie2015-06-274-1/+13
| | | | | Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: add support for viewport array (v3)Dave Airlie2015-06-276-40/+69
| | | | | | | | | | | | | | | | | This isn't pretty and I'd suggest it the pm4 interface builder could be tweaked to do this more efficently, but I'd need guidance on how that would look. This seems to pass the few piglit tests I threw at it. v2: handle passing layer/viewport index to fragment shader. fix crash in blit changes, add support to io_get_unique_index for layer/viewport index update docs. v3: avoid looking up viewport index and layer in es (Marek). Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965/fs: Fix ir_txs in emit_texture_gen4_simd16().Kenneth Graunke2015-06-261-3/+4
| | | | | | | | | | | We were not emitting the LOD, which led to message lengths of 1 instead of 3. Setting has_lod makes us emit the LOD, but I had to make changes to avoid emitting the non-existent coordinate as well. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91022 Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* nv50/ir: propagate modifier to right arg when const-folding madIlia Mirkin2015-06-261-1/+4
| | | | | | | | | | An immediate has to be the second arg of an ADD operation. However we were mistakenly propagating the modifier of the non-folded value to the folded immediate argument. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91117 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* egl_dri2: Remove trailing whitespacesBoyan Ding2015-06-264-13/+13
| | | | | Signed-off-by: Boyan Ding <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965/skl: Fix aligning mt->total_width to the block sizeNeil Roberts2015-06-261-3/+2
| | | | | | | | | | | | | | | | | | | | brw_miptree_layout_2d tries to ensure that mt->total_width is a multiple of the compressed block size, presumably because it wouldn't be possible to make an image that has a fraction of a block. However it was doing this by aligning mt->total_width to align_w. Previously align_w has been used as a shortcut for getting the block width because before Gen9 the block width was always equal to the alignment. Commit 4ab8d59a2 tried to fix these cases to use the block width instead of the alignment but it missed this case. I think in practice this probably won't make any difference because the buffer for the texture will be allocated to be large enough to contain the entire pitch and libdrm aligns the pitch to the tile width anyway. However I think the patch is worth having to make the intention clearer. Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
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