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* st/mesa: get rid of unneeded ureg_writemask()Brian Paul2010-07-231-3/+2
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* st/mesa: fix bug in emit_adjusted_wpos()Brian Paul2010-07-231-2/+5
| | | | | | | | | If we bias x,y we still need to pass through z,w in case the shader reads gl_FragCoord.z or .w. Fixes fd.o bug 29183 (piglit glsl-bug-22603). NOTE: This is a candidate for the 7.8 branch.
* i965: Cleanly fail programs with unsupported array access.Eric Anholt2010-07-231-1/+28
| | | | | This should be more useful for developers and for bug triaging than just generating wrong code.
* i965: Add support for VS relative addressing of temporary arrays.Eric Anholt2010-07-231-2/+49
| | | | Fixes glsl-vs-arrays. Bug #27388.
* draw: add small ybias factor for drawing wide pointsBrian Paul2010-07-231-0/+1
| | | | Fixes minor rasterization error detected by some tests.
* softpipe: Check for NULL pointer in sp_destroy_tile_cache().Michal Krol2010-07-231-8/+10
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* softpipe: Check for NULL pointer in sp_destroy_tex_tile_cache().Michal Krol2010-07-231-11/+13
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* nv50: implement depth clampChristoph Bumiller2010-07-234-10/+33
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* xorg/vmwgfx: Implement early mode pruning based on max fb size.Thomas Hellstrom2010-07-233-4/+37
| | | | | | | | | Also move some initialization from screen init to pre-init, now that it is possible. Also import a new vmwgfx drm (1.3) header. Signed-off-by: Thomas Hellstrom <[email protected]>
* st/xorg: Init the Gallium3D / libkms resources in pre-init.Thomas Hellstrom2010-07-232-86/+75
| | | | | | | | This makes it possible to prune modes already in pre-init. We also keep these resources alive across server generations, and they are implicitly closed on server exit. Signed-off-by: Thomas Hellstrom <[email protected]>
* st/xorg: Kill a couple of compilation warningsThomas Hellstrom2010-07-232-2/+2
| | | | Signed-off-by: Thomas Hellstrom <[email protected]>
* st/xorg vmwgfx/xorg: Add a pre-init customizer callbackThomas Hellstrom2010-07-233-5/+19
| | | | | | | | Add a customizer callback just before initial config setting, so that the customizer code can initialize the mode validator using the drm file-descriptor. Signed-off-by: Thomas Hellstrom <[email protected]>
* st/xorg: Add a possibility to prune modes and limit fb allocation size based ↵Thomas Hellstrom2010-07-233-0/+23
| | | | | | on max fb size. Signed-off-by: Thomas Hellstrom <[email protected]>
* llvmpipe: Partially fix resource texture from_handleJakob Bornecrantz2010-07-221-1/+35
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* llvmpipe: Don't align values already alignedJakob Bornecrantz2010-07-221-2/+2
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* i915g: Rename winsys debug optionsJakob Bornecrantz2010-07-221-2/+2
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* i915g: Allow wrapping with software pipesJakob Bornecrantz2010-07-222-3/+11
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* i915g: Set total_nblocksy in from_handleJakob Bornecrantz2010-07-221-0/+1
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* i915g: Add some debug prints in texture codeJakob Bornecrantz2010-07-221-6/+10
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* i915g: Ifdef out debug code on non-debug buildsJakob Bornecrantz2010-07-221-0/+5
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* tgsi: Fix error message on invalid swizzle parseJakob Bornecrantz2010-07-221-1/+1
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* glx: Drop screen argument to GetGLXDRIDrawableKristian Høgsberg2010-07-224-43/+33
| | | | We'll just get it from the returned drawable when we need it.
* glx: Move WaitGL, WaitX, UseXFont to context vtable functionsKristian Høgsberg2010-07-226-101/+97
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* glx: Allocate the __GLXcontext in the DRI driversKristian Høgsberg2010-07-226-124/+136
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* glx: Use _Xglobal_lock for protecting extension display listKristian Høgsberg2010-07-223-126/+86
| | | | Avoids double locking glXLock in the X wire to event handlers.
* glsl: remove invalid _mesa_problem() callBrian Paul2010-07-221-0/+2
| | | | Fixes fd.o bug 29206.
* draw: re-order optimization passes depending on LLVM version, 32/64-bitBrian Paul2010-07-221-2/+15
| | | | | This is a work-around for an apparent bug in LLVM seen with piglit's glsl-vs-sqrt-zero test.
* draw: added new assertions to clipping codeBrian Paul2010-07-221-1/+10
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* i965: Respect VS/VP point size result when enabled.Eric Anholt2010-07-221-3/+4
| | | | Fixes glsl-vs-point-size.
* i965: Fix the disasm output for da16 src widths.Eric Anholt2010-07-221-1/+1
| | | | | | This has confused me twice now. It's a fixed width of 4 (usually a region description of <4,4,1>), not 1. If it was 1, we'd have been skipping all over register space.
* i965: Avoid extra MOV in VS indirect register reads.Eric Anholt2010-07-221-15/+16
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* i965: Fix up VS temporary array access for fixed index offset != 0.Eric Anholt2010-07-221-1/+1
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* r600: Flip point sprite coordinates when rendering to an FBO.Henri Verbeet2010-07-221-1/+3
| | | | This supersedes http://lists.freedesktop.org/archives/mesa-dev/2010-July/001442.html.
* i965: In the VS, multiply the address reg by the appropriate register size.Eric Anholt2010-07-211-27/+14
| | | | | | | | | | | | The ARL value is increments of vec4 in the register file. But PROGRAM_TEMPORARY or PROGRAM_INPUT are stored as vec4s interleaved between the two verts being executed (thus a vec8 each), compared to PROGRAM_STATE_VAR being packed vec4s. Fixes: glsl-vs-arrays-2 glsl-vs-mov-after-deref (without regressing glsl-vs-arrays-3)
* i965: Clean up brw_dp_READ_4_vs() now that it has fewer options to support.Eric Anholt2010-07-213-52/+31
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* i965: Support relative addressed VS constant reads using the appropriate msg.Eric Anholt2010-07-213-31/+66
| | | | | The previous support was overly complicated by trying to use the same 1-OWORD message for both offsets.
* i965: Fix the DP read msg_control definitions other than plain OWORD.Eric Anholt2010-07-211-6/+16
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* i965: Clean up dead code from the VS get_constant/get_reladdr_constant split.Eric Anholt2010-07-211-3/+1
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* i956: Set the execution size correctly for scratch space writes.Eric Anholt2010-07-211-2/+2
| | | | | | | | Otherwise, the second half isn't written, and we end up reading back black. Fixes the remaining junk drawn in glsl-max-varyings, and will likely help with a number of large real-world shaders.
* i965: Set the GEM domain flags for the scratch space.Eric Anholt2010-07-211-1/+1
| | | | | | They go into the render cache, so while we don't care about their contents after execution, failing to note them could cause the writes to be flushed over important buffer contents later.
* i965: Use the pretty define for 4-oword DP reads.Eric Anholt2010-07-211-1/+1
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* i965: Set the send commit bit on register spills as required pre-gen6.Eric Anholt2010-07-211-9/+32
| | | | Otherwise, the subsequent read may not get the written value.
* i965: Add disasm for dataport reads (register unspilling).Eric Anholt2010-07-211-1/+22
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* glx: Move last few dri_interface.h types out of glxclient.h and drop includeKristian Høgsberg2010-07-214-12/+19
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* glx: Move __driContext field out of __GLXcontextRecKristian Høgsberg2010-07-212-4/+3
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* softpipe: add missing support for PIPE_FORMAT_S8_USCALED surfacesBrian Paul2010-07-211-20/+20
| | | | | | And remove checks of surface depth bits. The state tracker should not turn on depth/stencil testing if the framebuffer doesn't have depth/stencil.
* softpipe: fix sp_tile_cache_flush_clear() regressionBrian Paul2010-07-211-5/+11
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* Revert "dri2: Remove an unused variable."Jerome Glisse2010-07-211-0/+1
| | | | | glx_info is used if X_DRI2SwapBuffers is defined This reverts commit c0ca2bfb2ad8cf7fb9d756b5ae52cb77236ff605.
* r600g: add support for all R6XX/R7XX asicJerome Glisse2010-07-214-87/+316
| | | | | | | This configure some of the value properly based on asic so others asic than RV710 works too. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: add r600 compile mode to compiler.Dave Airlie2010-07-214-13/+106
| | | | | | some of the ALU instructions are different on r6xx vs r7xx, separate the alu translation to separate files, and use family to pick which compile stage to use.
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