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* i965: Adjust renderbuffer wrapper to account for MinLevel/MinLayerChris Forbes2014-04-101-0/+4
| | | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Enable texture upload fast path with MinLevelChris Forbes2014-04-101-1/+1
| | | | | | | | | | We'll still avoid MinLayer here since the fast path doesn't understand arrays at all, but it's straightforward to do levels. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Account for MinLevel in texture upload fast pathChris Forbes2014-04-101-2/+4
| | | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Adjust map/unmap code for MinLevel/MinLayerChris Forbes2014-04-101-3/+8
| | | | | | | | | | This allows core mesa's TexSubImage paths etc to work correctly with views which have nonzero MinLevel or MinLayer. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Don't try to use fast upload path for nontrivial viewsChris Forbes2014-04-101-0/+4
| | | | | | | | | | This will eventually be relaxed, but we'll get the fallback path working first. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Adjust surface_state emission to account for view parametersChris Forbes2014-04-101-5/+14
| | | | | | | | | V4: Comment style, remove magic shift. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Add _Format to intel_texobj.Chris Forbes2014-04-103-0/+16
| | | | | | | | | | | This is the actual mesa_format to use. In non-view cases this is always the same as the mt's format. V4: Comment style Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Add driver hook for TextureViewChris Forbes2014-04-101-0/+41
| | | | | | | | | | | We need to wire the original texture's mt into the view. All the hard work of setting up an appropriate tree of gl_texture_image structures has already been done by core mesa. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Ensure that texture validation is skipped for immutable textures.Chris Forbes2014-04-101-0/+5
| | | | | | | | | | | If we were to relayout the miptree, we'd break any views that are sharing it. (Simplified based on suggestions from Eric) Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: refactor format selection for unsupported ETC* formatsChris Forbes2014-04-102-34/+45
| | | | | | | | We will need to call this to munge view formats. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: refactor format munging for separate stencilChris Forbes2014-04-102-8/+26
| | | | | | | | | We will need this for munging the view's format. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Include #slices in miptree debugChris Forbes2014-04-101-2/+2
| | | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* mesa: Adjust _MaxLevel computation to account for viewsChris Forbes2014-04-101-0/+7
| | | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* mesa: Prefer non-swizzled formats for most sized internalformatsChris Forbes2014-04-101-4/+18
| | | | | | | | | | | | | | | | These formats can be cast to others (with different component types or sizes) via ARB_texture_view or ARB_shader_image_load_store. We want them to be laid out consistently so that we can just reinterpret the memory with a different format. In V1, this was done conditionally on a 'prefer_no_swizzle' flag which was set in TexStorage/TextureView paths, but we need the same behavior for ARB_shader_image_load_store (which also works with images created via TexImage, so we don't want it to be conditional. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Render R8G8B8X8 as R8G8B8A8Chris Forbes2014-04-101-0/+3
| | | | | | | | | The sampler can handle R8G8B8X8 (and substitute 1.0 for the fourth component) but we can't use it as a render target. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Pretend we don't support BRW_SURFACEFORMAT_R16G16B16_FLOAT for textures.Chris Forbes2014-04-101-1/+1
| | | | | | | | | | | | | | | | | | | None of the other 3-component 16bpc formats are directly supported, so they get promoted to XRGB equivalents. *Not* promoting RGB16F the same way makes texture views much more fiddly -- we don't want to have to do crazy copying behind the scenes. (with my other master + my experimental ARB_texture_view support) fixes the piglit test: `spec/ARB_texture_view/view compare 48bit formats` No regressions in gpu.tests on Haswell. V4: Don't alter the formats table -- just don't match it to a mesa_format. [Kenneth] Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Enable R10G10B10A2_UNORM formatChris Forbes2014-04-101-0/+1
| | | | | | | | | This is supported by all generations, and is required for memory layout consistency for texture_view. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Enable R8G8B8A8_UNORM_SRGB formatChris Forbes2014-04-101-0/+1
| | | | | | | | Now this is the preferred format for GL_SRGB8_ALPHA8. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* swrast: Add support for fetching from MESA_FORMAT_R10G10B10A2_UNORMChris Forbes2014-04-102-3/+16
| | | | | | | | | | V4: Fix rebase conflicts with Brian's renaming of the texfetch functions. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Brian Paul <[email protected]> Acked-by: Eric Anholt <[email protected]>
* mesa: fix packing of float texels to GL_SHORT/GL_BYTEChris Forbes2014-04-101-58/+58
| | | | | | | | | | | | | | | | | Previously, we would unpack the texels to floats using *_TO_FLOAT_TEX, and then pack them into the desired format using FLOAT_TO_*. Unfortunately, this isn't quite the inverse operation, and so some texel values would end up off-by-one. This fixes the GL_RGB8_SNORM and GL_RGB16_SNORM subcases in piglit's arb_texture_view-format-consistency-get test on i965. The similar 1-, 2- and 4-component cases already worked because they took the memcpy path rather than repacking. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* r600g: Don't leak bytecode on shader compile failureMichel Dänzer2014-04-101-7/+12
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74868 Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* build: force .so extension for the gallium dri modulesEmil Velikov2014-04-091-0/+1
| | | | | | | | | | While linux uses .so as a default extension for shared libraries that is not the case for other platforms. The loader in libGL (and others) assumes that the dri module will always have a .so extension, thus it will fail to load on the affected platforms. Spotted-by: Jon TURNEY <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* Partially revert bba9c28 "configure: use LIB_EXT rather than hardcoded .so"Jon TURNEY2014-04-091-13/+13
| | | | | | | | | | | | | | | | | Filenames passed to dlopen() don't need to use the platform's default extension for shared libraries. Using the '.so' extension when dlopen()ing DRI drivers is hardcoded into mesa and the X server, so it should be hardcoded here in the Makefile as well. A similar fix is probably also needed for gallium DRI drivers. (Consider that if we were starting from scratch, perhaps we would use a custom extension like .dri instead) Cc: Emil Velikov <[email protected]> Signed-off-by: Jon TURNEY <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Partially revert "st/xa: Fix advertized version number and try to avoid ↵Emil Velikov2014-04-091-3/+3
| | | | | | | | | | | | | | | | future discrepancies" This reverts commit 61bedc3d6b08943f015f9d590c07a6af36c2a92c. As the header is the one defining the API/ABI and is distributed during installation, we should be using it rather than re-defining the XA version in configure.ac. Bump the version in the header to 2.2.0, to reflect what was the original intent of commit 42158926c6d7d3ddbe61b9a04d60544ff1b50a96. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
* glx: drop obsolete _XUnlock_Mutex in __glXInitialize error pathEmil Velikov2014-04-091-3/+1
| | | | | | | | | | | | | | With commit 1f1928db001(glx: Drop _Xglobal_lock while we create and initialize glx display) we've split the big _Xglobal_lock handling in a more fine grained manner. Unfortunatelly we forgot to drop the unlock_mutex on the error paths, leading to undefined behaviour as the mutex is already unlocked. Cc: Kristian Høgsberg <[email protected]> Cc: "9.2 10.0 10.1" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* freedreno/a3xx: assert() -> debug_assert()Rob Clark2014-04-091-1/+1
| | | | | | | | | We hit this assert with some piglit tests. Which appears to be a bug outside of freedreno. Previously we were relying on assert() being redefined to debug_assert() so that we didn't crash in release builds. Somehow that stopped working. So just use debug_assert() directly. Signed-off-by: Rob Clark <[email protected]>
* svga: move LIST_INITHEAD(dirty_buffers) earlier in svga_context_create()Brian Paul2014-04-091-2/+2
| | | | | | | | | | | | Fixes a crash in svga_context_flush_buffers() if we use the 'draw' module for AA lines (when the device doesn't support that feature). We need to initialize this list before we setup the swtnl pieces. Found/fixed by Charmaine Lee. Cc: "10.0" <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* i965: Stop advertising GL_MESA_ycbcr_texture.Kenneth Graunke2014-04-091-1/+0
| | | | | | | | | | | | | | | | | The "new" fragment shader backend has never supported the necessary color conversion code for this to work. We began using the new backend in Mesa 7.10 for GLSL (commit a81d423d93f22a948f3aa4bf73, October 2010), and for ARB_fragment_program in Mesa 9.1 (commit 97615b2d8c7c3cea6fd3a4, August 2012). I haven't heard any complaints, so I don't think anyone will miss this feature. I believe mplayer used it at one point, but these days defaults to other paths anyway. Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno/a3xx/compiler: add CEILRob Clark2014-04-091-0/+1
| | | | | | fixes piglit glsl-fs-ceil Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: fix neg mov'sRob Clark2014-04-091-20/+1
| | | | | | | | | | | | | | | | | | | | create_mov() was fixed up to handle neg/abs properly for interal mov's, using absneg.f, but forgot to fix it for TGSI MOV's. The problem with using add.f to handle negated mov's is that we can only take a single const reg src. So: MOV TEMP[n], -CONST[m] would turn into: add.f Rdst, (neg)CONST[m], 0.0 which would not work. Anyways, just remove the extra code and always use create_mov() which DTRT. This fixes piglit vs-op-neg-int test. Signed-off-by: Rob Clark <[email protected]>
* radeonsi: allow fast color clear and Hyper-Z with 1D-tiled surfaces on CIKMarek Olšák2014-04-091-5/+5
| | | | This depends on my kernel fix. Hyper-Z is still disabled by default.
* r600g,radeonsi: add a bunch of useful queries for the HUDMarek Olšák2014-04-097-5/+72
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* r600g,radeonsi: set correct initial domain for shared resourcesMarek Olšák2014-04-093-23/+59
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* gallium/radeon: fix warningsMarek Olšák2014-04-093-2/+3
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* tnl: Merge _tnl_vbo_draw_prims() into _tnl_draw_prims().Iago Toral Quiroga2014-04-085-48/+27
| | | | | | | | | This should help prevent situations where we render without proper index bounds. For example: https://bugs.freedesktop.org/show_bug.cgi?id=59455 Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Remove unused sampler key fieldsTopi Pohjolainen2014-04-082-16/+0
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: move declaration before code in etc2_unpack_rgb8()Brian Paul2014-04-081-3/+3
| | | | To fix MSVC build since cb4ad1368551b.
* i965: Delete "fast color clear unsupported" performance warning.Kenneth Graunke2014-04-081-2/+0
| | | | | | | | | | | | | | | | | | | | | | | Applications frequently clear to colors other than 0.0 or 1.0, which prevents us from doing fast color clears. In that case, we issue this performance warning on basically every glClear call, resulting in so much spam that it's nearly impossible to see any other messages. Plus, I don't think it's useful. We aren't suggesting a better way to do what the application developers want---we're just telling them it would be faster to do something they don't want. Driver developers have no control over the clear color, so this message is totally useless to them. A better alternative to get this sort of information is to use INTEL_DEBUG=blorp, which tells you whether color clears were fast, simd16 repdata, or slow. v2: Rebase on has_color_component changes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* freedreno/a3xx: deal with optimized tex instructionsRob Clark2014-04-087-25/+41
| | | | | | | | | | | | | | | Keep track of whether we actually have any sam instructions in the resulting shader, rather than using TGSI SAMP declarations. If the sam instruction is optimized out, because the result is not used, we don't want to emit texture state, etc. In fact emitting sampler state and/or setting PIXLODENABLE bit when there are no texture fetches seems to cause lockup. In theory this should never happen for a "normal" shader, unless the state tracker is wonky. But it is a very real possibility for binning pass shaders. Signed-off-by: Rob Clark <[email protected]>
* mesa: add bounds checking to eliminate buffer overrunCourtney Goeltzenleuchter2014-04-081-24/+54
| | | | | | | | | | | | | | | | | Decompressing ETC2 textures was causing intermitent segfault by copying resulting 4x4 texel block to the destination texture regardless of the size of the destination texture. Issue found via application crash in GLBenchmark 3.0's Manhattan test. v2: add more detail comment. Compute limit outside inner loops. v3: add bugzilla reference v4: Correct cc syntax in commit log v5: really grab the right patch Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74988 Cc: "9.2 10.0 10.1" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> [v1, suggested v2-3]
* st/omx/enc: cleanup omx/vid_enc.cLeo Liu2014-04-081-102/+118
| | | | | | | cleanup by moving each step into a separate function Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* st/omx/enc: allocate input buffer private on demandChristian König2014-04-081-82/+42
| | | | | | | | v2: move allocation to a function as first step to clean vid_enc_EncodeFrame Signed-off-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]>
* svga: replace sampler assertion with conditionalBrian Paul2014-04-082-5/+33
| | | | | | | | | | | | | For TEX instructions, the set of samplers and sampler views should be consistent. The XA state tracker sometimes passes an inconsistent set of samplers and sampler views. Rather than assert and die, issue a warning. v2: add debugging code to detect inconsistent state. v3: also check for null sampler in svga_state_tss.c Cc: "10.0" "10.1" <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
* i965/vec4: fix record clearing in copy propagationChia-I Wu2014-04-081-5/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Given mov vgrf7, vgrf9.xyxz add vgrf9.xyz, vgrf4.xyzw, vgrf5.xyzw add vgrf10.x, vgrf6.xyzw, vgrf7.wwww the last instruction would be wrongly changed to add vgrf10.x, vgrf6.xyzw, vgrf9.zzzz during copy propagation. The issue is that when deciding if a record should be cleared, the old code checked for inst->dst.writemask & (1 << ch) instead of inst->dst.writemask & (1 << BRW_GET_SWZ(src->swizzle, ch)) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76749 Signed-off-by: Chia-I Wu <[email protected]> Cc: Jordan Justen <[email protected]> Cc: Matt Turner <[email protected]> Reviewed-by: Ian Romainck <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Cc: "10.1" <[email protected]>
* i965/vec4: Add a test for copy propagation behavior.Eric Anholt2014-04-083-0/+164
| | | | | | | I thought I was seeing a bug in the code while reviewing, but it's not there. Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Track whether we're doing dual source in a more obvious way.Eric Anholt2014-04-083-3/+5
| | | | | | I'm going to be turning dual_src_output into an array in a moment. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add a couple more global special regs to special[]Eric Anholt2014-04-081-0/+2
| | | | | | | Nothing bad came of this because they weren't used after visitor running, but leaving them in a bad state seems like a recipe for pain later. Suggested-by: Kenneth Graunke <[email protected]>
* i965/fs: Handle arrays of special regs more cleanly.Eric Anholt2014-04-081-14/+22
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix dump_instructions() on uniforms.Eric Anholt2014-04-081-2/+2
| | | | | | All of a vec4 uniform was being printed as "u0" Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix vgrf0 live interval when no interpolation was done.Eric Anholt2014-04-081-2/+4
| | | | | | | | | | When you've got a simple solid-color shader that doesn't generate pixel_x/y interpolation, we were deciding that the first vgrf was both the undefined pixel_x and pixel_y, and extending its live interval to avoid the stride problem. That tricked other optimization that tries to see if a particular instruction is the last use of a variable. Reviewed-by: Kenneth Graunke <[email protected]>
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