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* mesa: Fix copy-paste error in ConservativeRasterDilateRange initializationDanylo Piliaiev2018-07-241-1/+1
* nir/serialize: Alloc constants off the variableJason Ekstrand2018-07-241-1/+1
* nir: rename f2f16_undef to f2f16Karol Herbst2018-07-245-11/+11
* nir: add builtin builderKarol Herbst2018-07-245-45/+166
* nir/spirv: import OpenCL.std.hRob Clark2018-07-241-0/+211
* radeonsi: handle SI_FORCE_FAMILY earlyMarek Olšák2018-07-241-2/+1
* python: Use range() instead of xrange()Mathieu Bridon2018-07-249-12/+12
* python: Better use iteratorsMathieu Bridon2018-07-244-17/+20
* python: Better sort dictionary keys/valuesMathieu Bridon2018-07-244-16/+8
* python: Better iterate over dictionariesMathieu Bridon2018-07-2412-26/+26
* python: Stop using the string moduleMathieu Bridon2018-07-244-12/+11
* python: Better check for keys in dictsMathieu Bridon2018-07-247-23/+21
* intel: Make the disassembler take a const pointer to the assembly.Kenneth Graunke2018-07-242-4/+5
* radv: Still enable inmemory & API level caching if disk cache is not enabled.Bas Nieuwenhuizen2018-07-241-2/+1
* gallium/tests: Don't ignore S3TC errors.Jose Fonseca2018-07-241-5/+0
* egl: Fix missing clamping in eglSetDamageRegionKHRHarish Krupo2018-07-241-14/+11
* forward precise-flag if supportedErik Faye-Lund2018-07-242-1/+5
* radeonsi: fix pk2h breakageMarek Olšák2018-07-231-2/+5
* radeonsi: reduce LDS stalls by 40% for tessellationMarek Olšák2018-07-234-6/+14
* radeonsi: Add debug option to enable LLVM GlobalISel (v2)Tom Stellard2018-07-235-2/+22
* intel/compiler: Account for built-in uniforms in analyze_ubo_rangesJason Ekstrand2018-07-238-9/+45
* radv: enable VK_KHR_16bit_storage extension / 16bit storage featuresDaniel Schürmann2018-07-233-4/+8
* ac: add support for 16bit load_push_constantDaniel Schürmann2018-07-231-0/+20
* radv: add support for 16bit input/outputDaniel Schürmann2018-07-232-18/+80
* nir: add 16bit type information to glsl typesDaniel Schürmann2018-07-233-0/+28
* ac: add support for 16bit buffer loadsDaniel Schürmann2018-07-231-40/+55
* ac: add support for 16bit UBO loadsDaniel Schürmann2018-07-233-3/+51
* ac: add support for 16bit ssbo storesDaniel Schürmann2018-07-231-60/+84
* ac: add 16bit conversion operationsDaniel Schürmann2018-07-232-9/+31
* r600: enable tess_input_info for TESDave Airlie2018-07-231-14/+6
* draw: force draw pipeline if there's more than 65535 verticesRoland Scheidegger2018-07-233-0/+21
* Revert "virgl: remove unused stride-arguments"Dave Airlie2018-07-245-5/+33
* virgl: add initial shader_storage_buffer_object support. (v2)Dave Airlie2018-07-249-0/+98
* nir: Add a couple trivial abs optimizationsJason Ekstrand2018-07-231-0/+2
* glsl: remove delegating constructors to allow build with C++98Caio Marcelo de Oliveira Filho2018-07-231-6/+8
* v3d: Implement a small immediates optimization, based on VC4's.Eric Anholt2018-07-238-19/+143
* v3d: Return an invalid src number if asked for a missing implicit uniform.Eric Anholt2018-07-232-3/+3
* v3d: Skip emitting texture config parameter 2 if it's just the defaults.Eric Anholt2018-07-231-1/+5
* v3d: Update an XXX comment for a path we handled in HW on V3D 4.x.Eric Anholt2018-07-231-1/+1
* v3d: Switch to using the new SFU instructions on V3D 4.x.Eric Anholt2018-07-238-24/+118
* v3d: Add QPU pack/unpack for the new SFU instructions.Eric Anholt2018-07-234-0/+32
* v3d: Fix the name of the "flpop" operation.Eric Anholt2018-07-236-6/+7
* v3d: Print the instruction we're testing in the QPU disasm/pack round-trip.Eric Anholt2018-07-231-2/+3
* v3d: Drop unused vir_SAT() operation.Eric Anholt2018-07-231-8/+0
* v3d: Rotate through registers to improve post-RA scheduling options.Eric Anholt2018-07-231-0/+45
* v3d: Allow reading from physical regs written in the previous instruction.Eric Anholt2018-07-231-24/+0
* anv: remove unnecessary runtime copy of static stringEric Engestrom2018-07-231-2/+1
* anv: Pay attention to VK_ACCESS_MEMORY_(READ|WRITE)_BITAlex Smith2018-07-231-0/+9
* virgl: remove unused stride-argumentsErik Faye-Lund2018-07-235-33/+5
* radv: print a big warning when RADV_TRACE_FILE is setSamuel Pitoiset2018-07-231-0/+4
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