| Commit message (Collapse) | Author | Age | Files | Lines |
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Right now virtual GRF book-keeping and allocation is performed in each
visitor class separately (among other hundred different things),
leading to duplicated logic in each visitor and preventing layering as
it forces any code that manipulates i965 IR and needs to allocate
virtual registers to depend on the specific visitor that happens to be
used to translate from GLSL IR.
v2: Use realloc()/free() to allocate VGRF book-keeping arrays (Connor).
Reviewed-by: Matt Turner <[email protected]>
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The spec doesn't define any opaque type constructors.
Reviewed-by: Ian Romanick <[email protected]>
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Cubemap array images are unlike cubemap array samplers in that they don't need
an additional coordinate to index individual cubemaps in the array, instead
they behave like a 2D array of 6n layers, with n the number of cubemaps in the
array. Take this exception into account.
Reviewed-by: Ian Romanick <[email protected]>
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So the i965 driver can expose 32 image uniforms per shader stage.
Reviewed-by: Kenneth Graunke <[email protected]>
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Some people have complained that code using the CEILING() macro is
difficult to understand because it's not immediately obvious what it
is supposed to do until you go and look up its definition. Use a more
descriptive name that matches the similar utility macro in the Linux
kernel.
Reviewed-by: Matt Turner <[email protected]>
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Without this when an application issues that query, it would try to
wait the result from the gpu, and since no query has been actually
issued, it will wait forever.
Signed-off-by: Tiziano Bacocco <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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Add a specific optimisation pass for NV50 to check whether SRC0 or SRC1 is
a MOV dst, IMM. If so: fold the IMM in and try to drop the MOV. Must be
done post-RA because it requires that SDST == SSRC2.
V2: improve readability and add comments to clarify decisions
V3: Remove redundant code... compiler already attempts to put the IMM in
SSRC1
Signed-off-by: Roy Spliet <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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But don't enable generation of it in the opProperties, because we can't
guarantee the SDST==SRC2 constraint until after register assignment. We'll
add a post-RA folding pass to utilise this.
Signed-off-by: Roy Spliet <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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Add emission rules for negative and saturate flags for MAD 4-byte opcodes,
and get rid of some of the constraints. Obviously tested with a wide variety
of shaders.
V2: Document MAD as supported short form
V3: Split up IMM from short-form modifiers
Signed-off-by: Roy Spliet <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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The old way made it impossible for the optimizer to reason about what
was going on. The new way is the same number of instructions (the neg
gets folded into the cvt) but enables the optimizer to be cleverer if
comparing to a constant (most common case). [The optimizer is presently
not sufficiently clever to work this out, but it could relatively easily
be made to be. The old way would have required significant complexity to
work out.]
Signed-off-by: Ilia Mirkin <[email protected]>
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Printing instructions doesn't modify them, so we can mark the parameter
const.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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+82 Piglits - 100% of border color tests now pass on Haswell.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Chris Forbes <[email protected]>
Cc: [email protected]
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This should have no effect, but will make it easier to implement other
bug fixes.
v2: Eliminate "unsigned one" local; just use the value where necessary.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Ian Romanick <[email protected]>
Cc: [email protected]
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The hardware's integer luminance formats are completely unusable;
currently we fall back to RGBA. This means we need to override
the texture swizzle to obtain the XXX1 values expected for luminance
formats.
Fixes spec/EXT_texture_integer/texwrap formats bordercolor [swizzled]
on Broadwell - 100% of border color tests now pass on Broadwell.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Ian Romanick <[email protected]>
Reviewed-by: Chris Forbes <[email protected]>
Cc: [email protected]
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This provides for atomic addition, which will be used by an upcoming
shader-cache patch. A simple test is added to "make check" as well.
Note: The various O/S functions differ on whether they return the
original value or the value after the addition, so I did not provide
an add_return() macro which would be sensitive to that difference.
Reviewed-by: Matt Turner <[email protected]>
Reviewed-by: Aaron Watry <[email protected]>
Reviewed-by: José Fonseca <[email protected]>
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Reviewed-by: Eric Anholt <[email protected]>
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Previously, the set_insert function would bail early if it found a deleted
slot that it could re-use. However, this is a problem if the key being
inserted is already in the set but further down the list. If this happens,
the element ends up getting inserted in the set twice. This commit makes
it so that we walk over all of the possible entries for the given key and
then, if we don't find the key, place it in the available free entry we
found.
Reviewed-by: Eric Anholt <[email protected]>
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Previously, the hash_table_insert function would bail early if it found a
deleted slot that it could re-use. However, this is a problem if the key
being inserted is already in the hash table but further down the list. If
this happens, the element ends up getting inserted in the hash table twice.
This commit makes it so that we walk over all of the possible entries for
the given key and then, if we don't find the key, place it in the available
free entry we found.
Reviewed-by: Eric Anholt <[email protected]>
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For framebuffer completeness checks, consider renderbuffers as not
layered. Previously, they would have counted as layered if a layered
textured had previously been bound to the same attachment point. This
could cause framebuffer completeness checks to incorrectly fail with
GL_FRAMEBUFFER_INCOMPLETE_LAYER_TARGETS, even if no layered attachments
were present.
Reviewed-by: Chris Forbes <[email protected]>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89026
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Convert the code to try formats from an array rather than a bunch
of if/else cases.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Blits to or from a y-tiled surface must always be a multiple of the tile size.
From page 16 of the HSW PRM
(https://01.org/linuxgraphics/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-memory-views.pdf#16)
"The pitch of a tiled enclosing region must be an integral number of tile
widths"
Signed-off-by: Ben Widawsky <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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An upcoming patch is going to introduce some code here, and having this code
organized as the patch does makes it a bit easier to read later.
There should be no functional change here.
Signed-off-by: Ben Widawsky <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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Since only pp_jimenezmlaa uses depth buffer, we can make it optional.
Signed-off-by: Marek Olšák <[email protected]>
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88962
Signed-off-by: Marek Olšák <[email protected]>
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As it turns out, we were over-thinking the cause of the hang on
Cherryview. It's simply errata for Cherryview.
commit 88fea85f09e2252035bec66ab26c375b45b000f5
Author: Ben Widawsky <[email protected]>
Date: Fri Nov 21 10:47:41 2014 -0800
i965/vec4/gen8: Handle the MUL dest hazard exception
This is an explanation to why we never saw the hang on BDW.
NOTE: The problem the original patch was trying to fix does still exist. It will
have to be fixed at some point.
v2: Modify commit message, s/CHV/BDW
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84212
Signed-off-by: Ben Widawsky <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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We've probably never seen this ridiculous pattern in the wild, so it
didn't matter.
Reviewed-by: Connor Abbott <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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Reviewed-by: Jason Ekstrand <[email protected]>
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I wanted all of these for NIR-to-TGSI.
Reviewed-by: Roland Scheidegger <[email protected]>
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I wanted to use it for nir-to-tgsi. The equivalent ureg_src_register() is
also located here.
Reviewed-by: Roland Scheidegger <[email protected]>
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Reviewed-by: Glenn Kennard <[email protected]>
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This expects (0,0,0,0), though it can be changed to something else or allow
more than one set of values to be considered correct.
This is currently the radeonsi behavior.
Reviewed-by: Glenn Kennard <[email protected]>
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v2: allow one of the two values
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Reviewed-by: Glenn Kennard <[email protected]>
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Reviewed-by: Glenn Kennard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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ADD R6.y.1, R5.w.1, ~1|3f800000
ADD R6.y.2, |R6.y.1|, -0.0001|b8d1b717
was wrongly being converted to
ADD R6.y.1, R5.w.1, ~1|3f800000
ADD R6.y.2, R5.w.1, -1.0001|bf800347
because abs() modifier was ignored.
Signed-off-by: Xavier Bouchoux <[email protected]>
Reviewed-by: Glenn Kennard <[email protected]>
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Since alu does not support abs() modifier on source operands, spill
and apply the modifiers to a temp register when needed.
Signed-off-by: Xavier Bouchoux <[email protected]>
Reviewed-by: Glenn Kennard <[email protected]>
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v2: incorporated changes from Marek Olšák
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: David Heidelberg <[email protected]>
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v2 (Ian Romanick)
- Move the check to the lexer before rallocing a copy of the large string.
Fixes the following 2 dEQP tests:
dEQP-GLES3.functional.shaders.keywords.invalid_identifiers.max_length_vertex
dEQP-GLES3.functional.shaders.keywords.invalid_identifiers.max_length_fragment
Reviewed-by: Ian Romanick <[email protected]>
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We were incorrectly attributing VS time to FS8 on Gen8+, which now use
fs_visitor for vertex shaders.
We don't hit this for geometry shaders yet, but we may as well add
support now - the fix is obvious, and we'll just forget later.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
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Previously, we special cased FB writes and URB writes in the register
allocation code. What we really wanted was to handle any message with
EOT set.
This saves us from extending the list with new opcodes in the future.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Reviewed-by: Ben Widawsky <[email protected]>
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This helper function basically just checks inst->eot, but also asserts
that only opcodes we expect to terminate threads have EOT set. As far
as I'm aware, we've never had such a bug.
Removing it means that we don't have to extend the list for new opcodes.
Cherryview and Skylake introduce an optimization where sampler messages
can have EOT set; scalar GS/HS/DS will likely introduce new opcodes as
well.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Reviewed-by: Ben Widawsky <[email protected]>
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The latter currently implies CPU read access, so only PIPE_USAGE_STAGING
can be expected to be fast.
Mesa demos src/tests/streaming_rect on Kaveri (radeonsi):
Unpatched: 42 frames in 1.023 seconds = 41.056 FPS
Patched: 615 frames in 1.000 seconds = 615.000 FPS
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88658
Cc: "10.3 10.4" <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Use a dummy vertex buffer object when vs inputs have no corresponding
entries in the vertex declaration. This dummy buffer will give to the
shader float4(0,0,0,0).
This fixes several artifacts on some games.
Signed-off-by: Axel Davy <[email protected]>
Signed-off-by: Tiziano Bacocco <[email protected]>
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The drm fd wasn't released, causing a crash
for wine tests on nouveau, which seems to have
a bug when a lot of device descriptors are open.
Reviewed-by: Tiziano Bacocco <[email protected]>
Signed-off-by: Axel Davy <[email protected]>
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We weren't releasing hal and ref, causing some issues (threads not released, etc)
Reviewed-by: Tiziano Bacocco <[email protected]>
Signed-off-by: Axel Davy <[email protected]>
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When on a render node the unique ioctl doesn't work.
This patch drops the code to detect the device, which relied
on an ioctl, and replaces it by the mesa loader function.
The mesa loader function is more complete and won't fail for render-nodes.
Alternatively we could also have used the pipe cap to
determine the vendor and device id from the driver.
Reviewed-by: Tiziano Bacocco <[email protected]>
Signed-off-by: Axel Davy <[email protected]>
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Reviewed-by: Tiziano Bacocco <[email protected]>
Signed-off-by: Axel Davy <[email protected]>
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render to
Reviewed-by: Tiziano Bacocco <[email protected]>
Signed-off-by: Axel Davy <[email protected]>
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