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* glsl: call set_shader_inout_layout() earlierTimothy Arceri2015-11-211-3/+3
| | | | | | | | This will allow us to add error checking to this function in a later patch, if we don't move it the error messages will go missing. Reviewed-by: Emil Velikov <[email protected]>
* glsl: replace binding layout min boundary checkTimothy Arceri2015-11-211-11/+12
| | | | | | | Use new helper that will in a later patch allow for compile time constants. Reviewed-by: Emil Velikov <[email protected]>
* glsl: encapsulate binding validation and settingTimothy Arceri2015-11-211-32/+28
| | | | | | | | | | | | | | | | | | This change moves the binding layout handing code into an apply function to be consistent with other helper functions in the ast code, and to encapsulate the code so that when we introduce compile time constants the code will be much cleaner. One small downside is for unnamed interface blocks we will now be revalidating the binding for each member its applied to. However this seems a small sacrifice in order to have code which is readable. We also remove the incorrect comment in the named interface code about propagating bindings to members which seems to have been copied from the unnamed interface code. Reviewed-by: Emil Velikov <[email protected]>
* glsl: move stream layout max validationTimothy Arceri2015-11-212-16/+19
| | | | | | | | | This validation is moved later so we can validate the max value when compile time constant support is added in a later patch. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* glsl: move stream layout qualifier validationTimothy Arceri2015-11-212-20/+35
| | | | | | | | | | | | | | | | | We are moving this out of the parser in preparation for compile time constant support. The reason a validation function is used rather than an apply function like what is used with bindings is because glsl allows streams to be defined on members of blocks even though they must match the stream thats associated with the current block, this means we need access to the value after validation to do this comparision. V2: Fix typo in comment (Emil) Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* glsl: replace index layout min boundary checkTimothy Arceri2015-11-211-3/+6
| | | | | | | | Use new helper that will in a later patch allow for compile time constants. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* glsl: remove duplicate validation for index layout qualifierTimothy Arceri2015-11-211-7/+1
| | | | | | | | | The minimum value for index is validated in apply_explicit_location() and we want to remove validation from the parser so we can add compile time constant support. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* glsl: move location layout qualifier validationTimothy Arceri2015-11-212-15/+15
| | | | | | | | We are moving this out of the parser in preparation for compile time constant support. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* glsl: add process_qualifier_constant() helperTimothy Arceri2015-11-211-0/+17
| | | | | | | | | For now this just validates that a qualifier is inside its minimum boundary, in a later patch we will expand it to evaluate compile time constants. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* nv50: expose two groups of compute-related MP perf countersSamuel Pitoiset2015-11-206-2/+63
| | | | | | | This turns on GL_AMD_performance_monitor. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* i965/gen9: Support fast clears for 32b floatBen Widawsky2015-11-202-10/+6
| | | | | | | | | | | | | | SKL supports the ability to do fast clears and resolves of 32b RGBA as both integer and floats. This patch only enables float color clears because we haven't yet enabled integer color clears, (HW support for that was added in BDW). v2: Remove LUMINANCE16F and INTENSITY16F special cases since they are now handled by Neil's patch to disable MSAA fast clears. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Neil Roberts <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* Revert "i965/gen9: Enable rep clears on gen9"Ben Widawsky2015-11-201-5/+0
| | | | | | | | | This reverts commit 8a0c85b25853decb4a110b6d36d79c4f095d437b. It's not a strict revert because I don't want to bring back the gen < 9 check at this point in time. Reviewed-by: Neil Roberts <[email protected]>
* Revert "i965/gen9: Disable MCS for 1x color surfaces"Ben Widawsky2015-11-201-8/+0
| | | | | | This reverts commit dcd59a9e322edeea74187bcad65a8e56c0bfaaa2. Reviewed-by: Neil Roberts <[email protected]>
* i965/meta/gen9: Individually fast clear color attachmentsBen Widawsky2015-11-201-13/+65
| | | | | | | | | | | | | | | | | | | The impetus for this patch comes from a seemingly benign statement within the spec (quoted within the patch). It is very important for clearing multiple color buffer attachments and can be observed in the following piglit tests: spec/arb_framebuffer_object/fbo-drawbuffers-none glclear spec/ext_framebuffer_multisample/blit-multiple-render-targets 0 v2: Doing the framebuffer binding only once (Chad) Directly use the renderbuffers from the mt (Chad) v3: Patch from Neil whose feedback I originally missed. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* i965/skl: skip fast clears for certain surface formatsBen Widawsky2015-11-202-27/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the information originally in this commit message is now in the patch before this. SKL adds compressible render targets and as a result mutates some of the programming for fast clears and resolves. There is a new internal surface type called the CCS. The old AUX_MCS bit becomes AUX_CCS_D. "Auxiliary Surfaces For Sampled Tiled Resource". The formats which are supported are defined in the table titled "Render Target Surface Types [SKL+]". There is no PRM yet to reference. The previously implemented helper function already does the right thing provided the table is correct. v2: Use better English in commit message (Matt) s/compressable/compressible/ (Matt) Don't compare bools to true (Matt) Use the helper function and don't increase the context size - this is mostly implemented in the patch just before this (Chad, Neil) Remove an "invalid" assert (Chad) Fix assertion to check num_samples > 1, instead of num_samples (Chad) v3: Use Matt's code as Requested-by: Chad. I didn't even look at it since Chad said he was fine with that, and presumably Matt is fine with it. v4: Use better quote from spec (Topi) Cc: Chad Versace <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Add lossless compression to surface format tableBen Widawsky2015-11-203-252/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Background: Prior to Skylake and since Ivybridge Intel hardware has had the ability to use a MCS (Multisample Control Surface) as auxiliary data in "compression" operations on the surface. This reduces memory bandwidth. This hardware was either used for MSAA compression, or fast clear operations. On Gen8, a similar mechanism exists to allow the hiz buffer to be sampled from, and therefore this feature is sometimes referred to more generally as "AUX buffers". Skylake adds the ability to have the display engine directly source compressed surfaces on top of the ability to sample from them. Inference dictates that enabling this display features adds a restriction to the formats which could actually be compressed. This is backed up by a blurb in the AUX_CCS_D section from the RENDER_SURFACE_STATE: "In addition, if the surface is bound to the sampling engine, Surface Format must be supported for Render Target Compression for surfaces bound to the sampling engine." The current set of surfaces seems to be a subset as compared to previous gens (see the next patch). Also, if I had to guess I would guess that future gens add support for more surface formats. To make handling this a bit easier to read, and more future proof, the support for this is moved into the surface formats table. Along with the modifications to the table, a helper function is also provided to determine if a surface is CCS_E compatible. Because fast clears are currently disabled on SKL, we can plumb the helper all the way through here, and not actually have anything break. v2: - rename ccs to ccs_e; Requested-by: Chad - rename lossless_compression to lossless_compression Requested-by: Chad - change meaning of brw_losslessly_compressible_format Requested-by: Chad - related changes to the code to reflect this. - remove excess ccs (Chad) v3: - Commit message changes (Topi) - Const some things which could be const (Topi) Requested-by: Chad Versace <[email protected]> Requested-by: Neil Roberts <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/skl: Add fast color clear infrastructureBen Widawsky2015-11-204-20/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch was originally called: i965/skl: Enable fast color clears on SKL Skylake introduces some differences in the way that fast clears are programmed and in the restrictions for using fast clears. Since some of these are non-obvious, and fast clears are currently disabled globally, we can enable the simple stuff here and leave the weirder stuff and separately reviewable work. Based on a patch originally from Kristian. Note that within this patch the change in scaling factors could be achieved with this hunk instead. I've opted to keep things more like how the docs describe it however. --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -150,9 +150,13 @@ intel_get_non_msrt_mcs_alignment(struct brw_context *brw, /* In release builds, fall through */ case I915_TILING_Y: *width_px = 32 / mt->cpp; - *height = 4; + if (brw->gen >= 9) + *height = 2; + else + *height = 4; v2: Add braces for the multiline (Matt + Chad) Comment updates (requested by Chad) Modified commit message Commit message from Chad explaining the MCS height change (Chad) Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Neil Roberts <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* radeon/vce: disable two pipe mode for stoneyLeo Liu2015-11-201-1/+2
| | | | | | | | Only one encoding pipe available for Stoney Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vce: add new firmware interface supportLeo Liu2015-11-204-5/+262
| | | | | | | | Add new interface to create and encode Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* egl: don't forget to ship platform_x11_dri3.h into the tarballEmil Velikov2015-11-201-1/+3
| | | | | | Should have been a part of f35198badeb Signed-off-by: Emil Velikov <[email protected]>
* glsl: move builtin_type_macros.h into the correct listEmil Velikov2015-11-201-1/+1
| | | | | | | Commit b9b40ef9b76 moved the file, but forgot to update the reference in the makefile. Thus the out of tree build was busted :\ Signed-off-by: Emil Velikov <[email protected]>
* mesa: remove unused var in _mesa_PushDebugGroup()Brian Paul2015-11-201-1/+0
| | | | Trivial.
* mesa: whitespaces fixes in _mesa_one_time_init_extension_overrides()Brian Paul2015-11-201-6/+7
| | | | Trivial.
* radeon: ensure that timing/profiling queries are suspended on flushNicolai Hähnle2015-11-202-9/+6
| | | | | | | The queries_suspended_for_flush flag is redundant because suspended queries are not removed from their respective linked list. Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: add support for batch driver queries to perfmonNicolai Hähnle2015-11-202-7/+82
| | | | | | | v2 + v3: forgot null-pointer checks (spotted by Samuel Pitoiset) Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Samuel Pitoiset <[email protected]>
* gallium/hud: add support for batch queriesNicolai Hähnle2015-11-203-46/+261
| | | | | | | v2 + v3: be more defensive about allocations Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Samuel Pitoiset <[email protected]>
* gallium: add the concept of batch queriesNicolai Hähnle2015-11-204-6/+42
| | | | | | | | | | | | | | | | | Some drivers (in particular radeon[si], but also freedreno judging from a quick grep) may want to expose performance counters that cannot be individually enabled or disabled. Allow such drivers to mark driver-specific queries as requiring a new type of batch query object that is used to start and stop a list of queries simultaneously. v3: adjust recently added nv50 queries v2: documentation for create_batch_query Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Samuel Pitoiset <[email protected]>
* st/mesa: maintain active perfmon counters in an arrayNicolai Hähnle2015-11-202-41/+58
| | | | | | | | | | | It is easy enough to pre-determine the required size, and arrays are generally better behaved especially when they get large. v2: make sure init_perf_monitor returns true when no counters are active (spotted by Samuel Pitoiset) Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Samuel Pitoiset <[email protected]>
* st/mesa: use BITSET_FOREACH_SET to loop through active perfmon countersNicolai Hähnle2015-11-201-5/+2
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Samuel Pitoiset <[email protected]>
* st/mesa: store mapping from perfmon counter to query typeNicolai Hähnle2015-11-203-42/+49
| | | | | | | | | Previously, when a performance monitor was initialized, an inner loop through all driver queries with string comparisons for each enabled performance monitor counter was used. This hurts when a driver exposes lots of queries. Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Samuel Pitoiset <[email protected]>
* st/mesa: map semantic driver query types to underlying typeNicolai Hähnle2015-11-202-0/+5
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Samuel Pitoiset <[email protected]>
* gallium/hud: remove unused field in query_infoNicolai Hähnle2015-11-201-1/+0
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Samuel Pitoiset <[email protected]>
* gallium: remove pipe_driver_query_group_info field typeNicolai Hähnle2015-11-203-41/+0
| | | | | | | | | | | | | | | | | | | This was only used to implement an unnecessarily restrictive interpretation of the spec of AMD_performance_monitor. The spec says A performance monitor consists of a number of hardware and software counters that can be sampled by the GPU and reported back to the application. I guess one could take this as a requirement that counters _must_ be sampled by the GPU, but then why are they called _software_ counters? Besides, there's not much reason _not_ to expose all counters that are available, and this simplifies the code. v3: add a missing change in the nouveau driver (thanks Samuel Pitoiset) Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Samuel Pitoiset <[email protected]>
* gallivm: use sampler index 0 for texel fetchesRoland Scheidegger2015-11-201-1/+6
| | | | | | | | | | | | | texel fetches don't use any samplers. Previously we just set the same number for both texture and sampler unit (as per "ordinary" gl style sampling where the numbers are always the same) however this would trigger some assertions checking that the sampler index isn't over PIPE_MAX_SAMPLERS limit elsewhere with d3d10, so just set to 0. (Fixing the assertion instead isn't really an option, the sampler isn't really used but might still pass an out-of-bound pointer around and even copy some things from it.) Reviewed-by: Jose Fonseca <[email protected]>
* freedreno/a4xx: add BPTC supportIlia Mirkin2015-11-202-0/+8
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* xmlconfig: Add support for DragonFlyFrançois Tigeot2015-11-201-0/+3
| | | | Signed-off-by: Emil Velikov <[email protected]>
* android: export the path of glsl nir headersMauro Rossi2015-11-201-1/+2
| | | | | | | The change is necessary to avoid building errors in glsl and i965 modules due to missing glsl_types.h header Signed-off-by: Emil Velikov <[email protected]>
* mesa: re-enable KHR_debug for ES contextsBoyan Ding2015-11-201-1/+1
| | | | | | | With the earlier issues resolved we can expose the extension. Signed-off-by: Boyan Ding <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* main: Don't restrict several KHR_debug enum to desktop GLBoyan Ding2015-11-202-12/+3
| | | | | | | | | In preparation for supporting GL_KHR_debug in OpenGL ES v2: add a missing hunk in _mesa_IsEnabled (Emil) Signed-off-by: Boyan Ding <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: use the correct string for the ES GL_KHR_debug functionsEmil Velikov2015-11-203-19/+77
| | | | | | | | | As defined in the spec when implemented in an OpenGL ES context, all entry points defined by this extension must have a "KHR" suffix. Signed-off-by: Emil Velikov <[email protected]>
* glsl: avoid linker and user varying location to overlapGregory Hainaut2015-11-201-3/+43
| | | | | | | | | | | | | | | | | | Current behavior on the interface matching: layout (location = 0) out0; // Assigned to VARYING_SLOT_VAR0 by user out1; // Assigned to VARYING_SLOT_VAR0 by the linker New behavior on the interface matching: layout (location = 0) out0; // Assigned to VARYING_SLOT_VAR0 by user out1; // Assigned to VARYING_SLOT_VAR1 by the linker v4: * Fix variable name in assert Signed-off-by: Gregory Hainaut <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* auxiliary/vl/dri2: coding style fixesEmil Velikov2015-11-202-22/+34
| | | | | | | Rewrap long(ish) lines, add space between struct foo and *. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Alex Deucher <[email protected]>
* auxiliary/vl/dri2: hide internal functionsEmil Velikov2015-11-202-34/+20
| | | | | | | | Analogous to previous commit. While we're here prefix all functions identically -> vl_dri2_foo Signed-off-by: Emil Velikov <[email protected]> Acked-by: Alex Deucher <[email protected]>
* auxiliary/vl/drm: hide internal functionsEmil Velikov2015-11-202-5/+5
| | | | | | | | As of last commit everyone is using the vl_screen dispatch, thus we can hide this function from the headers and make it static. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Alex Deucher <[email protected]>
* st/vdpau: use the vl_screen dispatchEmil Velikov2015-11-202-11/+11
| | | | | Signed-off-by: Emil Velikov <[email protected]> Acked-by: Alex Deucher <[email protected]>
* st/xvmc: use the vl_screen dispatchEmil Velikov2015-11-202-12/+11
| | | | | Signed-off-by: Emil Velikov <[email protected]> Acked-by: Alex Deucher <[email protected]>
* st/va: use the vl_screen dispatchEmil Velikov2015-11-203-16/+9
| | | | | Signed-off-by: Emil Velikov <[email protected]> Acked-by: Alex Deucher <[email protected]>
* st/omx: use the vl_screen dispatchEmil Velikov2015-11-201-6/+5
| | | | | Signed-off-by: Emil Velikov <[email protected]> Acked-by: Alex Deucher <[email protected]>
* auxiliary/vl/dri2: setup the dispatchEmil Velikov2015-11-202-8/+15
| | | | | Signed-off-by: Emil Velikov <[email protected]> Acked-by: Alex Deucher <[email protected]>
* auxiliary/vl/drm: use a label for the error pathEmil Velikov2015-11-201-6/+10
| | | | | | | ... just like every other place in gallium. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Alex Deucher <[email protected]>
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