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* radv: use simpler indirect packet 3 if possible.Dave Airlie2017-09-071-14/+23
* radv/gfx9: allocate events from uncached VA spaceDave Airlie2017-09-073-3/+8
* radv/winsys: use amdgpu_bo_va_op_raw.Dave Airlie2017-09-071-7/+24
* Revert "st/va: add enviromental variable to disable interlace"Leo Liu2017-09-071-4/+0
* st/va: move YUV content to deinterlaced buffer when reallocated for encoderLeo Liu2017-09-071-1/+10
* st/va: reallocate the buffer if the layout isn't supportedLeo Liu2017-09-071-9/+12
* vl/compositor: make vl_compositor_set_yuv_layer() staticLeo Liu2017-09-072-44/+28
* st/omx: use vl/compositor helper function for YUV deinterlacingLeo Liu2017-09-071-30/+2
* vl/compositor: make a helper function for YUV deinterlacingLeo Liu2017-09-072-0/+40
* ac/surface: add radeon_surf::has_stencil for convenienceMarek Olšák2017-09-0711-14/+18
* mesa/st/tests: Fix regressions with libunwind enabled introduced with 7be6d8fe12Gert Wollny2017-09-071-0/+1
* mesa/st/tests: Fix classic build regressions introduced with 7be6d8fe12Gert Wollny2017-09-071-1/+6
* mesa/main: Fix GetTransformFeedbacki64 for glTransformFeedbackBufferBaseIago Toral Quiroga2017-09-071-0/+22
* radeonsi: don't read tcs_out_lds_layout.patch_stride from an SGPRMarek Olšák2017-09-071-6/+14
* radeonsi: don't read tcs_out_lds_layout.vertex_size from an SGPRMarek Olšák2017-09-073-6/+20
* radeonsi/gfx9: don't read LS out vertex stride from an SGPR in monolithic HSMarek Olšák2017-09-072-1/+11
* radeonsi: don't read the LS output vertex stride from an SGPR in LSMarek Olšák2017-09-071-4/+21
* radeonsi: don't read the number of TCS out vertices from an SGPR in TCSMarek Olšák2017-09-071-2/+15
* radeonsi: don't always apply the PrimID instancing bug workaround on SIMarek Olšák2017-09-071-1/+1
* radeonsi: remove 2 callbacks from si_shader_contextMarek Olšák2017-09-073-17/+13
* winsys/amdgpu: disable local BOs on RavenMarek Olšák2017-09-071-1/+2
* disk_cache: make the thread queue resizable and low priorityMarek Olšák2017-09-071-6/+8
* loader/dri3: Make sure we invalidate a drawable on size changeThomas Hellstrom2017-09-071-0/+2
* loader/dri3: Process event after each fence waitThomas Hellstrom2017-09-071-7/+10
* st/mesa: skip draw calls with pipe_draw_info::count == 0Marek Olšák2017-09-071-1/+6
* radv: do not use a bitfield when dirtying the vertex buffersSamuel Pitoiset2017-09-072-3/+4
* radv: remove unused radv_meta_saved_state::vertex_saved fieldSamuel Pitoiset2017-09-072-8/+0
* mesa: allow user to set MESA_NO_ERROR=0Eric Engestrom2017-09-071-1/+2
* util: rename include guard to avoid clashEric Engestrom2017-09-071-3/+3
* llvmpipe, tgsi: hook up dx10 gather4 opcodeRoland Scheidegger2017-09-072-8/+25
* llvmpipe, draw: increase shader cache limitsRoland Scheidegger2017-09-072-4/+2
* ac/surface: reduce gfx9_surface_layout size.Dave Airlie2017-09-071-2/+3
* radv: reduce radv_amdgpu_winsys struct size.Dave Airlie2017-09-071-3/+3
* radv: reduce radv_image struct size.Dave Airlie2017-09-071-3/+2
* radv: reduce radv_shader_variant struct size.Dave Airlie2017-09-071-1/+1
* radv: reduce radv_cmd_state struct size.Dave Airlie2017-09-071-2/+2
* radv: reduce meta_saved_state struct size.Dave Airlie2017-09-071-4/+3
* nir: put compact into bitfields in nir_variable_dataDave Airlie2017-09-071-1/+1
* anv: Annotate entrypoint table with index and func nameChad Versace2017-09-061-2/+2
* radeon/uvd: fix the assertion check for YUYV formatLeo Liu2017-09-061-3/+5
* intel: Remove unused device info for KBL GT1.5Anuj Phogat2017-09-061-11/+0
* mesa: replace date/time macros with MESA_GIT_SHA1Emil Velikov2017-09-061-3/+7
* mesa: don't use %s for PACKAGE_VERSION macroEmil Velikov2017-09-062-4/+4
* egl/x11: advertise __DRI_USE_INVALIDATE for DRI2Emil Velikov2017-09-061-0/+1
* egl/x11/dri3: adding missing __DRI_BACKGROUND_CALLABLE extensionEmil Velikov2017-09-061-0/+1
* i965: expose RGBA visuals only on AndroidEmil Velikov2017-09-061-1/+22
* swr/rast: FE/Clipper - unify SIMD8/16 functions using simdlib typesTim Rowley2017-09-063-1189/+446
* swr/rast: Remove use of C++14 template variableTim Rowley2017-09-062-6/+14
* swr/rast: SIMD16 FE remove templated immediates workaroundTim Rowley2017-09-061-90/+20
* swr/rast: SIMD16 PA - rename Assemble_simd16 to AssembleTim Rowley2017-09-063-31/+15
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