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* r600: Make enum alu_op_flags unsignedRob Herring2016-02-291-8/+8
| | | | | | | | | | | | | | | | | | In builds with clang, there are several errors related to the enum alu_op_flags like this: src/gallium/drivers/r600/sb/sb_expr.cpp:887:8: error: case value evaluates to -1610612736, which cannot be narrowed to type 'unsigned int' [-Wc++11-narrowing] These are due to the MSB being set in the enum. Fix these errors by making the enum values unsigned as needed. The flags field that stores this enum also needs to be unsigned. Cc: "11.1 11.2" <[email protected]> Cc: Marek Olšák <[email protected]> Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: Add space between string literal and identifierRob Herring2016-02-291-1/+1
| | | | | | | | | | | | | Fix compiles with clang that have this C++11 error: src/gallium/drivers/radeon/r600_pipe_common.h:662:34: error: invalid suffix on literal; C++11 requires a space between literal and identifier [-Wreserved-user-defined-literal] Cc: "11.1 11.2" <[email protected]> Cc: Marek Olšák <[email protected]> Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* freedreno: drop unnecessary -Wno-packed-bitfield-compatRob Herring2016-02-291-2/+2
| | | | | | | | | | | | Enabling this warning doesn't generate any warnings with gcc, but is an unknown option for clang, so drop it. Signed-off-by: Rob Herring <[email protected]> Acked-by: Rob Clark <[email protected]> (v1) Cc: "11.1 11.2" <[email protected]> v2: keep the warning around, commented out Signed-off-by: Emil Velikov <[email protected]>
* Android: clean-up and fix DRI module path handlingRob Herring2016-02-295-9/+7
| | | | | | | | | | | | | | | MESA_DRI_MODULE_PATH is only getting set for classic DRI drivers and may or may not be set correctly for gallium_dri.so depending on the makefile include ordering. For Android 6 and earlier it is fine, but with build system changes in AOSP master, it is not. Move the path variables to a single place at the top level and introduce MESA_DRI_MODULE_REL_PATH for Android 5 and later which require relative paths. With this, there is a single variable to change. Cc: "11.1 11.2" <[email protected]> Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Android: glsl: fix dependence on YACC_HEADER_SUFFIX from build systemRob Herring2016-02-291-0/+2
| | | | | | | | | | The makefile was implicitly picking up YACC_HEADER_SUFFIX from the Android build system, but this variable is now gone. Add it locally to fix the build with AOSP master. Cc: "11.1 11.2" <[email protected]> Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Android: remove dependence on .SECONDEXPANSIONRob Herring2016-02-291-9/+13
| | | | | | | | | | With the Android build system changes to ninja/kati, the use of .SECONDEXPANSION is no longer supported. Fix this by avoiding rule specific variables and using $(transform-generated-source). Cc: "11.1 11.2" <[email protected]> Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Android: fix build break from nir/glsl move to compiler/Rob Herring2016-02-2916-19/+29
| | | | | | | | | | | | | | | | Commits a39a8fbbaa12 ("nir: move to compiler/") and eb63640c1d38 ("glsl: move to compiler/") broke Android builds. Fix them. There is also a missing dependency between generated NIR headers and several libraries. This isn't a new issue, but seems to have been exposed by the NIR move. Built with i915, i965, freedreno, r300g, r600g, vc4, and virgl enabled. Cc: "11.2" <[email protected]> Cc: Mauro Rossi <[email protected]> Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gallium/radeon: disable evergreen_do_fast_color_clear for BEOded Gabbay2016-02-291-0/+5
| | | | | | | | | | | | | | | | This function is currently broken for BE. I assume it's because of util_pack_color(). Until I fix this path, I prefer to disable it so users would be able to see correct colors on their desktop and applications. Together with the two following patches: - gallium/r600: Don't let h/w do endian swap for colorformat - gallium/radeon: remove separate BE path in r600_translate_colorswap it fixes BZ#72877 and BZ#92039 Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/r600: Don't let h/w do endian swap for colorformatOded Gabbay2016-02-291-0/+7
| | | | | | | | | | | | | | Since the rework on gallium pipe formats, there is no more need to do endian swap of the colorformat in the h/w, because the conversion between mesa format and gallium (pipe) format takes endianess into account (see the big #if in p_format.h). v2: return ENDIAN_NONE only for four 8-bits components (V_0280A0_COLOR_8_8_8_8) Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: remove separate BE path in r600_translate_colorswapOded Gabbay2016-02-291-12/+1
| | | | | | | | | | | | | | | | | | | | After further testing, it appears there is no need for separate BE path in r600_translate_colorswap() The only fix remaining is the change of the last if statement, in the 4 channels case. Originally, it contained an invalid swizzle configuration that never got hit, in LE or BE. So the fix is relevant for both systems. This patch adds an additional 120 available visuals for LE and BE, as seen in glxinfo v2: Tested for regressions by running piglit gpu.py with CAICOS (r600g) on x86-64 machine. No regressions found. Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* nv50/ir: emit VOTE instructionSamuel Pitoiset2016-02-286-0/+83
| | | | | | | | Changes from v2: - add missing NOT modifier for GK110/GM107 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add ld lock/st unlock emissionSamuel Pitoiset2016-02-281-2/+28
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50,nvc0: bump minimum texture buffer offset alignmentIlia Mirkin2016-02-272-2/+2
| | | | | | | | It appears that it actually needs to be aligned to the datum size, so it was 1 when testing with R8, but it can be as high as 16 with RGBA32. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
* mesa: add GL_OES_gpu_shader5 and GL_EXT_gpu_shader5 supportIlia Mirkin2016-02-277-57/+92
| | | | | | | | | | | The two extensions are identical, and are largely taking bits of already existing desktop functionality. We continue to do a poor job of supporting the 'precise' keyword, just like we do on desktop. This passes the relevant dEQP tests that I could find. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* mesa: expose GL_EXT_texture_sRGB_decode on GLES 3.0+Ilia Mirkin2016-02-262-3/+2
| | | | | | | | Could be exposed on earlier GLES versions if we supported EXT_sRGB, but we don't, for now. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* i965/cfg: Fix comment list punctuationIan Romanick2016-02-261-1/+1
| | | | | | Trivial Signed-off-by: Ian Romanick <[email protected]>
* i965/cfg: Split out dead control flow paths to simplify both pathsIan Romanick2016-02-261-55/+38
| | | | | | | v2: Fix some bad indentation. Suggested by Curro. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/cfg: Don't handle fully empty if/else/endifIan Romanick2016-02-261-10/+4
| | | | | | | | | | This will now never occur. The empty if-else part would have already been removed leaving an empty if-endif part. No shader-db changes. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/cfg: Eliminate an empty then-branch of an if/else/endifIan Romanick2016-02-261-0/+14
| | | | | | | | | | | | | | | | On BDW, total instructions in shared programs: 8448571 -> 8448367 (-0.00%) instructions in affected programs: 21000 -> 20796 (-0.97%) helped: 116 HURT: 0 v2: Remove spurious attempt to combine the if_block with the (removed!) else_block. Suggested by Matt and Curro. Correct the comment describing what the new pass does. Suggested by Matt. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/cfg: Track prev_block and prev_inst explicitly in the whole functionIan Romanick2016-02-261-5/+7
| | | | | | | | This provides a trivial simplification now, and it makes some future changes more straight forward. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/cfg: Slightly rearrange dead_control_flow_eliminateIan Romanick2016-02-261-56/+57
| | | | | | | | | 'git diff -w' is a bit more illustrative. A couple declarations were moved, the continue was removed, and the code was reindented. This will simplify future changes. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: Simplify brw_nir_lower_vue_inputs() slightly.Kenneth Graunke2016-02-261-11/+6
| | | | | | | The same code appeared in both branches; pull it above the if statement. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Avoid recalculating the normal VUE map for IO lowering.Kenneth Graunke2016-02-264-51/+30
| | | | | | | | The caller already computes it. Now that we have stage specific functions, it's really easy to pass this in. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Avoid recalculating the tessellation VUE map for IO lowering.Kenneth Graunke2016-02-264-26/+25
| | | | | | | | The caller already computes it. Now that we have stage specific functions, it's really easy to pass this in. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Eliminate brw_nir_lower_{inputs,outputs,io} functions.Kenneth Graunke2016-02-267-93/+33
| | | | | | | | | | | | Now that each stage is directly calling brw_nir_lower_io(), and we have per-stage helper functions, it makes sense to just call the relevant one directly, rather than going through multiple switch statements. This also eliminates stupid function parameters, such as the two that only apply to vertex attributes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Split brw_nir_lower_inputs/outputs into per-stage functions.Kenneth Graunke2016-02-261-130/+174
| | | | | | | | These functions are both giant switch statements where most cases don't overlap at all. Let's put the bulk of the work in per-stage helpers. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Remove catch-all nir_lower_io call with specific cases.Kenneth Graunke2016-02-261-1/+4
| | | | | | | | | Most cases already call nir_lower_io explicitly for input and output lowering. This catch all isn't very useful anymore - we can just add it to the remaining cases. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Move optimizations from brw_nir_lower_io to brw_postprocess_nir.Kenneth Graunke2016-02-261-1/+3
| | | | | | | | | | This simplifies things. Every caller of brw_nir_lower_io() immediately calls brw_postprocess_nir(). The only real change this will have is that we get an extra brw_nir_optimize() call when compiling compute shaders, but that seems fine. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Always do NIR IO lowering at specialization time.Kenneth Graunke2016-02-262-8/+1
| | | | | | | | | | | | | | We've now hit literally every case other than geometry shaders (and compute shaders, but those are a no-op). So, let's just move geometry shaders over too and be done with it. The only advantage to doing this at link time was to save the expense of running the pass on recompiles. But we're already running a lot of passes, and the extra code complexity isn't worth it. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Make an is_scalar boolean in brw_compile_gs().Kenneth Graunke2016-02-261-4/+4
| | | | | | | | | Shorter than compiler->scalar_stage[MESA_SHADER_GEOMETRY], which can help with line-wrapping. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/nir: Do lower_io late for fragment shadersJason Ekstrand2016-02-262-1/+3
| | | | | | | | | | | | The Vulkan driver wants to be able to delete fragment outputs that are beyond key.nr_color_regions; this is a lot easier if we lower outputs at specialization time rather than link time. (Rationale added to commit message by Ken) Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Set dest type to UW for several send messagesJordan Justen2016-02-262-2/+5
| | | | | | | | | | | | | | Without this, on SIMD 16 the send instruction destination will appear to write more than one destination register, causing the simulator to report an error. Of course, the send instruction can actually write more than one destination register regardless of the type set for the destination, so this is a bit strange. Suggested-by: Kenneth Graunke <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* nvc0: rework nvc0_compute_validate_program()Samuel Pitoiset2016-02-266-44/+20
| | | | | | | | | | Reduce the amount of duplicated code by re-using nvc0_program_validate(). While we are at it, change the prototype to return void and remove nvc0_compute.h which is now useless. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre Moreau <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: make sure to validate compute global buffers on FermiSamuel Pitoiset2016-02-261-1/+3
| | | | | | | | | No reason to not validate those global buffers and this might avoid fails if someone try to use the global memory from compute programs. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre Moreau <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: move nvc0_validate_global_residents() to nvc0_compute.cSamuel Pitoiset2016-02-264-19/+17
| | | | | | | | | While we are at it, rename it to nvc0_compute_validate_globals() and update its prototype. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre Moreau <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* egl/wayland: Try to use wl_surface.damage_buffer for SwapBuffersWithDamageDerek Foreman2016-02-261-3/+36
| | | | | | | | | | | | | | | | | Since commit d1314de293e9e4a63c35f094c3893aaaed8580b4 we ignore damage passed to SwapBuffersWithDamage. Wayland 1.10 now has functionality that allows us to properly process those damage rectangles, and a way to query if it's available. Now we can use wl_surface.damage_buffer and interpret the incoming damage as being in buffer co-ordinates. Cc: "11.1 11.2" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Pekka Paalanen <[email protected]> Signed-off-by: Derek Foreman <[email protected]>
* virgl: add missing CAP turned off.Dave Airlie2016-02-261-0/+3
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* program: Remove extra reference_program()Miklós Máté2016-02-251-2/+0
| | | | | | It was already done in get_mesa_program() Signed-off-by: Marek Olšák <[email protected]>
* st/nine: don't forget to bundle the nine_limits.h fileEmil Velikov2016-02-251-0/+1
| | | | | | | | Without this mesa 11.2.0-rc1 ended up busted :-( Cc: "11.2" <[email protected]> Repored-by: Ondřej Súkup <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* i965/fs: Allow saturate propagation to propagate negations into MADs.Matt Turner2016-02-251-0/+4
| | | | | | | | | | | | | | | | Allows us to transform mad res src0 src1 src2 mov.sat dst -res into mad.sat dst -src0 -src1 src2 instructions in affected programs: 3712 -> 3688 (-0.65%) helped: 24 Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Allow saturate propagation to propagate negations into ADDs.Matt Turner2016-02-252-4/+52
| | | | | | | | | | | | | | | Allows us to transform add res src0 src1 mov.sat dst -res into add.sat dst -src0 -src1 No shader-db changes. Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Allow saturate propagation to propagate negations into MULs.Matt Turner2016-02-252-3/+137
| | | | | | | | | | | | | | | | Allows us to transform mul res src0 src1 mov.sat dst -res into mul.sat dst src0 -src1 instructions in affected programs: 45246 -> 45054 (-0.42%) helped: 162 Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Don't CSE negated multiplies with saturation.Matt Turner2016-02-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | It's not correct to CSE these multiplies mul.sat dst1, -a, b mul.sat dst2, a, b by emitting a negated MOV from dst1 to dst2: mul.sat dst1, -a, b mov dst2, -dst1 Take 2.0*2.0 for example. The first multiply would produce 0.0 and the second would produce 1.0. Fixes bad generated code in 18 to 22 shaders: instructions in affected programs: 432 -> 464 (7.41%) helped: 4 HURT: 18 Cc: [email protected] Reviewed-by: Ian Romanick <[email protected]>
* glsl: Consider ubo_load to be a horizontal operation.Matt Turner2016-02-251-0/+1
| | | | | | | | | | Unclear to me whether it actually is a horizontal operation that cannot be vectorized, but the fact that i965 generates the same code in either case makes me less interested in finding out. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94199 Reviewed-by: Kenneth Graunke <[email protected]>
* glsl/ast: Implicit conversion from double to float is not allowedAndres Gomez2016-02-251-4/+3
| | | | | | | | Also, renamed get_conversion_operation to avoid future misunderstandings. Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* gallium/radeon: return correct values for BE in r600_translate_colorswapOded Gabbay2016-02-251-4/+4
| | | | | | | | | | | | | | | Because I changed the swizzle check, I also need to adapt the return values for each check. It's basically almost the same as before, we just cross between STD and STD_REV, and cross between ALT and ALT_REV This fixes the rgba test in gl-1.0-readpixsanity (piglit) and also fixes tri-flat (mesa demos). Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: remove duplicate define from enum pipe_formatOded Gabbay2016-02-251-1/+0
| | | | | | Signed-off-by: Oded Gabbay <[email protected]> Reviewed-by: Thomas Helland <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* glsl: Detect do-while-false loops and unroll themIan Romanick2016-02-241-4/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously loops like do { // ... } while (false); that did not have any other loop-branch instructions would not be unrolled. This is commonly used to wrap multiline preprocessor macros. This produces IR like (loop ( ... break )) Since limiting_terminator was NULL, the loop unroller would throw up its hands and say, "I don't know how many iterations. How can I unroll this?" We can detect this another way. If there is no limiting_terminator and the only loop-branch is a break as the last IR, there's only one iteration. On my very old checkout of shader-db, this removes a loop from Orbital Explorer, but it does not otherwise affect the shader. The loop removed is the one the compiler inserts surrounding the switch statement. This change does prevent some seriously bad code generation in some patches to meta shaders that I recently sent out for review. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* i965: Enable tiled mem_copy with sRGB-formatted resourcesNanley Chery2016-02-241-2/+6
| | | | | | | | | | | RGBA8 and BGRA8 unorm formats are compatible with the various mem_copy functions. Their sRGB counterparts are also compatible because they're also color-renderable (of importance when the specified resource is a readbuffer) and they share the same physical layout. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* mesa: replace for loop with bitshifting in supported_buffer_bitmask()Brian Paul2016-02-241-4/+1
| | | | | Reviewed-by: Rob Clark <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
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