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* i965: Define miptree map functions static (trivial)Ben Widawsky2016-04-181-2/+2
| | | | | | | | | | | | | They were already declared as such. It was changed here: commit 31f0967fb50101437d2568e9ab9640ffbcbf7ef9 Author: Ian Romanick <[email protected]> Date: Wed Sep 2 14:43:18 2015 -0700 i965: Make intel_miptree_map_raw static Cc: Ian Romanick <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: Properly handle ldexp(0.0f, non-zero-exp).Matt Turner2016-04-181-4/+6
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* gallivm: convert size query to using a set of parameters.Dave Airlie2016-04-197-97/+51
| | | | | | | | | | This isn't currently that easy to expand, so fix it up before expanding it later to include dynamic samplers. [airlied: use some local variables (Roland)] Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* swr: dereference cbuf/zbuf/views on context destroyTim Rowley2016-04-181-0/+15
| | | | | | Fixes resource memory leaks. Reviewed-by: Ilia Mirkin <[email protected]>
* freedreno/ir3: fix grouping issue w/ reverse swizzlesRob Clark2016-04-181-1/+17
| | | | | | | | | | | | | | | | | | | | | | | When we have something like: MOV OUT[n], IN[m].wzyx the existing grouping code was missing a potential conflict. Due to input needing to be sequential scalar regs, we have: IN: x <-> y <-> z <-> w which would be grouped to: OUT: w <-> z2 <-> y2 <-> x (where the 2 denotes a copy/mov) but that can't actually work. We need to realize that x and w are already in the same chain, not just that they aren't both already in new chain being built. With this fixed, we probably no longer need the hack from f68f6c0. Signed-off-by: Rob Clark <[email protected]>
* radeonsi: use enums in si_shader.hMarek Olšák2016-04-181-93/+119
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use enums in r600_query.hMarek Olšák2016-04-181-20/+23
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: always use PFP_SYNC_ME when doing flushes and waitsMarek Olšák2016-04-182-1/+10
| | | | | | This is typically used by the closed driver before SURFACE_SYNC. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't do VS/PS partial flushes if SURFACE_SYNC waits tooMarek Olšák2016-04-181-11/+14
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add safety assertions for meta cache flushesMarek Olšák2016-04-181-0/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't use ACQUIRE_MEM on the graphics ringMarek Olšák2016-04-181-18/+8
| | | | | | | | | It's only required on the compute ring. This matches the closed driver. The compute flag is removed to prevent confusion and Bas's compute shader patches remove it in the whole function. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove TODO and correct a comment in si_emit_cache_flushMarek Olšák2016-04-181-2/+1
| | | | | | Yes, that flag is really needed. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't flush CB/DB caches for performance countersMarek Olšák2016-04-181-3/+6
| | | | | | | | I'm not sure about this. This will make the engines go idle, but the caches will be unflushed. This should match app behavior without performance counters, which can be a good thing. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: don't flush CB/DB caches for timestamp queriesMarek Olšák2016-04-182-2/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/util: fix undefined shift to the last bit in u_bit_scanMarek Olšák2016-04-181-1/+1
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/util: fix u_bit_scan_consecutive_range for mask == 0xffffffffMarek Olšák2016-04-181-1/+7
| | | | | | | | The second ffs returns 0, yielding count == -1. v2: change 1 to 1u Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/radeon: fix Nine with its slightly shifted viewportsMarek Olšák2016-04-181-15/+21
| | | | | | | just need to do the calculation in floating-point and then round things properly Reviewed-by: Axel Davy <[email protected]>
* meta: Don't botch color masks when changing drawbuffers.Kenneth Graunke2016-04-181-7/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Color clears should respect each drawbuffer's color mask state. Previously, we tried to leave the color mask untouched. However, _mesa_meta_drawbuffers_from_bitfield() ended up rebinding all the color drawbuffers in a different order, so we ended up pairing drawbuffers with the wrong color mask state. The new _mesa_meta_drawbuffers_and_colormask() function does the same job as the old _mesa_meta_drawbuffers_from_bitfield(), but also rearranges the color mask state to match the new drawbuffer configuration. This code was largely ripped off from Gallium's st_Clear code. This fixes ES31-CTS.draw_buffers_indexed.color_masks, which binds up to 8 drawbuffers, sets color masks for each, and then calls glClearBufferfv to clear each buffer individually. ClearBuffer causes us to rebind only one drawbuffer, at which point we used ctx->Color.ColorMask[0] (draw buffer 0's state) for everything. We could probably delete _mesa_meta_drawbuffers_from_bitfield(), but I'd rather not think about the i965 fast clear code. Topi is rewriting a bunch of that soon anyway, so let's delete it then. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94847 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* meta: Don't smash ColorMask when using MESA_META_COLOR_MASK save bit.Kenneth Graunke2016-04-182-5/+4
| | | | | | | | | | | This allows meta operations to inspect the existing color mask, and then do their own smashing. BlitFramebuffer and Clear already override the color mask, so this was also redundant. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* vc4: Add support for rendering to cube map surfaces.Eric Anholt2016-04-181-1/+2
| | | | | | | We need to fix up the offset to point at the face of the cube. Fixes piglit fbo-cubemap, copyteximage CUBE, and glean's fbo test. Cc: "11.1 11.2" <[email protected]>
* vc4: Don't flush on read-only access of buffers read by the CL.Eric Anholt2016-04-183-7/+16
| | | | | | Fixes piglit mixed-immediate-and-vbo, and may significantly improve performance of applications that store a 4-byte IB in the same VBO as vertex data.
* vc4: Sanity check that flushes don't happen between state emit and draw.Eric Anholt2016-04-181-0/+7
| | | | | | Catches the cause of failure in arb_vertex_buffer_object-mixed-immediate-and-vbo, I've had this class of failure before, and it probably won't be the last time.
* vc4: Sanity check strides for imported BOs.Eric Anholt2016-04-181-5/+18
| | | | | | | If we're going to sample from or render to them at some particular size, we'd better make sure that they actually are that size. Causes some tests under simulation to generate appropriate error messages instead of failures.
* r600g: Move R600_BIG_ENDIAN to r600_pipe_common.hOded Gabbay2016-04-182-6/+6
| | | | | | | | I need to do this so I could use R600_BIG_ENDIAN in files which include r600_pipe_common.h but not r600_pipe.h Signed-off-by: Oded Gabbay <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: fix code indentationOded Gabbay2016-04-182-10/+10
| | | | | Signed-off-by: Oded Gabbay <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallivm: don't use vector selects with llvm 3.7Roland Scheidegger2016-04-181-3/+5
| | | | | | | | | | llvm 3.7 sometimes simply miscompiles vector selects. See https://bugs.freedesktop.org/show_bug.cgi?id=94972 This was fixed in llvm r249669 (https://llvm.org/bugs/show_bug.cgi?id=24532). Reviewed-by: Jose Fonseca <[email protected]>
* nir: only dereference undef after NULL check. (v2)Dave Airlie2016-04-181-1/+0
| | | | | | | Pointed out by coverity. v2: nuke line, Jason pointed out the constructor does it. Signed-off-by: Dave Airlie <[email protected]>
* i965/fs: Don't allow OOB array access of imagesJason Ekstrand2016-04-151-15/+11
| | | | | | | | | | | | | | | | We have had a guard against OOB array access of images on IVB for a long time, but it can actually cause hangs on any GPU generation. This can happen due to getting an untyped SURFACE_STATE for a typed message. We didn't used to hit this with the piglit test on anything other than IVB because the OOB in the test would cause us to go past the top of the pull constant UBO and we would get a surface index of 0 which is was always a valid surface. Now that we're pushing small arrays, we can end up grabbing garbage from the GRF and going to some random index which causes a hang. The solution is to just do the bounds check on all hardware. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94944 Reviewed-by: Francisco Jerez <[email protected]> Tested-by: Mark Janes <[email protected]>
* anv/device: Images are only enabled in scalar stagesJason Ekstrand2016-04-151-2/+2
| | | | Reported-by: Ilia Mirkin <[email protected]>
* gallium/radeon: handle vertex shaders that disable clipping & viewportMarek Olšák2016-04-162-1/+20
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/texstore: Use Driver.CompressedTexSubImage in the default ↵Nanley Chery2016-04-151-5/+5
| | | | | | | | | | | | CompressedTexImage Enable drivers to use their own implementation of this method instead of the mesa default. Since the drivers that currently overwrite dd_function_table::CompressedTexSubImage also overwrite ::CompressedTexImage, there should be no behavioral change. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* anv: Advertise vertexPipelineStoresAndAtomics based on scalar stagesJason Ekstrand2016-04-151-1/+5
| | | | | | Previously, we just looked at the hardware generation but this meant that if you did INTEL_DEBUG=vec4 on BDW or SKL, you would have advertised but non-working features.
* i965/vec4: Support full std140 layout for push constantsJason Ekstrand2016-04-151-5/+25
| | | | | | | | | Up until now, we have been able to assume that all push constants are vec4-aligned because this is what the GL driver gives us. In Vulkan, we need to be able to support full std140 because we get the layout from the client. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Handle MOV_INDIRECT in pack_uniform_registersJason Ekstrand2016-04-151-0/+18
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Add support for SHADER_OPCODE_MOV_INDIRECTJason Ekstrand2016-04-152-0/+68
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Use can_do_writemask in can_reswizzleJason Ekstrand2016-04-151-3/+5
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Move can_do_writemask to vec4_instructionJason Ekstrand2016-04-153-30/+30
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* util: Fix warning of invalid return valueChad Versace2016-04-151-1/+2
| | | | | | _mesa_libgcrypt_init() returns NULL, but its return type is void. Reviewed-by: Mark Janes <[email protected]>
* Merge branch 'vulkan'Jason Ekstrand2016-04-15101-0/+53445
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| * Merge remote-tracking branch 'public/master' into vulkanJason Ekstrand2016-04-159-68/+102
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| * | i965: Default to scalar GSJason Ekstrand2016-04-151-1/+1
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| * | i965/surface_formats: Mark A4B4G4R4_UNORM as SKL+ onlyJason Ekstrand2016-04-151-1/+1
| | | | | | | | | | | | This is what is indicated by the bspec.
| * | Revert "i965/fs: Properly write-mask spills"Jason Ekstrand2016-04-152-11/+5
| | | | | | | | | | | | This reverts commit 9c0109a1f6e0c9c8dd81fc215f8c0c5976e05790.
| * | Revert "i965/fs: Feel free to spill partial reads/writes"Jason Ekstrand2016-04-151-2/+19
| | | | | | | | | | | | This reverts commit 2434ceabf41e66f2a3627ea8591e5ca427a78cce.
| * | Merge remote-tracking branch 'public/master' into vulkanJason Ekstrand2016-04-146-8/+36
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| * | | main/mtypes: Remove the "set" parameter from gl_uniform_blockJason Ekstrand2016-04-141-5/+0
| | | | | | | | | | | | | | | | This is a left-over from the early days of the Vulkan driver
| * | | Revert "i965/vec4: Add support for SHADER_OPCODE_MOV_INDIRECT"Jason Ekstrand2016-04-141-45/+0
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4115648a6be2e846660a35a0e260ae53b809b7e0. This commit was half-baked and probably never should have been committed. We'll add this back in properly later when we need it.
| * | | Merge remote-tracking branch 'public/master' into vulkanJason Ekstrand2016-04-1433-469/+472
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| * | | | anv: Install the installable ICDJason Ekstrand2016-04-141-0/+3
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| * | | | anv/intel_icd: Don't provide an absolute pathJason Ekstrand2016-04-142-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver will be installed to $(libdir)/libvulkan_intel.so and just providing a driver name is enough for the loader. This also ensures that multi-arch systems work ok.
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