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* gallium/tests: use pipe_context::bind_sampler_states()Brian Paul2013-10-038-9/+13
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* gallium/tools: update dump_state.py to use bind_sampler_states()Brian Paul2013-10-031-8/+3
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* nouveau: implement pipe_context::bind_sampler_states()Brian Paul2013-10-036-2/+76
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* softpipe: implement pipe_context::bind_sampler_states()Brian Paul2013-10-031-0/+1
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* radeon: implement pipe_context::bind_sampler_states()Brian Paul2013-10-033-0/+49
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* svga: implement pipe_context::bind_sampler_states()Brian Paul2013-10-031-0/+1
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* trace: implement pipe_context::bind_sampler_states()Brian Paul2013-10-031-28/+42
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* rbug: implement pipe_context::bind_sampler_states()Brian Paul2013-10-031-0/+34
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* noop: implement pipe_context::bind_sampler_states()Brian Paul2013-10-031-0/+7
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* llvmpipe: implement pipe_context::bind_sampler_states()Brian Paul2013-10-031-0/+1
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* ilo: implement pipe_context::bind_sampler_states()Brian Paul2013-10-031-0/+21
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* identity: implement pipe_context::bind_sampler_states()Brian Paul2013-10-031-15/+21
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* i915g: implement pipe_context::bind_sampler_states()Brian Paul2013-10-031-0/+22
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* galahad: implement pipe_context::bind_sampler_states()Brian Paul2013-10-031-12/+18
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* clover: use pipe_context::bind_sampler_states() if non-nullBrian Paul2013-10-031-2/+7
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* vl: use pipe_context::bind_sampler_states() if non-nullBrian Paul2013-10-037-8/+49
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* util: use pipe_context::bind_sampler_states() if non-nullBrian Paul2013-10-031-6/+22
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* draw: use pipe_context::bind_sampler_states() if non-nullBrian Paul2013-10-032-7/+97
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* cso: use pipe_context::bind_sampler_states() if non-nullBrian Paul2013-10-031-21/+44
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* gallium: add pipe_context::bind_sampler_states()Brian Paul2013-10-031-0/+5
| | | | | The bind_vertex/geometry/fragment/compute_sampler_states() functions will be replaced by a single functions.
* r300g: rename r300_bind_sampler_states to r300_bind_fragment_sampler_statesBrian Paul2013-10-031-4/+4
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* draw: rename bind_sampler_states variablesBrian Paul2013-10-032-19/+19
| | | | | Put 'fragment' in the names. In preparation for upcoming function renaming.
* r600g: fix ínitialization of non_disp_tiling flagMarek Olšák2013-10-031-4/+5
| | | | This fixes a regression caused by e64633e8c3a5498998a45ab721bf80edca101cf5
* r600g,radeonsi: create aux_context lastMarek Olšák2013-10-033-2/+6
| | | | This fixes a regression caused by 68f6dec32ed5eede361f76c8dbdf897652659baf.
* r300g/swtcl: don't call draw_prepare_shader_outputsMarek Olšák2013-10-031-1/+0
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* st/mesa: silence warning about unhandled enum in switch statementBrian Paul2013-10-031-0/+3
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* mesa: fix make check for ARB_texture_gatherChris Forbes2013-10-034-5/+8
| | | | | | | | | | | Clean up inconsistency in enum decoration: - Use the undecorated enums where possible. - MAX_PROGRAM_TEXTURE_GATHER_COMPONENTS_ARB remains decorated, since it has no undecorated equivalent in GL4. Signed-off-by: Chris Forbes <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70054 Reviewed-by: Kenneth Graunke <[email protected]>
* i965/hsw: Apply gather4 RG32F w/a using SCS instead of shader.Chris Forbes2013-10-032-8/+11
| | | | | | | | The new surface channel select bits allow us to avoid having to recompile the shader for this workaround. Signed-off-by: Chris Forbes <[email protected]> Reviewed-and-tested-by: Kenneth Graunke <[email protected]>
* i965: Enable ARB_texture_gather on Gen7Chris Forbes2013-10-032-0/+5
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: use gather slots in the binding table for gather4.Chris Forbes2013-10-032-4/+12
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Emit a second set of SURFACE_STATE for gather4 from textures.Chris Forbes2013-10-033-8/+39
| | | | | | | | | | | | | This allows us to use a different surface format for gather4, which is required for R32G32_FLOAT to work on Gen7. V4: - Only emit alternate surface state for shaders which will actually use it. - Pass a simple 'for_gather' flag rather than a function pointer. The callee can decide what w/a to apply. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: make room in the binding table for a full alternate set of surface_statesChris Forbes2013-10-031-2/+18
| | | | | | | | | | Worst-case is that *every* texunit uses a format that needs overriding. V4: Place the gather slots last, so shaders which don't use gather don't get penalized by having a huge binding table. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add BRW_SURFACEFORMAT_R32G32_FLOAT_LD, required for IVB gather4 w/aChris Forbes2013-10-032-0/+2
| | | | | | | | | | | gather4 GREEN channel against a surface with format R32G32_FLOAT doesn't work correctly on IVB. w/a from bspec: - use R32G32_FLOAT_LD = 0x97 instead, for gather4 only. - select BLUE channel to read GREEN Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: w/a for gather4 green RG32FChris Forbes2013-10-034-0/+22
| | | | | | | | | V4: Only flag quirks if there are any uses of gather in the shader, to avoid spurious recompiles just because someone happened to use RG32F. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: flag shaders which use gather4 at allChris Forbes2013-10-032-0/+11
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vs: Add support for ir_tg4Chris Forbes2013-10-032-2/+45
| | | | | | | | | | Pretty much the same as the FS case. Channel select goes in the header, V2: Less mangling. V3: Avoid sampling at all, for degenerate swizzles. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for ir_tg4Chris Forbes2013-10-032-3/+60
| | | | | | | | | | | | | | | | | | | | Lowers ir_tg4 (from textureGather and textureGatherOffset builtins) to SHADER_OPCODE_TG4. The usual post-sampling swizzle workaround can't work for ir_tg4, so avoid doing that: * For R/G/B/A swizzles use the hardware channel select (lives in the same dword in the header as the texel offset), and then don't do anything afterward in the shader. * For 0/1 swizzles blast the appropriate constant over all the output channels instead of sampling. V2: Avoid duplicating header enabling block V3: Avoid sampling at all, for degenerate swizzles. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add SHADER_OPCODE_TG4Chris Forbes2013-10-036-2/+17
| | | | | | | | | | Adds the Gen7 message IDs, a new SHADER_OPCODE_TG4 pseudo-op, and low-level support for emitting it via generate_tex(). V3: Updated for changes in master. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: add texture gather changesMaxence Le Dore2013-10-0314-4/+60
| | | | | | | | | | V2 [Chris Forbes]: - Add new pattern, fixup parameter reading. V3: Rebase onto new builtins machinery Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: add texture gather changesMaxence Le Dore2013-10-038-1/+36
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: fix bogus swizzle in brw_cubemap_normalizeChris Forbes2013-10-031-4/+6
| | | | | | | | | | | | | | | | When used with a cube array in VS, failed assertion in ir_validate: Assignment count of LHS write mask channels enabled not matching RHS vector size (3 LHS, 4 RHS). To fix this, swizzle the RHS correctly for the writemask. This showed up in the ARB_texture_gather tests, which exercise cube arrays in the VS. Signed-off-by: Chris Forbes <[email protected]> Cc: "9.2" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* r600/llvm: Adds support for MSAAVincent Lejeune2013-10-023-1/+54
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* r600g/llvm: Undef z and w component of 2D TXP instVincent Lejeune2013-10-021-1/+2
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* r600g/llvm: fix txq for texture bufferVincent Lejeune2013-10-023-2/+9
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* i965: compute DDX in a subspan based only on top rowChia-I Wu2013-10-027-8/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | Consider only the top-left and top-right pixels to approximate DDX in a 2x2 subspan, unless the application requests a more accurate approximation via GL_FRAGMENT_SHADER_DERIVATIVE_HINT or this optimization is disabled from the new driconf option disable_derivative_optimization. This results in a less accurate approximation. However, it improves the performance of Xonotic with Ultra settings by 24.3879% +/- 0.832202% (at 95.0% confidence) on Haswell. No noticeable image quality difference observed. The improvement comes from faster sample_d. It seems, on Haswell, some optimizations are introduced to allow faster sample_d when all pixels in a subspan have the same derivative. I considered SAMPLE_STATE too, which allows one to control the quality of sample_d on Haswell. But it gave much worse image quality without giving better performance comparing to this change. No piglit quick.tests regression on Haswell (tested with v1). v2: better guess for precompile program key Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/blorp: Use passed in framebuffer rather than ctx->DrawBufferChris Forbes2013-10-021-4/+4
| | | | | | | | We have the destination framebuffer object passed in; there's no need to go digging around in the context. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* ralloc: Remove the rzalloc-based new/delete operator definition macro.Francisco Jerez2013-10-011-14/+12
| | | | | | | | | | Using it encourages the (IMHO worrying) practice of leaving member variables uninitialized in constructor definitions. This macro shouldn't be necessary anymore after the last patch series fixing all its users to initialize all member variables from the class constructor. Remove it. Reviewed-by: Kenneth Graunke <[email protected]>
* st/mesa: Switch glsl_to_tgsi_instruction to the non-zeroing allocator.Francisco Jerez2013-10-011-1/+1
| | | | | | | | All member variables of glsl_to_tgsi_instruction are already being initialized from its implicitly defined constructor, it's not necessary to use rzalloc to allocate its memory. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa/program: Switch ir_to_mesa_instruction to the non-zeroing allocator.Francisco Jerez2013-10-011-1/+1
| | | | | | | | All member variables of ir_to_mesa_instruction are already being initialized from its implicitly defined constructor, it's not necessary to use rzalloc to allocate its memory. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Switch vec4_live_variables to the non-zeroing allocator.Francisco Jerez2013-10-011-1/+1
| | | | | | | | | | | | | | | | All member variables of vec4_live_variables are already being initialized from its constructor, it's not necessary to use rzalloc to allocate its memory, and doing so makes it more likely that we will start relying on the allocator to zero out all memory if the class is ever extended with new member variables. That's bad because it ties objects to some specific allocation scheme, and gives unpredictable results when an object is created with a different allocator -- Stack allocation, array allocation, or aggregation inside a different object are some of the useful possibilities that come to my mind. Reviewed-by: Kenneth Graunke <[email protected]>
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