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* radeonsi: fix stencil op mappingChristian König2012-07-301-40/+34
* radeonsi: fix assertion in si_bind_vs_samplerChristian König2012-07-301-1/+1
* radeonsi: fix shader bindingChristian König2012-07-301-2/+8
* radeonsi: fix dummy export in shaders v2Christian König2012-07-301-0/+19
* radeonsi: fix vertex buffer and elementsChristian König2012-07-304-64/+74
* radeonsi: fix shader size and handlingChristian König2012-07-301-13/+13
* radeonsi: rename r600_resource to si_resourceChristian König2012-07-3015-94/+140
* glcpp: Add a newline to expanded #line directives.Kenneth Graunke2012-07-281-2/+2
* gallium: specify resource_resolve destination via a pipe_surfaceChristoph Bumiller2012-07-286-58/+39
* st/mesa: call update_renderbuffer_surface for sRGB renderbuffers, tooChristoph Bumiller2012-07-281-2/+3
* nv50: fix depth/stencil multisample memory storage typesChristoph Bumiller2012-07-281-6/+6
* nv50: fix resource_resolve shader start offsetsChristoph Bumiller2012-07-281-2/+2
* st/mesa: undo a couple static assertsBrian Paul2012-07-271-2/+2
* st/mesa: use STATIC_ASSERT in a few placesBrian Paul2012-07-274-17/+17
* mesa: whitespace, etc. fixes in program.hBrian Paul2012-07-271-7/+5
* meta: fix glDrawPixels fallback test, stencil drawingBrian Paul2012-07-271-2/+2
* radeon: fix 'sowftware' typoBrian Paul2012-07-271-1/+1
* i965/gen7: Reduce GT1 WM thread count according to updated BSpec.Eric Anholt2012-07-271-1/+1
* i965: Fix typo in shader channel select field name.Kenneth Graunke2012-07-273-20/+20
* i965/msaa: Use MESA_FORMAT_R8 for MCS buffer.Paul Berry2012-07-271-1/+1
* intel: increase wm thread number to 80 on gen6 GT2Zou Nan hai2012-07-271-5/+1
* r600g: Emit dispatch state for compute directly to the csTom Stellard2012-07-274-69/+60
* r600g: Initialize VGT_PRIMITIVE_TYPE in the start_cs_cmd atomTom Stellard2012-07-271-2/+5
* r600g: Atomize compute shader stateTom Stellard2012-07-274-86/+91
* r600g: Add helper functions for emitting compute SET_CONTEXT packetsTom Stellard2012-07-272-5/+18
* radeon/llvm: Add instruction defs for branches on SITom Stellard2012-07-273-17/+126
* radeon/llvm: Fix VOPC and V_CNDMASK encodingTom Stellard2012-07-274-10/+13
* radeon/llvm: Assert if we try to copy SCC regTom Stellard2012-07-271-0/+6
* radeon/llvm: Add SI DAG optimizations for setcc, select_ccTom Stellard2012-07-272-0/+54
* radeon/llvm: Add support for encoding SI branch instructionsTom Stellard2012-07-271-15/+35
* radeon/llvm: Add special nodes for SALU operations on VCCTom Stellard2012-07-276-1/+89
* radeon/llvm: Add i1 registers for SI.Tom Stellard2012-07-271-0/+2
* radeon/llvm: Fix CCReg definitions on SITom Stellard2012-07-272-3/+10
* radeonsi: Enable PIPE_SHADER_CAP_INTEGERSTom Stellard2012-07-271-1/+2
* radeonsi: Add support for loading integers from constant memoryTom Stellard2012-07-271-1/+3
* radeon/llvm: Add bitconvert patterns for SITom Stellard2012-07-271-0/+6
* radeon/llvm: Add custom lowering for SELECT_CC nodes on SITom Stellard2012-07-272-0/+20
* radeon/llvm: Move conditional pattern leafs to common tablegen fileTom Stellard2012-07-272-41/+41
* radeon/llvm: Implement getSetCCResultType for SITom Stellard2012-07-272-0/+6
* radeon/llvm: Custom lower BR_CC for SITom Stellard2012-07-272-0/+41
* radeon/llvm: Move lowering of BR_CC node to R600ISelLoweringTom Stellard2012-07-274-31/+31
* radeon/llvm: Move lowering of SETCC node to R600ISelLoweringTom Stellard2012-07-274-38/+29
* radeon/llvm: Use correct node type when lowering SETCCTom Stellard2012-07-271-0/+1
* radeon/llvm: Move LowerSELECT_CC into R600ISelLoweringTom Stellard2012-07-274-111/+112
* automake: Remove OPT_FLAGS.Eric Anholt2012-07-262-2/+0
* automake: Remove ARCH_FLAGS.Eric Anholt2012-07-262-2/+0
* i965/msaa: use ROUND_DOWN_TO macro.Paul Berry2012-07-261-6/+6
* svga: initialize svga_compile_key to zeros to be safeBrian Paul2012-07-261-0/+4
* svga: fix invalid memory reference in needs_to_create_zero()Brian Paul2012-07-261-5/+5
* radeon: fix Base/base typoBrian Paul2012-07-261-1/+1