summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Expand)AuthorAgeFilesLines
* glsl/glcpp: Fixup glcpp tests for redefining a macro with whitespace changes.Carl Worth2014-07-093-1/+40
* glsl/glcpp: Fix preprocessor error condition for macro redefinitionAnuj Phogat2014-07-091-8/+10
* glsl/glcpp: Add test to ensure compiler won't allow #undef for some builtinsCarl Worth2014-07-092-0/+10
* glsl/glcpp: Do not allow undefining the built-in macrosAnuj Phogat2014-07-091-0/+6
* gallium/u_blitter: fix some shader memory leaksBrian Paul2014-07-091-0/+9
* tgsi: properly parse indirect dimension references (e.g. for UBOs)Ilia Mirkin2014-07-091-0/+7
* radeonsi: fix order of r600_need_dma_space and r600_context_bo_relocChristian König2014-07-091-1/+2
* st/mesa: fix geometry shader memory leakBrian Paul2014-07-091-0/+1
* mesa: fix geometry shader memory leaksBrian Paul2014-07-092-0/+4
* st/mesa: minor simplification of some state atom assignmentsBrian Paul2014-07-092-7/+4
* st/mesa: minor fix-up in st_GetSamplePosition()Brian Paul2014-07-091-2/+4
* mesa: use float to silence MSVC warning in _mesa_GetMultisamplefv()Brian Paul2014-07-091-1/+1
* nvc0: allocate more space before a counter is configuredSamuel Pitoiset2014-07-081-2/+3
* nv50/ir: use unordered_set instead of list to keep track of var usesTobias Klausmann2014-07-084-9/+10
* i965/disasm: Fix disassembly of the any16h/all16h predicates.Kenneth Graunke2014-07-081-1/+1
* glsl: Fix the foreach_in_list_reverse macro.Kenneth Graunke2014-07-081-3/+3
* radeonsi: mark MSAA config state as dirty at the beginning of CSMarek Olšák2014-07-081-0/+1
* gallium: fix u_default_transfer_inline_write for texturesMarek Olšák2014-07-081-2/+2
* i965: Remove artificial dependency between math instructions.Matt Turner2014-07-081-1/+2
* i965/fs: Track dependencies in instruction scheduling per reg offset.Matt Turner2014-07-081-8/+15
* ilo: fix fence reference countingChia-I Wu2014-07-081-12/+9
* i965: Extend compute-to-mrf pass to understand blocks of MOVsKristian Høgsberg2014-07-071-10/+53
* nvc0/ir: fill offset in properly for TXDIlia Mirkin2014-07-081-13/+43
* nvc0/ir: use manual TXD when offsets are involvedIlia Mirkin2014-07-081-1/+2
* nvc0/ir: do quadops on the right texture coordinates for TXDIlia Mirkin2014-07-081-2/+3
* nv50/ir: ignore bias for samplerCubeShadow on nv50Ilia Mirkin2014-07-081-0/+10
* nv50/ir: retrieve shadow compare from first argIlia Mirkin2014-07-081-1/+1
* i965/fs: Disable unlit_centroid_workaround on Haswell.Matt Turner2014-07-061-2/+4
* i965/vec4: Perform CSE on CMP(N) instructions.Matt Turner2014-07-061-1/+16
* i965/vec4: Don't emit null MOVs in CSE.Matt Turner2014-07-061-5/+7
* i965/vec4: Improve CSE performance by expiring some available expressions.Matt Turner2014-07-061-0/+20
* i965/vec4: Add basic common subexpression elimination.Kenneth Graunke2014-07-064-0/+236
* i965: Fix warnings introduced in commit e24ef5ab.Matt Turner2014-07-061-2/+1
* gallium/radeon: use PRIX64 instead of PRIu64Christian König2014-07-062-2/+2
* i965: Move assembly annotation functions to intel_asm_annotation.c.Matt Turner2014-07-054-61/+67
* i965: Rename intel_asm_printer -> intel_asm_annotation.Matt Turner2014-07-058-7/+7
* i965: Make backend_instruction usable from C.Matt Turner2014-07-051-4/+7
* i965/cfg: Make cfg_t usable from C.Matt Turner2014-07-053-8/+6
* i965: Repack backend_instruction struct.Matt Turner2014-07-051-7/+5
* i965: Make a brw_predicate enum.Matt Turner2014-07-056-31/+35
* i965: Make a brw_conditional_mod enum.Matt Turner2014-07-0518-43/+54
* i965: Move common fields into backend_instruction.Matt Turner2014-07-053-25/+13
* i965: Use enum brw_reg_type for register types.Matt Turner2014-07-057-13/+14
* i965: Move is_zero/one/null/accumulator into backend_reg.Matt Turner2014-07-056-93/+44
* i965: Make a common backend_reg class.Matt Turner2014-07-054-42/+36
* i965: Drop imm union from visitor register classes.Matt Turner2014-07-052-14/+0
* i965: Use immediate storage in brw_reg for visitor regs.Matt Turner2014-07-056-41/+37
* glsl: Fix merging of layout(invocations) with other qualifiersChris Forbes2014-07-051-0/+10
* nvc0: add a memory barrier when there are persistent UBOsIlia Mirkin2014-07-035-4/+57
* nv50: do an explicit flush on draw when there are persistent buffersIlia Mirkin2014-07-033-2/+50
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-11 22:13:49 +0000