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* glsl/tests/warnings-test: error out if glsl_compiler is missingEmil Velikov2017-03-281-0/+5
| | | | | | | | | | ... or non-executable, in particular. v2: use test -x (Eric) Signed-off-by: Emil Velikov <[email protected]> Acked-by: Kenneth Graunke <[email protected]> (v1) Reviewed-by: Eric Engestrom <[email protected]>
* glsl: automake: export abs_builddir for the testsEmil Velikov2017-03-281-0/+1
| | | | | | | | | We're going to use them with the next commits to determine where to put the generated tests and/or built binaries. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* glsl/tests: automake: cleanup all artefacts during clean-localEmil Velikov2017-03-281-0/+6
| | | | | | | | | | | | | With later commits we'll fix the generators to produce the files in the correct location. That in itself will cause an issue since the files will be left dangling and make distcheck will fail. v2: Use -r only as needed (Eric) Cc: Matt Turner <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Acked-by: Kenneth Graunke <[email protected]> (v1) Reviewed-by: Eric Engestrom <[email protected]>
* st/va: remove assert for single sliceNayan Deshmukh2017-03-281-1/+1
| | | | | | | | | we anyway allow for multiple slices v2: do not remove assert to check for buf->size Signed-off-by: Nayan Deshmukh <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: use DMA for clears with unaligned sizeNicolai Hähnle2017-03-281-19/+27
| | | | | | | | | | Only a small tail needs to be uploaded manually. This is only partly a performance measure (apps are expected to use aligned access). Mostly it is preparation for sparse buffers, which the old code would incorrectly have attempted to map directly. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: CP DMA clear supports unaligned destination addressesNicolai Hähnle2017-03-281-1/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: remove the early-out for SDMA in si_clear_bufferNicolai Hähnle2017-03-281-22/+21
| | | | | | | This allows the next patches to be simple while still being able to make use of SDMA even in some unusual cases. Reviewed-by: Marek Olšák <[email protected]>
* radv: move shader stages calculation to pipeline.Dave Airlie2017-03-283-9/+10
| | | | | | | | With tess this becomes a bit more complex. so move to pipeline for now. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: move pa_cl_vs_out_cntl calculation to pipelineDave Airlie2017-03-283-17/+32
| | | | | | | This also takes the side band setting code from radeonsi. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: move calculating fragment shader i/os to pipeline.Dave Airlie2017-03-283-63/+77
| | | | | | | There is no need to calculate this on each command submit. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: move shader_z_format calculation to pipeline.Dave Airlie2017-03-283-4/+8
| | | | | | | No need to recalculate this every time. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: move db_shader_control calculation to pipeline.Dave Airlie2017-03-283-16/+20
| | | | | | | There is no need to recalculate this every time. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: move vgt_gs_mode value to pipeline.Dave Airlie2017-03-283-27/+30
| | | | | | | No need to recalculate this everytime. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add parameter to emit_waitcnt.Dave Airlie2017-03-281-3/+8
| | | | | | | | This is just a precursor for tess support, which needs to pass different values here. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: rework vertex/export shader output handlingDave Airlie2017-03-284-70/+86
| | | | | | | | | In order to faciliate adding tess support, split the vs/es output info into a separate block, so we make it easier to have the tess shaders export the same info. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix ia_multi_vgt_param for instanced vs indirect draw.Dave Airlie2017-03-283-13/+15
| | | | | | | | The logic was different than radeonsi, fix it up before adding tess support. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: handle NULL multisample state.Dave Airlie2017-03-281-8/+12
| | | | | | | | If rasterization is disabled, we can get a NULL multisample state. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: flush DB cache before and after HTILE decompress.Bas Nieuwenhuizen2017-03-281-0/+6
| | | | | | | | | | | It reads @ writes the DB cache, and we haven't flushed dst caches yet, so DB cache may be stale. Also the user might be shader read (and probably is), so also flush after. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> CC: <[email protected]> Fixes: f4e499ec791 ("radv: add initial non-conformant radv vulkan driver")
* i965: Delete tile resource mode codeAnuj Phogat2017-03-275-267/+35
| | | | | | | | | | | Yf/Ys tiling never got used in i965 due to not delivering the expected performance benefits. So, this patch is deleting this dead code in favor of adding it later in ISL when we actually find it useful. ISL can then share this code between vulkan and GL. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Delete fast copy blit codeAnuj Phogat2017-03-272-185/+48
| | | | | | | | | | | | | | | Fast copy blit was primarily added to support Yf/Ys detiling. But, Yf/Ys tiling never got used in i965 due to not delivering the expected performance benefits. Also, replacing legacy blits with fast copy blit didn't help the benchmarking numbers. This is probably due to a h/w restriction that says "start pixel for Fast Copy blit should be on an OWord boundary". This restriction causes many blit operations to skip fast copy blit and use legacy blits. So, this patch is deleting this dead code in favor of adding it later when we actually find it useful. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Require Kernel 3.6 for Gen4-5 platforms.Kenneth Graunke2017-03-272-3/+3
| | | | | | | | | | | | | | We've already required Kernel 3.6 on Gen6+ since Mesa 9.2 (May 2013, commit 92d2f5acfadea672417b6785710c9e8b7f605e41). It seems reasonable to require it for Gen4-5 as well, bumping the requirement from 2.6.39. This is necessary for glClientWaitSync with a timeout to work, which is a feature we expose on Gen4-5. Without it, we would fall back to an infinite wait, which is pretty bad. See kernel commit 172cf15d18889313bf2c3bfb81fcea08369274ef in 3.6+. Reviewed-by: Matt Turner <[email protected]>
* glsl: fix spelling of embedded in commentTimothy Arceri2017-03-281-1/+1
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* glsl: fix lower jumps for returns when loop is inside an ifTimothy Arceri2017-03-281-5/+12
| | | | | | | | | | | | | | | | | Previously we would just escape the loop and move everything following the loop inside the if to the else branch of a new if with a return flag conditional. However everything outside the if the loop was nested in would still get executed. Adding a new return to the then branch of the new if fixes this and we just let a follow pass clean it up if needed. Fixes: tests/spec/glsl-1.10/execution/vs-nested-return-sibling-loop.shader_test tests/spec/glsl-1.10/execution/vs-nested-return-sibling-loop2.shader_test Cc: "13.0 17.0" <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* radv: don't emit no color formats. (v3)Dave Airlie2017-03-281-2/+19
| | | | | | | | | | | | | | | If we had no rasterization, we'd emit SPI color format as all 0's the hw dislikes this, add the workaround from radeonsi. Found while debugging tessellation v2: handle at pipeline stage, we have to handle it after we process the fragment shader. (Bas) v3: simplify even further, remove old fallback. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa/tests: Link main-test with CLOCK_LIB.Vinson Lee2017-03-271-1/+2
| | | | | | | | | | Fix 'make check' linking error with glibc < 2.17. CXXLD main-test ../../../../src/mesa/.libs/libmesa.a(libmesautil_la-u_queue.o): In function `u_thread_get_time_nano': src/util/../../src/util/u_thread.h:84: undefined reference to `clock_gettime' Signed-off-by: Vinson Lee <[email protected]>
* i965/fs: Don't emit SEL instructions for type-converting MOVs.Matt Turner2017-03-271-0/+2
| | | | | | | | | | SEL can only convert between a few integer types, which we basically never do. Fixes fs/vs-double-uniform-array-direct-indirect-non-uniform-control-flow Cc: [email protected] Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Acked-by: Francisco Jerez <[email protected]>
* anv/blorp: Fix a crash in CmdClearColorImageXu Randy2017-03-271-2/+2
| | | | | | | | | | | | | We should use anv_get_layerCount() to access layerCount of VkImageSub- resourceRange in anv_CmdClearColorImage and anv_CmdClearDepthStencil- Image, which handles the VK_REMAINING_ARRAY_LAYERS (~0) case. Test: Sample multithreadcmdbuf from LunarG can run without crash Signed-off-by: Xu Randy <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Cc: "13.0 17.0" <[email protected]>
* mesa: simplify code around 'variable_data' in marshal.cBrian Paul2017-03-271-12/+7
| | | | | | | Remove needless pointer increments, unneeded vars, etc. Untested. Plus, fix a couple comments. Reviewed-by: Timothy Arceri <[email protected]>
* st/mesa: move duplicated st_ws_framebuffer() function into header fileBrian Paul2017-03-273-28/+18
| | | | Reviewed-by: Marek Olšák <[email protected]>
* glsl: Interface Block instances don't need linking validationAndres Gomez2017-03-271-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From page 45 (page 52 of the PDF) of the GLSL ES 3.00 v.6 spec: " When instance names are present on matched block names, it is allowed for the instance names to differ; they need not match for the blocks to match. From page 51 (page 57 of the PDF) of the GLSL 4.30 v.8 spec: " When instance names are present on matched block names, it is allowed for the instance names to differ; they need not match for the blocks to match." Therefore, no cross linking validation is needed for the instance name of an Interface Block. This patch will make that no link error will be reported on a program like this: "# VS layout(binding = 1) Block1 { vec4 color; } uni_block; ... # FS layout(binding = 2) Block2 { vec4 color; } uni_block; ..." Fixes GL45-CTS.enhanced_layouts.ssb_layout_qualifier_conflict Signed-off-by: Andres Gomez <[email protected]> Cc: Timothy Arceri <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: UBOs and SSBOs must match the binding qualifier tooAndres Gomez2017-03-271-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From page 140 (page 147 of the PDF) of the GLSL ES 3.10 v.4 spec: " 9.2 Matching of Qualifiers The following tables summarize the requirements for matching of qualifiers. It applies whenever there are two or more matching variables in a shader interface. Notes: 1. Yes means the qualifiers must match. ... 9.2.1 Linked Shaders | Qualifier | Qualifier | in/out | Default | uniform | buffer| | Class | | | Uniforms | Block | Block | ... | Layout | binding | N/A | Yes | Yes | Yes |" From page 93 (page 110 of the PDF) of the GL 4.2 (Core Profile) spec: " 2.11.7 Uniform Variables ... Uniform Blocks ... When a named uniform block is declared by multiple shaders in a program, it must be declared identically in each shader. The uniforms within the block must be declared with the same names and types, and in the same order. If a program contains multiple shaders with different declarations for the same named uniform block differs between shader, the program will fail to link." From page 129 (page 150 of the PDF) of the GL 4.3 (Core Profile) spec: " 7.8 Shader Buffer Variables and Shader Storage Blocks ... When a named shader storage block is declared by multiple shaders in a program, it must be declared identically in each shader. The buffer variables within the block must be declared with the same names, types, qualification, and declaration order. If a program contains multiple shaders with different declarations for the same named shader storage block, the program will fail to link." Therefore, if the binding qualifier differs between two linked Uniform or Shader Storage Blocks of the same name, a link error should happen. This patch will make that a link error will be reported on a program like this: "# VS layout(binding = 1) Block { vec4 color; } uni_block1; ... # FS layout(binding = 2) Block { vec4 color; } uni_block2; ..." Signed-off-by: Andres Gomez <[email protected]> Cc: Ian Romanick <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: on UBO/SSBOs link error reset the number of active blocks to 0Andres Gomez2017-03-271-0/+6
| | | | | | | | | | | | | While it's legal to have an active blocks count > 0 on link failure. Unless we actually assign memory for the blocks array we can end up segfaulting in calls such as glUniformBlockBinding(). To avoid having to NULL check these api calls we simply reset the block count to 0 if the array was not created. Signed-off-by: Andres Gomez <[email protected]> Cc: Timothy Arceri <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* anv: enable sampling from fast-cleared images on SKLSamuel Iglesias Gonsálvez2017-03-271-2/+2
| | | | | | | | A resolve is not needed on Skylake in this case. We were forcing a resolve because we set the input_aux_usage to ISL_AUX_USAGE_NONE. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* glsl, st/shader_cache: check the whole sha1 for zeroGrazvydas Ignotas2017-03-272-2/+4
| | | | | | | | | | | | The checks were only looking at the first byte, while the intention seems to be to check if the whole sha1 is zero. This prevented all shaders with first byte zero in their sha1 from being saved. This shaves around a second from Deus Ex load time on a hot cache. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* glsl/shader_cache: restore evicted shader keysGrazvydas Ignotas2017-03-271-0/+17
| | | | | | | | | | | | | | | | | Even though the programs themselves stay in cache and are loaded, the shader keys can be evicted separately. If that happens, unnecessary compiles are caused that waste time, and no matter how many times the program is re-run, performance never recovers to the levels of first hot cache run. To deal with this, we need to refresh the shader keys of shaders that were recompiled. An easy way to currently observe this is running Deux Ex, then piglit and Deux Ex again, or deleting just the cache index. The later is causing over a minute of lost time on all later Deux Ex runs, with this patch it returns to normal after 1 run. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* st/nine: Use atomics for available_texture_memAxel Davy2017-03-261-2/+2
| | | | | | | | | Resource dtor can be executed in the worker thread. Use atomic to avoid threading safety issues. CC: "17.0" <[email protected]> Signed-off-by: Axel Davy <[email protected]> Tested-by: James Harvey <[email protected]>
* st/nine: Resolve deadlock in surface/volume dtors when using csmtAxel Davy2017-03-263-5/+17
| | | | | | | | | | | | | | | | | | | | Surfaces and Volumes can be freed in the worker thread. Without this patch, pending_uploads_counter could be non-zero in the Surfaces or Volumes dtor, leading to deadlock. Instead decrease properly the counter before releasing the item. Also avoid another potential deadlock if the item is not properly unlocked: Do not call UnlockRect which will cause deadlock, but free directly using the deadlock safe nine_context_get_pipe_multithread. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99246 CC: "17.0" <[email protected]> Signed-off-by: Axel Davy <[email protected]> Tested-by: James Harvey <[email protected]>
* st/nine: Fix user vertex data uploader with csmtAxel Davy2017-03-262-8/+8
| | | | | | | | | | Fix regression caused by abb1c645c476b5dd289ce3efae0594f8796f9cf8 The patch made csmt use context.pipe instead of secondary_pipe, leading to thread safety issues. Signed-off-by: Axel Davy <[email protected]>
* scons: Fix dependencies of marshal_generated.[ch].Jose Fonseca2017-03-261-2/+2
| | | | | | | | | | | These generated source files depend not only upon gl_and_es_API.xml, but all other XML files that are included by it. This change updates the generation rules to depend on all gen/*.xml files, like done for other SCons generation rules, and should fix incremental broken SCons builds due to missing dependencies. Trivial.
* glsl: Link tests with CLOCK_LIB.Vinson Lee2017-03-251-3/+6
| | | | | | | | | | Fix 'make check' linking errors with glibc < 2.17. CXXLD glsl/glsl_test glsl/.libs/libglsl.a(libmesautil_la-u_queue.o): In function `u_thread_get_time_nano': src/util/../../src/util/u_thread.h:84: undefined reference to `clock_gettime' Signed-off-by: Vinson Lee <[email protected]>
* mesa/glthread: add custom marshalling for ClearBufferfv()Timothy Arceri2017-03-253-1/+84
| | | | | | This is one of the main causes of syncs in Civ6. Reviewed-by: Nicolai Hähnle <[email protected]>
* util/disk_cache: don't deadlock on premature EOFGrazvydas Ignotas2017-03-251-17/+26
| | | | | | | | | | | | | | If we get EOF earlier than expected, the current read loops will deadlock. This may easily happen if the disk cache gets corrupted. Fix it by using a helper function that handles EOF. Steps to reproduce (on a build with asserts disabled): $ glxgears $ find ~/.cache/mesa/ -type f -exec truncate -s 0 '{}' \; $ glxgears # deadlock Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* genxml: Add 3DSTATE_DEPTH_BUFFER to gen5.xmlChad Versace2017-03-241-0/+56
| | | | | | isl will use this for validating the depth buffer pitch. Reviewed-by: Jason Ekstrand <[email protected]>
* tests/cache_test: mark arguments constGrazvydas Ignotas2017-03-251-4/+4
| | | | | | | | While at it, also fix up a failure message to not reference timestamp and gpu dirs as those are no longer being made. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* freedreno: free compiler when screen is destroyedRob Clark2017-03-243-6/+2
| | | | | | | | | | | | Drop ir3_compiler_destroy(), since it is only ralloc_free() and we shouldn't really have an ir3 dependency in core. If some future hw has a new compiler, as long as all it's resources are ralloc()d then things will all just work. (In practice, I suppose you never really see this leak, but removing it at least cleans up some noise in valgrind.) Signed-off-by: Rob Clark <[email protected]>
* genxml: Whitespace fixesJason Ekstrand2017-03-245-39/+39
| | | | | | | Some field names had extra spaces and some had places where we should have had a space but didn't. Reviewed-by: Chad Versace <[email protected]>
* genxml: Replace "[N]" with "N"Jason Ekstrand2017-03-243-15/+15
| | | | Reviewed-by: Chad Versace <[email protected]>
* genxml/gen6: Remove a couple of bogus valuesJason Ekstrand2017-03-241-6/+2
| | | | Reviewed-by: Chad Versace <[email protected]>
* genxml/gen8: Remove BLACK_LEVEL_CORRECTION_STATEJason Ekstrand2017-03-241-6/+0
| | | | | | | We've never used it, it only exists on gen8, and the name of the struct contains piles of bad characters. Reviewed-by: Chad Versace <[email protected]>
* genxml: Rename two MCS fields to Auxiliary Surface on gen7Jason Ekstrand2017-03-243-8/+7
| | | | | | This makes gen7 more consistent with gen8+ Reviewed-by: Chad Versace <[email protected]>
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