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* gallium/swr: Fix gcc 4.8.5 compile errorKrzysztof Raszkowski2020-02-051-6/+5
| | | | | | | | | Stop using C++14 feature so it can be compile on default centos7 gcc compiler. Reviewed-by: Jan Zielinski <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3679> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3679>
* intel/fs: Don't count integer instructions as being possibly coissueIan Romanick2020-02-051-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Integer instructions don't coissue. Before e64be391dd0 ("intel/compiler: generalize the combine constants pass"), this pass only looked at float sources. There's no shader-db data in that commit, so I collected some. The results are not good: Haswell total instructions in shared programs: 11898805 -> 11908127 (0.08%) instructions in affected programs: 1218680 -> 1228002 (0.76%) helped: 2 HURT: 5171 helped stats (abs) min: 12 max: 111 x̄: 61.50 x̃: 61 helped stats (rel) min: 1.59% max: 9.20% x̄: 5.40% x̃: 5.40% HURT stats (abs) min: 1 max: 311 x̄: 1.83 x̃: 1 HURT stats (rel) min: 0.02% max: 9.91% x̄: 1.05% x̃: 0.70% 95% mean confidence interval for instructions value: 1.55 2.05 95% mean confidence interval for instructions %-change: 1.02% 1.08% Instructions are HURT. total cycles in shared programs: 221664974 -> 221404750 (-0.12%) cycles in affected programs: 120012620 -> 119752396 (-0.22%) helped: 3464 HURT: 3159 helped stats (abs) min: 1 max: 428160 x̄: 314.55 x̃: 16 helped stats (rel) min: <.01% max: 57.33% x̄: 3.40% x̃: 1.28% HURT stats (abs) min: 1 max: 87846 x̄: 262.54 x̃: 14 HURT stats (rel) min: <.01% max: 85.57% x̄: 3.01% x̃: 0.77% 95% mean confidence interval for cycles value: -224.23 145.65 95% mean confidence interval for cycles %-change: -0.50% -0.19% Inconclusive result (value mean confidence interval includes 0). total spills in shared programs: 9804 -> 10047 (2.48%) spills in affected programs: 6869 -> 7112 (3.54%) helped: 2 HURT: 41 total fills in shared programs: 19863 -> 20319 (2.30%) fills in affected programs: 17428 -> 17884 (2.62%) helped: 2 HURT: 41 LOST: 20 GAINED: 13 This also prevents regressions in "intel/fs: Promote integer constants after lowering integer multiplication" (note: that patch will probably not be committed). When the passes are reorderd, code like mul(8) acc0<1>D g9<8,8,1>D -2078209981D { align1 1Q }; gets turned into mov(1) g23<1>D 2078209981D { align1 WE_all 1N }; ... mul(8) acc0<1>D g13<8,8,1>D -g23<0,1,0>D { align1 1Q compacted }; It's not 100% clear why, but these produce different results. Note that -2078209981 & 0x0ffff = 0x0843, and -(2078209981 & 0x0ffff) = 0xffff0843. It seems like the upper 16-bits of the negation should be ignored. Fixes: e64be391dd0 ("intel/compiler: generalize the combine constants pass") Cc: Iago Toral Quiroga <[email protected]> Suggested-by: Matt Turner <[email protected]> Reviewed-by: Matt Turner <[email protected]> The shaders with spills or fills hurt are the usual suspects. A couple compute shaders in Dirt Showdown and a compute shader in Bioshock Infinite. On Haswell, a compute shader (that appears twice in shader-db) from Aztec Ruins was also hurt for spill and fills. Haswell total instructions in shared programs: 11573934 -> 11568335 (-0.05%) instructions in affected programs: 828623 -> 823024 (-0.68%) helped: 2825 HURT: 6 helped stats (abs) min: 1 max: 134 x̄: 2.16 x̃: 1 helped stats (rel) min: 0.02% max: 9.05% x̄: 0.84% x̃: 0.61% HURT stats (abs) min: 1 max: 216 x̄: 81.83 x̃: 56 HURT stats (rel) min: 0.16% max: 8.65% x̄: 4.21% x̃: 4.68% 95% mean confidence interval for instructions value: -2.31 -1.64 95% mean confidence interval for instructions %-change: -0.85% -0.80% Instructions are helped. total cycles in shared programs: 187573593 -> 187004633 (-0.30%) cycles in affected programs: 82816107 -> 82247147 (-0.69%) helped: 2186 HURT: 1741 helped stats (abs) min: 1 max: 35230 x̄: 326.96 x̃: 16 helped stats (rel) min: <.01% max: 46.11% x̄: 3.11% x̃: 0.90% HURT stats (abs) min: 1 max: 6138 x̄: 83.73 x̃: 16 HURT stats (rel) min: <.01% max: 104.11% x̄: 2.73% x̃: 0.75% 95% mean confidence interval for cycles value: -197.13 -92.64 95% mean confidence interval for cycles %-change: -0.72% -0.33% Cycles are helped. total spills in shared programs: 7870 -> 7743 (-1.61%) spills in affected programs: 2260 -> 2133 (-5.62%) helped: 31 HURT: 5 total fills in shared programs: 6320 -> 6263 (-0.90%) fills in affected programs: 3547 -> 3490 (-1.61%) helped: 31 HURT: 6 LOST: 9 GAINED: 9 Ivybridge total instructions in shared programs: 11863372 -> 11859793 (-0.03%) instructions in affected programs: 757183 -> 753604 (-0.47%) helped: 2236 HURT: 3 helped stats (abs) min: 1 max: 81 x̄: 1.86 x̃: 1 helped stats (rel) min: 0.03% max: 5.26% x̄: 0.74% x̃: 0.48% HURT stats (abs) min: 11 max: 301 x̄: 192.33 x̃: 265 HURT stats (rel) min: 1.55% max: 10.51% x̄: 6.89% x̃: 8.62% 95% mean confidence interval for instructions value: -2.01 -1.18 95% mean confidence interval for instructions %-change: -0.77% -0.70% Instructions are helped. total cycles in shared programs: 178377378 -> 177946087 (-0.24%) cycles in affected programs: 76261390 -> 75830099 (-0.57%) helped: 1635 HURT: 1395 helped stats (abs) min: 1 max: 34796 x̄: 333.53 x̃: 16 helped stats (rel) min: <.01% max: 47.15% x̄: 2.82% x̃: 0.64% HURT stats (abs) min: 1 max: 4315 x̄: 81.74 x̃: 18 HURT stats (rel) min: <.01% max: 49.98% x̄: 1.99% x̃: 0.53% 95% mean confidence interval for cycles value: -197.06 -87.62 95% mean confidence interval for cycles %-change: -0.78% -0.43% Cycles are helped. total spills in shared programs: 4188 -> 4182 (-0.14%) spills in affected programs: 1557 -> 1551 (-0.39%) helped: 30 HURT: 3 total fills in shared programs: 5056 -> 5245 (3.74%) fills in affected programs: 2708 -> 2897 (6.98%) helped: 30 HURT: 3 LOST: 5 GAINED: 1 No shader-db changes on any other Intel platform. Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3544> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3544> (cherry picked from commit 59488cbbaca1268841fe5ba42d0a1202b33be23b)
* util/disk_cache: check for write() failure in the zstd pathEric Engestrom2020-02-051-1/+5
| | | | | | | | | | CoverityID: 1458074 Fixes: a8d941091f72923561a6 ("util: Use ZSTD for shader cache if possible") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3672> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3672> (cherry picked from commit 2799676218249c5b9f1dc0a6367e459a1ad5642e)
* anv: implement gen9 post sync pipe control workaroundLionel Landwerlin2020-02-053-0/+39
| | | | | | | | | | | | | | | We've been missing this workaround for a while and since it's required for Gen12, let's implement it for Gen9 first. v2: Update comment for Gen9. v3: Fix clearing of bits... (Lionel) Signed-off-by: Lionel Landwerlin <[email protected]> Cc: <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405> (cherry picked from commit 8949d27bb8b4385e92049c18f728bdcf0a79b093)
* freedreno: allow ctx->batch to be NULLRob Clark2020-02-054-30/+2
| | | | | | | | | | | | | | | This was mostly true already, now that we use `fd_context_batch()` for first access to batch in draw/clear/grid paths. So we can drop the old code in `batch_flush()` that tried to prevent `ctx->batch` from being NULL. Fixes a crash with a large number of tabs in chromium. Cc: "20.0" [email protected] Signed-off-by: Rob Clark <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3700> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3700> (cherry picked from commit 2c07e03b792d57ae807a6953f0d8ff5f4bcdffd0)
* radv: Do not set SX DISABLE bits for RB+ with unused surfaces.Bas Nieuwenhuizen2020-02-051-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The extra bits in CB_SHADER_MASK break dual source blending in SkQP on a Stoney device. However: - As far as I can tell, some other dual source blend tests are passing before and after the change. - A hacked around skqp passes on my Vega desktop and Raven laptop - Getting Skqp to give any useful info or to run it outside of Android on ChromeOS is proving difficult. I have confirmed 3 strategies that seem to work: - The old radv behavior of setting CB_SHADER_MASK to 0xF - AMDVLK: CB_SHADER_MASK = 0xFF, and the 3 RB+ regs are 0. - radeonsi: CB_SHADER_MASK = 0xFF, but does not set DISABLE bits in SX_BLEND_OPT_CONTROL for CB 1-7. Let us use the radeonsi solution as that solution also seems like the correct thing to do for holes. I have tested on my Raven laptop that setting the high surfaces to not disabled and downconvert to 32_R does not imply a performance penalty. Fixes: e9316fdfd48 "radv: fix setting CB_SHADER_MASK for dual source blending" Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3670> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3670> (cherry picked from commit 65a6dc5139fddd5e01eaedcc57fc67e0a6a28c94)
* freedreno/perfcntrs: fix fd leakEric Engestrom2020-02-051-1/+5
| | | | | | | | | CoverityID: 1110568, 1458071 Fixes: 5a13507164a26fc796f0 ("freedreno/perfcntrs: add fdperf") Signed-off-by: Eric Engestrom <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3671> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3671> (cherry picked from commit cae609326678bd00702261f756ce0c16efd530d4)
* st/mesa: Handle the rest renderbuffer formats from OSMesaDanylo Piliaiev2020-02-051-0/+5
| | | | | | | | | | | Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2189 Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/989 Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2036 CC: <[email protected]> Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3216> (cherry picked from commit d83abf1d378be059b4f41a6a44a9bf24c7394084)
* util/os_socket: fix header unavailable on windowsEric Engestrom2020-02-051-1/+2
| | | | | | | | Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2464 Fixes: e62c3cf350a8b169e640 ("util/os_socket: Include unistd.h to fix build error") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Krzysztof Raszkowski <[email protected]> (cherry picked from commit d1165ad18b5e1d8b137daff1b1ad3d11ba4445e4)
* i965: Do not set front_buffer_dirty if there is no front bufferDanylo Piliaiev2020-02-051-1/+3
| | | | | | | | | | | | | | | | | | | Otherwise there will be a warning: "libEGL warning: FIXME: egl/x11 doesn't support front buffer rendering." Happens with EGL_KHR_surfaceless_context: eglMakeCurrent(egl_display, EGL_NO_SURFACE, EGL_NO_SURFACE, egl_context) eglMakeCurrent(egl_display, egl_surface, egl_surface, egl_context) glFlush() // Here will be a warning Cc: <[email protected]> Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1525 Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3628> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3628> (cherry picked from commit 36126b6211f1ac2da0aa94411608b2320553dbb6)
* st/mesa: use uint-result for sampling stencil buffersErik Faye-Lund2020-02-041-4/+5
| | | | | | | | | | | Otherwise, we end up mismatching the result-type and the sampler-type. Fixes: 642125edd97 ("st/mesa: use uint-samplers for sampling stencil buffers") Reviewed-by: Marek Olšák <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3680> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3680> (cherry picked from commit fd27fb511386615cd6b44b037f9f5117846b51d4)
* etnaviv: Destroy rsc->pending_ctx set in etna_resource_destroy()Marek Vasut2020-02-041-0/+1
| | | | | | | | | | | | | | Destroy rsc->pending_ctx set in etna_resource_destroy(), otherwise the memory is allocated, never free'd, and becomes unreachable. This fixes a memory leak. Fixes: 9e672e4d20fb ("etnaviv: keep references to pending resources") Cc: <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3633> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3633> (cherry picked from commit c32bd325e7688c781b7e5de58a2d0534c82f00a0)
* clover: Use explicit conversion from llvm::StringRef to std::stringJan Vesely2020-02-042-2/+3
| | | | | | | | | | Fixes build after llvm 777180a32b61070a10dd330b4f038bf24e916af1 ("[ADT] Make StringRef's std::string conversion operator explicit") CC: <[email protected]> Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> (cherry picked from commit 0ccda2ebff83816cecf4dcb48f367a0d5c8f5fb1)
* panfrost: Fix the damage box clamping logicBoris Brezillon2020-02-031-0/+2
| | | | | | | | | | | | | When the rendering are is not covering the whole FBO, and the biggest damage rect is empty, we can have damage.max{x,y} > damage.min{x,y}, which leads to invalid reload boxes. Fixes: 65ae86b85422 ("panfrost: Add support for KHR_partial_update()") Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676> (cherry picked from commit b550b7ef3b8d12f533b67b1a03159a127a3ff34a)
* util/os_socket: Include unistd.h to fix build errorBernd Kuhls2020-02-031-0/+1
| | | | | | | | | | | | | | | | Fixes In file included from ../src/util/os_socket.c:8: ../src/util/os_socket.h:26:1: error: unknown type name ‘ssize_t’; did you mean ‘size_t’? ssize_t os_socket_recv(int socket, void *buffer, size_t length, int flags); seen with gcc version 8.3.0 (Buildroot 2019.11) and uClibc 1.0.32. Reviewed-by: Eric Engestrom <[email protected]> Fixes: ef5266ebd50e7fa65c56 ("util/os_socket: Add socket related functions.") Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3659> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3659> (cherry picked from commit e62c3cf350a8b169e6401d5f1e1f17388cdc4b77)
* anv/blorp: Use the correct size for vkCmdCopyBufferToImageJason Ekstrand2020-02-031-0/+8
| | | | | | | | | | | | | | Now that we're using an uncompressed format for the buffer, we have to scale down the dimensions we pass into BLORP when doing buffer->image copies. Fixes: dd92179a72 "anv: Canonicalize buffer formats for image/buffer..." Closes: #2452 Reviewed-by: Erik Faye-Lund <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3664> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3664> (cherry picked from commit d7fe9af6202413aa4e6f0f53d89577ed8ea80027)
* lima: Fix build with GCC 10.Vinson Lee2020-02-031-1/+1
| | | | | | | | | | | | | | | | | This patch fixes this build error with GCC 10. /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_context.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_resource.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_draw.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_bo.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_submit.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_util.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_texture.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here Fixes: d71cd245d744 ("lima: Rotate dump files after each finished pp frame") Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Qiang Yu <[email protected]> (cherry picked from commit 02658df152d1a7fedd8ce61dbe6e84566c8c75d0)
* intel/fs: Write the address register with NoMask for MOV_INDIRECTJason Ekstrand2020-02-031-0/+9
| | | | | | | | | | | | This fixes a hang in the following Vulkan CTS test on TGL-LP: dEQP-VK.descriptor_indexing.storage_buffer_dynamic_in_loop Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642> (cherry picked from commit f93dfb509cbf9474befae9919dd8c135bbd67093)
* aco: fix image_atomic_cmp_swapDaniel Schürmann2020-02-032-2/+3
| | | | | | | | Fixes: 71440ba0f5512fe455be66ca48b253ecc37478a9 ('aco: reorder VMEM operands in ACO IR') Reviewed-by: Rhys Perry <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3652> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3652> (cherry picked from commit 3b323d66019bcbb56811b66947b39e77a2c7c3e0)
* aco: fix MUBUF VS input loads when expanding vec3 to vec4 on GFX6Samuel Pitoiset2020-01-311-1/+6
| | | | | | | | | | | | | | | | | When some unused channels are skipped and that we expand vec3 loads to vec4 loads, we have to adjust the fourth component. While we are at it, add an assertion to make sure we don't use MUBUF for vec3 loads on GFX6. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2450 Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2442 Fixes: 6aecc316 ("aco: fix VS input loads with MUBUF on GFX6") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3641> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3641> (cherry picked from commit 0d14f41625fa00187f690f283c1eb6a22e354a71)
* anv: Always fill out the AUX table even if CCS is disabledJason Ekstrand2020-01-313-16/+18
| | | | | | | | Cc: "20.0" [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit 8c5fd2942b4fb2005b3d01fb4cab86a4162c8a90)
* iris: Plumb deref block size through to 3DSTATE_SFJason Ekstrand2020-01-312-6/+10
| | | | | | | Cc: "20.0" [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit 2ccdf881aba7c8cd0c7175995e351e783e0fd11d)
* anv: Plumb deref block size through to 3DSTATE_SFJason Ekstrand2020-01-314-11/+18
| | | | | | | Cc: "20.0" [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit e6b39850f092b387881c4fb4260c9465971422aa)
* intel/blorp: Plumb deref block size through to 3DSTATE_SFJason Ekstrand2020-01-312-7/+11
| | | | | | | Cc: "20.0" [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit ce9c45a60ed51ddb27bd969bdc61336f18121a07)
* intel/common: Return the block size from get_urb_configJason Ekstrand2020-01-316-6/+54
| | | | | | | Cc: "20.0" [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit fdc0c19328fd8e02e4b1bd5c62b93ce6c4597ca1)
* anv: Emit URB setup earlierJason Ekstrand2020-01-311-2/+2
| | | | | | | Cc: "20.0" [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit e340a79b9c4b6ee35eaa10a685395a67d0b0b440)
* iris: Consolodate URB emitJason Ekstrand2020-01-313-36/+15
| | | | | | | | | | Now that we don't have to carry a URB state emit function for BLORP we can roll some stuff together and drop a genX helper. Cc: "20.0" [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit e928676b69bf9cafce1c0304dd473c926b9f2854)
* intel/blorp: Always emit URB config on Gen7+Jason Ekstrand2020-01-314-46/+68
| | | | | | | | | | | | | | | | Previously, i965/iris tried to reuse the currently programmed URB config if it was good enough for BLORP, rather than reprogramming it each time. However, this will make some things harder on Gen12+ and we've not seen any performance impact from emitting URB more frequently in ANV. This makes the blorp <-> driver interface a bit simpler on Gen7+ because now all the driver has to do is to provide the L3$ config rather than trying to hand off URB re-config to blorp. Cc: "20.0" [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit 09e4c33085f15ffa691053143bec9dbf4aecfeaa)
* intel: Take a gen_l3_config in gen_get_urb_configJason Ekstrand2020-01-315-22/+13
| | | | | | | | | | | Instead of making each driver pass in the same push constant size and do it's own L3$ config URB size calculation, just make them pass in their L3$ configuration. Cc: "20.0" [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit 73a684964b392c4df84373e8419e355267d57ff5)
* i965: Re-emit l3 state before BLORP executesJason Ekstrand2020-01-313-3/+7
| | | | | | | | | | | | | If BLORP is the first thing to execute, we may not have set the L3$ config yet. That's not normally a problem but we're about to add code to BLORP which will look at brw_context::l3::config and we'd like that to be initialized. It's also just good practice. Cc: "20.0" [email protected] Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit 9d05822cb8b5d3fd066c64722b76b3507a7fd24f)
* iris: Use the URB size from the L3$ configJason Ekstrand2020-01-313-5/+2
| | | | | | | Cc: "20.0" [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit bff7b3c7bd56c25544ea6e3ea9452358374db10a)
* iris: Store the L3$ configs in the screenJason Ekstrand2020-01-313-14/+21
| | | | | | | | | | | | We only calculate them based on device info and never change them so this seems like a reasonable place to put them. We could also put them in the context, but that's not accessible from iris_init_*_context. Cc: "20.0" [email protected] Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit 99f3178a249525d333c5b27d755a0f99a81b3c17)
* iris: Set SLMEnable based on the L3$ configJason Ekstrand2020-01-311-4/+4
| | | | | | | | Cc: "20.0" [email protected] Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit 6471bac99ec11c7901d6fc9bda908c047e621f5f)
* intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11Jason Ekstrand2020-01-314-4/+4
| | | | | | | | | | | | | SML is no longer in the L3$ on Gen11+. It's not incredibly clear from the docs but no Gen11 platforms are in the list of platforms on which this bit exists. Also, we've been always setting it false on Gen11 in ANV and i965 thanks to GEN_L3P_SLM being zero with no ill effects. Cc: "20.0" [email protected] Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit 73434b665b2ec50cbd1060ce831aec3b2e21517c)
* anv,iris: Set 3DSTATE_SF::DerefBlockSize to per-poly on Gen12+Jason Ekstrand2020-01-313-1/+13
| | | | | | | | | | | | According to the BSpec, this should prevent hangs when using shaders with large URB entries. A more precise fix can be done but it requires re-arranging URB setup. Cc: [email protected] Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit e1bdb127b6875df602bd736465d597725f326621)
* genxml: Add a new 3DSTATE_SF field on gen12Jason Ekstrand2020-01-311-0/+5
| | | | | | | | Cc: [email protected] Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454> (cherry picked from commit 9da9abf8a7a605cc9b79bd4240ff715b79ac774a)
* turnip: Fix vkCmdCopyQueryPoolResults with available flag20.0-branchpointBrian Ho2020-01-301-46/+52
| | | | | | | | | | | | Previously, calling vkCmdCopyQueryPoolResults with the VK_QUERY_RESULT_WITH_AVAILABILITY_BIT flag set the query result field in the buffer to 0 if unavailable and the query result if available. This was a misunderstanding of the Vulkan spec, and this commit corrects the behavior to emitting a separate available result in addition to the query result. Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3560> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3560>
* turnip: Fix vkGetQueryPoolResults with available flagBrian Ho2020-01-301-22/+30
| | | | | | | | | | | Previously, calling vkGetQueryPoolResults with the VK_QUERY_RESULT_WITH_AVAILABILITY_BIT flag set the query result field in *pData to 0 if unavailable and the query result if available. This was a misunderstanding of the Vulkan spec, and this commit corrects the behavior to eriting a separate available result in addition to the query result. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3560>
* turnip: Free event->bo on vkDestroyEventBrian Ho2020-01-301-0/+2
| | | | | | | | Fixes a leak from freeing event but not event->bo. Reviewed-by: Jonathan Marek <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3639> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3639>
* loader: Fix leak of kernel driver nameKenneth Graunke2020-01-301-1/+4
| | | | | | | | | | | This is strdup'd, it needs to be freed. CID: 1458032 Fixes: f93bb2fb102 ("loader: Check if the kernel driver is i915 before loading iris") Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Sagar Ghuge <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3630> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3630>
* i965: Use brw_batch_references in tex_busy checkKenneth Graunke2020-01-301-1/+2
| | | | | | | | | | | | | If the batch references the buffer, we will have to flush the batch immediately before mapping it, at which point it will be busy. (This bug has existed for a long time...even going back to BLT-era...) Fixes: 779923194c6 ("i965/tex_image: Use meta for instead of the blitter PBO TexImage and GetTexImage") Fixes: d5d4ba9139a ("i965/tex_subimage: use meta instead of the blitter for PBO TexSubImage") Reviewed-by: Lionel Landwerlin <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3616> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3616>
* etnaviv: drm-shim: add GC400Christian Gmeiner2020-01-301-1/+28
| | | | | | | | | These are the ETNAVIV_PARAM's returned from a GC400 found on a STM32MP157C-DK2 Discovery Board running mainline kernel. Signed-off-by: Christian Gmeiner <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3195> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3195>
* lima: add noheap debug optionQiang Yu2020-01-302-0/+6
| | | | | | | | | Disable using heap buffer when set. Reviewed-by: Vasily Khoruzhick <[email protected]> Signed-off-by: Qiang Yu <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3264> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3264>
* lima: create heap buffer with new interface if availableQiang Yu2020-01-306-4/+33
| | | | | | | | | | | Newly added heap buffer create interface can create a large enough buffer whose backup memory can increase dynamically as needed. Reviewed-by: Vasily Khoruzhick <[email protected]> Tested-by: Andreas Baierl <[email protected]> Signed-off-by: Qiang Yu <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3264>
* lima: fix lima_set_vertex_buffers()Icenowy Zheng2020-01-301-1/+1
| | | | | | | | | | | | | | | | | | | | When setting the vertex buffers, lima calls util_set_vertex_buffers_mask() to reference and copy buffers. That function function adds dst with start_slot internally, so lima should not offset the destination address again. This is discovered when comparing with other drivers, and fixed by removing the extra offset in lima_set_vertex_buffers(). This fixes draws that get translated in u_vbuf, because u_vbuf adds extra vertex buffers when translating. Signed-off-by: Icenowy Zheng <[email protected]> Reviewed-by: Andreas Baierl <[email protected]> Reviewed-by: Vasily Khoruzhick <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3620> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3620>
* turnip: hook up cmdbuffer event set/waitJonathan Marek2020-01-291-16/+42
| | | | | | | | | Gets some basic tests under "dEQP-VK.synchronization.*event*" passing Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3123> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3123>
* etnaviv: drop default state for PE_STENCIL_CONFIG_EXT2Christian Gmeiner2020-01-291-1/+0
| | | | | | | | | It gets emitted when needed. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Jonathan Marek <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3631> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3631>
* radv: refactor physical device propertiesSamuel Pitoiset2020-01-291-250/+233
| | | | | | | | | | Based on ANV. This removes a bunch of duplicated code for properties. Fixes: 1b8d99e2885 ("radv: bump conformance version to 1.2.0.0") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3626> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3626>
* freedreno: remove flush-queueRob Clark2020-01-2914-97/+24
| | | | | | Signed-off-by: Rob Clark <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
* freedreno: add gmem_lockRob Clark2020-01-293-0/+18
| | | | | | | | | | | | | The gmem state is split out now, so it does not require synchronization. But gmem rendering still accesses vsc state from the context. TODO maybe there is a better way? For gen's that don't do vsc resizing, this is probably easier.. but for a6xx there isn't really a great position for more fine grained locking. Maybe it doesn't matter since in practice the lock shouldn't be contended. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-11 11:09:12 +0000