index
:
mesa.git
gallium_va_encpackedheader01
master
Unnamed repository; edit this file 'description' to name the repository.
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
Commit message (
Expand
)
Author
Age
Files
Lines
*
radv: use a 16 bytes array for the sampled/storage image descriptors
Samuel Pitoiset
2017-11-20
3
-12
/
+8
*
radv: do not add the query pool BO to the list in vkCmdEndQuery()
Samuel Pitoiset
2017-11-20
1
-1
/
+3
*
radv: only load needed depth clear regs for fast depth clears
Samuel Pitoiset
2017-11-20
1
-2
/
+12
*
radv: do not add the image BO in radv_set_depth_clear_regs()
Samuel Pitoiset
2017-11-20
1
-2
/
+0
*
radv: remove useless assertion in emit_depthstencil_clear()
Samuel Pitoiset
2017-11-20
1
-4
/
+0
*
radv: remove useless check in radv_set_depth_clear_regs()
Samuel Pitoiset
2017-11-20
1
-1
/
+1
*
glsl: Catch subscripted calls to undeclared subroutines
George Barrett
2017-11-20
1
-2
/
+7
*
broadcom/vc5: Fix up integer texture handling.
Eric Anholt
2017-11-19
2
-27
/
+51
*
broadcom/vc5: Fix simulator assertion failures about color RT clears.
Eric Anholt
2017-11-19
1
-2
/
+19
*
freedreno/ir3: add texture gather support
Rob Clark
2017-11-18
2
-2
/
+17
*
etnaviv: enable full overwrite when no color buffer is present
Lucas Stach
2017-11-18
2
-3
/
+3
*
i965: Stop including brw_cfg.h in brw_disasm_info.h
Jason Ekstrand
2017-11-17
1
-1
/
+5
*
i965: Mark BOs as external when we export their handle
Jason Ekstrand
2017-11-17
3
-1
/
+11
*
i965/bufmgr: Add a helper to mark a BO as external
Jason Ekstrand
2017-11-17
1
-6
/
+11
*
i965: Correct disasm_info usage in eu_validate test
Andres Gomez
2017-11-18
1
-6
/
+6
*
broadcom/vc5: Set up the padded height at surface creation time.
Eric Anholt
2017-11-17
3
-16
/
+15
*
broadcom/vc5: Ensure that there is always a TLB write.
Eric Anholt
2017-11-17
1
-1
/
+17
*
broadcom/vc5: Fix clear color for swap_color_rb render targets.
Eric Anholt
2017-11-17
1
-0
/
+9
*
broadcom/vc5: Fix pasteo in front stencil ref value setup.
Eric Anholt
2017-11-17
1
-1
/
+1
*
broadcom/vc5: Fix colormasking when we need to swap r/b colors.
Eric Anholt
2017-11-17
1
-9
/
+24
*
broadcom/vc5: Enable the Z min/max clipping planes.
Eric Anholt
2017-11-17
1
-2
/
+0
*
broadcom/vc5: Fix driver for new PIPE_SHADER_CAP_MAX_HW_ATOMIC_*.
Eric Anholt
2017-11-17
1
-0
/
+2
*
r300: add PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER* switch cases
Brian Paul
2017-11-17
1
-0
/
+2
*
tgsi: s/uint/enum pipe_shader_type/
Brian Paul
2017-11-17
2
-2
/
+2
*
tgsi: bump tgsi_opcode_info::output_mode size to 4 bits
Brian Paul
2017-11-17
2
-1
/
+3
*
i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround.
Kenneth Graunke
2017-11-17
1
-1
/
+5
*
egl: Convert int to attrib in eglGetPlatformDisplay
Adam Jackson
2017-11-17
3
-25
/
+25
*
i965: Rename intel_asm_annotation -> brw_disasm_info
Matt Turner
2017-11-17
6
-8
/
+8
*
i965: Rewrite disassembly annotation code
Matt Turner
2017-11-17
11
-171
/
+174
*
i965: Simplify annotation_insert_error()
Matt Turner
2017-11-17
1
-9
/
+6
*
i965: Move common code out of #ifdef
Matt Turner
2017-11-17
2
-9
/
+4
*
i965: Remove DWord length from MI_FLUSH_DW definition
Anuj Phogat
2017-11-17
1
-1
/
+1
*
anv/cmd_buffer: Take bo_offset into account in fast clear state addresses
Jason Ekstrand
2017-11-17
1
-1
/
+1
*
anv/cmd_buffer: Advance the address when initializing clear colors
Jason Ekstrand
2017-11-17
1
-3
/
+6
*
radeon/video: enable encode support for raven
Boyuan Zhang
2017-11-17
1
-1
/
+2
*
radeonsi: enable vcn encode
Boyuan Zhang
2017-11-17
1
-1
/
+3
*
radeon/vcn: add create encoder
Boyuan Zhang
2017-11-17
1
-1
/
+81
*
radeon/vcn: add encode get feedback
Boyuan Zhang
2017-11-17
1
-1
/
+14
*
radeon/vcn: add encode destroy
Boyuan Zhang
2017-11-17
1
-1
/
+15
*
radeon/vcn: add encode end frame
Boyuan Zhang
2017-11-17
1
-1
/
+2
*
radeon/vcn: add encode bitstream
Boyuan Zhang
2017-11-17
1
-1
/
+13
*
radeon/vcn: add encode begin frame
Boyuan Zhang
2017-11-17
1
-1
/
+22
*
radeon/vcn: add encode header implementations
Boyuan Zhang
2017-11-17
2
-0
/
+241
*
radeon/vcn: add encode header algorithms
Boyuan Zhang
2017-11-17
2
-0
/
+127
*
radeon/vcn: add ib implementations
Boyuan Zhang
2017-11-17
1
-24
/
+268
*
radeon/vcn: add common encode part
Boyuan Zhang
2017-11-17
5
-0
/
+489
*
st/va: implement poc type
Boyuan Zhang
2017-11-17
1
-0
/
+1
*
vl: add poc type
Boyuan Zhang
2017-11-17
1
-0
/
+1
*
winsys/amdgpu: add vcn enc cs support
Boyuan Zhang
2017-11-17
1
-1
/
+6
*
radeon/common: add vcn enc ip info query
Boyuan Zhang
2017-11-17
1
-1
/
+9
[next]