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* i965/gen6: Refactor SF setup a bit to handle overrides in one place.Eric Anholt2011-06-091-19/+24
| | | | Acked-by: Kenneth Graunke <[email protected]>
* r300g: fix texturing with non-3D textures and wrap R mode set to sample borderMarek Olšák2011-06-091-0/+6
| | | | | | | | | | If the wrap R (3rd) mode is set to CLAMP or CLAMP_TO_BORDER and the texture isn't 3D, r300 always samples the border color regardless of texture coordinates. I HATE THIS HARDWARE. NOTE: This is a candidate for the 7.10 branch.
* r300g: don't enable aniso with nearest filteringMarek Olšák2011-06-091-41/+39
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* r600g: adjust vs/ps gprs on r600/r700 cards when needed.Dave Airlie2011-06-095-19/+77
| | | | | | | | | | | | | | | Ideally we'd have a compiler and register spilling and all that but this is good enough for now to avoid the gpu hang in piglit, glsl-vs-vec4-indexing-temp-dst-in-nested-loop-combined on r600/r700 cards. based on r600c patch Andre Maasikas <[email protected]> r600c: bump sq gpr resources if a shader needs more than default Signed-off-by: Dave Airlie <[email protected]>
* r600g: remove unused variableMarek Olšák2011-06-091-1/+0
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* r300g: fix draw_vbo splitting on r3xx-r4xxMarek Olšák2011-06-091-5/+10
| | | | NOTE: This is a candidate for the 7.10 branch.
* r300g: make translate_primitive table-drivenMarek Olšák2011-06-091-24/+20
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* util: fix strict aliasing issues in u_format_r11g11b10f.hRoland Scheidegger2011-06-091-8/+16
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* mesa: get rid of homegrown logbase2 implementation in driversRoland Scheidegger2011-06-092-28/+2
| | | | | Some of the logbase2 functions did just the same as _mesa_logbase2, though they were taking signed numbers (but it shouldn't matter for them).
* mesa: fix gcc version check for _mesa_bitcountRoland Scheidegger2011-06-091-3/+3
| | | | The version check was bogus, and only inside a non-gcc block anyway.
* mesa: use __builtin_clz for logbase2 when availableRoland Scheidegger2011-06-092-20/+24
| | | | | Also rename to _mesa_logbase2 and move to imports.h to keep the ugly ifdef GNUC stuff outside other files (also to allow reuse).
* util: add gcc version check for builtinsRoland Scheidegger2011-06-091-3/+3
| | | | | Looks like only next_power_of_two, logbase2 and bitcount use builtins requiring gcc 3.4, so maybe everything else compiles with older gcc.
* util: better logbase2/next_power_of_two implementationsBenjamin Bellec2011-06-091-8/+24
| | | | | Use __builtin_clz when available for logbase/next_power_of_two, and replace next_power_of_two with faster implementation otherwise.
* glx/xlib: Handle glXCreateContextAttribsARB in glXGetProcAddress.José Fonseca2011-06-081-0/+3
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* i965/gen7: Call gen7_create_constant_surface instead of brw_[...].Kenneth Graunke2011-06-083-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes 17 piglit tests: - glsl-vs-arrays-3 - glsl-vs-texturematrix-2 - glsl-vs-uniform-array-2 - arl - nv-arl - nv-init-zero-addr - vp-address-01 - vp-arl-constant-array - vp-arl-constant-array-huge - vp-arl-constant-array-huge-offset - vp-arl-constant-array-huge-offset-neg - vp-arl-constant-array-huge-relative-offset - vp-arl-constant-array-huge-varying - vp-arl-env-array - vp-arl-local-array - vp-arl-neg-array - vp-arl-neg-array-2 Fixes 4 glean tests: - glsl1-constant array of vec4 with variable indexing, vertex shader - glsl1-constant array with variable indexing, vertex shader - glsl1-constant array with variable indexing, vertex shader (2) - vp1-ARL test Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/gen7: Enable SIMD16 fragment shader dispatch.Kenneth Graunke2011-06-081-2/+6
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/gen7: Don't emit 3DSTATE_GS_SVB_INDEX on Ivybridge.Kenneth Graunke2011-06-081-7/+9
| | | | | | | | | | According to vol2a.07, it only applies from Cantiga to Sandybridge. I found this in my ringbuffers while investigating various GPU hangs. While it may not have been the cause, it seemed wise to remove it. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/gen7: Program stencil buffers on Ivybridge.Kenneth Graunke2011-06-081-19/+42
| | | | | | | | Thanks to Chad's hard work implementing separate stencil and HiZ support, this is entirely straightforward. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/gen7: Add a prepare_depthbuffer function.Kenneth Graunke2011-06-081-0/+15
| | | | | | | We need to call add_validated_bo to do proper aperture space accounting. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/gen7: gen7_emit_depthbuffer needs the _NEW_DEPTH dirty bit.Kenneth Graunke2011-06-081-1/+2
| | | | | | | For ctx->Depth.Mask. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/gen7: Remove stencil renderbuffer from gen7_depth_format.Kenneth Graunke2011-06-081-3/+0
| | | | | | | | Since Gen7 doesn't support packed depth/stencil, the stencil buffer can't possibly be relevant for determining the depth format. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* st/mesa: more helpful debug message in destroy_program_variants_cb()Brian Paul2011-06-081-2/+2
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* svga: fix typos, update commentsBrian Paul2011-06-081-7/+5
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* glx: Remove some GLX_USE_APPLEGL guards around glapiJeremy Huddleston2011-06-081-7/+3
| | | | | | Now that we're using glapi, we don't need some GLX_USE_APPLEGL ifdef-foo Signed-off-by: Jeremy Huddleston <[email protected]>
* darwin: Use -fvisibility=hidden to set default symbol visibilityJeremy Huddleston2011-06-082-20/+7
| | | | Signed-off-by: Jeremy Huddleston <[email protected]>
* intel: Request DRI2 buffers for separate stencil and hizChad Versace2011-06-083-14/+444
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When it is sensible to do so, 1) intelCreateBuffer() now attaches separate depth and stencil buffers to the framebuffer it creates. 2) intel_update_renderbuffers() requests for the framebuffer a separate stencil buffer (DRI2BufferStencil). The criteria for "sensible" is: - The GLX config has nonzero depth and stencil bits. - The hardware supports separate stencil. - The X driver supports separate stencil, or its support has not yet been determined. If the hardware supports hiz too, then intel_update_renderbuffers() also requests DRI2BufferHiz. If after requesting DRI2BufferStencil we determine that X driver did not actually support separate stencil, we clean up the mistake and never ask for DRI2BufferStencil again. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add assertions to intelCreateBuffer()Chad Versace2011-06-081-3/+12
| | | | | | | | | | | | | | | Assert that the GLX config has an expected depth/stencil bit combination: one of d24/s8, d16/s0, d0/s0. These are the only depth/stencil configurations that we advertise. Remove the check for software stencil, because given the assertions' constraints the check always fails. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Refactor intel_update_renderbuffers()Chad Versace2011-06-081-111/+212
| | | | | | | | | | | | | | | | | | | | | | Extract the code that queries DRI2 to obtain the DRIdrawable's buffers into intel_query_dri2_buffers_no_separate_stencil(). Extract the code that assigns the DRI buffer's DRM region to the corresponding renderbuffer into intel_process_dri2_buffer_no_separate_stencil(). Rationale --------- The next commit enables intel_update_renderbuffers() to query for separate stencil and hiz buffers. Without separating the separate-stencil and no-separate-stencil paths, intel_update_renderbuffers() degenerates into an impenetrable labyrinth of if-trees. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add function intel_renderbuffer_set_hiz_region()Chad Versace2011-06-082-0/+17
| | | | | | | | | | | It's the analog of intel_renderbuffer_set_region(), but for the hiz region of course. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel/intel_context.c: Remove unused functionsChad Versace2011-06-081-48/+0
| | | | | | | | | | | Remove functions intel_override_hiz() and intel_override_separate_stencil(). They are now located in intel_screen.c. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add flags to intel_screen for hiz and separate stencilChad Versace2011-06-083-7/+73
| | | | | | | | | | | | | | | | | | | | | Add the fields below to intel_screen. The expression in parens is the value to which intelInitScreen2() currently sets the field. GLboolean hw_has_separate_stencil (true iff gen >= 7) GLboolean hw_must_use_separate_stencil (true iff gen >= 7) GLboolean hw_has_hiz (always false) enum intel_dri2_has_hiz dri2_has_hiz (INTEL_DRI2_HAS_HIZ_UNKNOWN) The analogous fields in intel_context now inherit their values from intel_screen. When hiz and separate stencil become completely implemented for a given chipset, then the respective fields need to be enabled. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Define enum intel_dri2_has_hizChad Versace2011-06-081-0/+56
| | | | | | | | | | | | | ... which indicates if the X driver supports DRI2BufferHiz and DRI2BufferStencil. I'm placing this in its own commit due to the large comment block. CC: Ian Romanick <[email protected]> CC: Kristian Høgsberg <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Define span functions for S8 renderbuffersChad Versace2011-06-081-0/+64
| | | | | | | | | Since the stencil buffer is interleaved, the generic Mesa renderbuffer accessors do not suffice. Custom span functions are necessary. Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965/brw: Emit state for hiz and separate stencil buffersChad Versace2011-06-082-9/+107
| | | | | | | | | | When emitting 3DSTATE_DEPTH_BUFFER, also emit 3DSTATE_HIER_DEPTH_BUFFER if there is a hiz buffer. Ditto for 3DSTATE_STENCIL_BUFFER and a separate stencil buffer. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* st/egl: set EGL_ALPHA_MASK_SIZEChia-I Wu2011-06-091-0/+4
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* mesa: merge glapidispatch.h into dispatch.hChia-I Wu2011-06-088-12298/+12257
| | | | | | | | | glapidispatch.h was located in glapi and shared with mesa core. Because the way it was shared, mesa core must include it indirectly via main/dispatch.h. Now that it is no longer needed by glapi and is located in core mesa, merging it with main/dispatch.h to avoid wrong uses.
* mesa: fix function remapping for dlistChia-I Wu2011-06-081-1/+0
| | | | | | glapidispatch.h should not be included directly. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36282
* mesa: fix GLES remap table setup againChia-I Wu2011-06-082-11/+16
| | | | | | | | | Generate different glapidispatch.h's for GL and GLES. For GLES, we want a local remap table. This reverts commit 5af46e836073d2112b147b524e441bdb808cc128. The commit will break GL remap table setup when main/glapidispatch.h is regenerated.
* r600g: fix mixup in GPR resource reg setupAlex Deucher2011-06-081-3/+10
| | | | | | | GLOBAL_GPR regs should be 0. Need to set the number of temp regs in SQ_GPR_RESOURCE_MGMT_1. Signed-off-by: Alex Deucher <[email protected]>
* vbo: run 'indent' on vbo_save_api.cBrian Paul2011-06-081-362/+456
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* vbo: rename DO_FALLBACK -> dlist_fallbackBrian Paul2011-06-081-9/+9
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* vbo: remove node->count > 0 test in vbo_save_playback_vertex_list()Brian Paul2011-06-081-9/+11
| | | | | | | | | | | | | | See piglit dlist-fdo31590.c test and http://bugs.freedesktop.org/show_bug.cgi?id=31590 In this case we had node->prim_count=1 but node->count==0 because the display list started with glBegin() but had no vertices. The call to glEvalCoord1f() triggered the DO_FALLBACK() path. When replaying the display list, the old condition basically no-op'd the call to vbo_save_playback_vertex_list call(). That led to the invalid operation error being raised in glEnd(). NOTE: This is a candidate for the 7.10 branch.
* vbo: check array indexes to prevent negative indexingBrian Paul2011-06-082-10/+13
| | | | | | See the piglit dlist-fdo31590.c test NOTE: This is a candidate for the 7.10 branch.
* st: use _mesa_is_bufferobj()Brian Paul2011-06-081-3/+4
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* vbo: added a commentBrian Paul2011-06-081-1/+1
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* gallium: fix comments for pipe_stream_output_stateBrian Paul2011-06-081-7/+9
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* mesa: remove old commentBrian Paul2011-06-081-1/+0
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* mesa: add more sampler types to is_sampler_type()Brian Paul2011-06-081-0/+4
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* gallium: s/bool/boolean/Brian Paul2011-06-0813-21/+21
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* draw: fix edge flag handling in clipper (for unfilled tris/quads/polygons)Brian Paul2011-06-081-5/+57
| | | | | | | | | | | | | | | | | | | | Previously, we were errantly drawing some interior edges of clipped polygons and quads. Also, we were introducing extra edges where polygons intersected the view frustum clip planes. The main problem was that we were ignoring the edgeflags encoded in the primitive header's 'flags' field which are set during polygon/quad ->tri decomposition. We need to observe those during clipping. Since we can't modify the existing vert's edgeflag fields, we need to store them in a parallel array. Edge flags also need to be handled differently for view frustum planes vs. user-defined clip planes. In the former case we don't want to draw new clip edges but in the later case we do. This matches NVIDIA's behaviour and it just looks right. Finally, note that the LLVM draw code does not properly set vertex edge flags. It's OK on the regular software path though.
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