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* meta: Avoid null access on setup_glsl_msaa_blit_shader()Juha-Pekka Heikkila2014-09-231-11/+13
* i965: Add extra null check in intel_bufferobj_alloc()Juha-Pekka Heikkila2014-09-231-0/+3
* mesa/main: Check allocations success in _mesa_one_time_init_extension_overrid...Juha-Pekka Heikkila2014-09-231-0/+9
* glsl: Check realloc return value in ir_function::matching_signature()Juha-Pekka Heikkila2014-09-231-2/+9
* loader: Check dlsym() did not fail in libudev_get_device_name_for_fd()Juha-Pekka Heikkila2014-09-231-0/+3
* glsl: Check calloc return value in link_intrastage_shaders()Juha-Pekka Heikkila2014-09-231-4/+11
* i965: Avoid null access in intelMakeCurrent()Juha-Pekka Heikkila2014-09-231-3/+7
* mesa: add null checks in symbol_table.cJuha-Pekka Heikkila2014-09-231-0/+30
* glsl: add missing null check in tfeedback_decl::init()Juha-Pekka Heikkila2014-09-231-0/+5
* i965: in set_read_rb_tex_image() check _mesa_meta_bind_rb_as_tex_image() did ...Juha-Pekka Heikkila2014-09-232-5/+18
* glsl: Fix memory leak in glsl_lexer.llJuha-Pekka Heikkila2014-09-231-3/+6
* ilo: rework pipeline workaroundsChia-I Wu2014-09-233-228/+339
* ilo: remove handle_invalid_batch_bo()Chia-I Wu2014-09-233-67/+32
* ilo: make gen6_pipeline_update_max_svbi() staticChia-I Wu2014-09-233-8/+1
* freedreno/ir3: add TXB2 supportIlia Mirkin2014-09-221-4/+14
* freedreno/ir3: add TXQ supportIlia Mirkin2014-09-221-0/+27
* freedreno/ir3: fix TXB/TXL to actually pull the bias/lod argumentIlia Mirkin2014-09-221-1/+4
* freedreno/ir3: make texture instruction construction more dynamicIlia Mirkin2014-09-221-145/+80
* i915: Fix black buffers when importing prime fdsAndreas Pokorny2014-09-231-0/+2
* egl/drm: expose KHR_image_pixmap extensionAndreas Pokorny2014-09-231-0/+1
* gallium: update comment for enum pipe_formatBrian Paul2014-09-221-6/+1
* gallium: replace pipe_type enum with tgsi_return_type enumBrian Paul2014-09-227-28/+29
* draw: use new tgsi_transform inst/decl helpers in pstipple codeBrian Paul2014-09-221-68/+19
* draw: use new tgsi_transform inst/decl helpers in aapoint codeBrian Paul2014-09-221-202/+54
* draw: use new tgsi_transform inst/decl helpers in aaline codeBrian Paul2014-09-221-66/+21
* tgsi: add inst/decl helpers for tgsi_transform utilityBrian Paul2014-09-221-0/+333
* draw: use tgsi transform prolog callback in polygon stipple codeBrian Paul2014-09-221-125/+110
* draw: use tgsi transform prolog/epilog callbacks in AA line codeBrian Paul2014-09-221-90/+92
* draw: use tgsi transform prolog/epilog callbacks in AA point codeBrian Paul2014-09-221-305/+316
* tgsi: fix tgsi transform's epilog callbackBrian Paul2014-09-221-7/+15
* tgsi: add prolog() method to tgsi_transform_contextBrian Paul2014-09-222-0/+13
* glsl: use ptrdiff_t cast to silence g++ sign warningBrian Paul2014-09-221-1/+1
* i965/fs: Remove direct fs_visitor brw_wm_prog_key dependenceJordan Justen2014-09-225-9/+36
* i965/fs: Use brw_sampler_prog_key_data instead of brw_wm_prog_key::texJordan Justen2014-09-221-12/+29
* i965/fs: Remove direct fs_visitor brw_wm_prog_data dependenceJordan Justen2014-09-223-21/+56
* clover: Add support to mem objects for multiple destructor callbacks v2Tom Stellard2014-09-222-5/+8
* st/xa: silence unused variable warningBrian Paul2014-09-221-0/+1
* target-helpers: add inline qualifier on configuration_query()Brian Paul2014-09-221-1/+1
* ilo: clean up fallback path for primitive restartChia-I Wu2014-09-221-160/+74
* ilo: handle conditional rendering in the contextChia-I Wu2014-09-228-65/+58
* ilo: create the pipeline from the builderChia-I Wu2014-09-225-15/+7
* ilo: move aperture checks out of pipelineChia-I Wu2014-09-223-72/+69
* ilo: flush before setting SOL_RESETChia-I Wu2014-09-222-5/+8
* ilo: move size estimation check out of pipelineChia-I Wu2014-09-223-10/+10
* freedreno/a3xx: more texture array fixesRob Clark2014-09-213-19/+22
* freedreno: add DRM_CONF_SHARE_FDRob Clark2014-09-213-4/+34
* ilo: use a single list for queriesChia-I Wu2014-09-212-69/+8
* ilo: replace software queries by hardware onesChia-I Wu2014-09-214-83/+47
* ilo: support prim queries in ilo_3d_pipeline_emit_query()Chia-I Wu2014-09-211-0/+24
* ilo: add ilo_3d_pipeline_emit_query()Chia-I Wu2014-09-216-180/+123