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* gallium/util: Use PIPE_TRANSFER_DISCARD_RANGE in pipe_buffer_write.Mathias Fröhlich2011-03-151-0/+2
| | | | | | | | Additionally, to discarding the whole buffer, use PIPE_TRANSFER_DISCARD_RANGE in pipe_buffer_write when the write covers only part of the buffer. Signed-off-by: Mathias Fröhlich <[email protected]>
* st/mesa: Make use of the new PIPE_TRANSFER_DISCARD_* for buffer object.Mathias Fröhlich2011-03-151-5/+9
| | | | | | | | In memory mapping buffer objects make use of PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE and PIPE_TRANSFER_DISCARD_RANGE when appropriate. Signed-off-by: Mathias Fröhlich <[email protected]>
* glx: add ARB_create_context functions/ops to glx xmlDave Airlie2011-03-151-0/+14
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* r600g: FLT_TO_INT_FLOOR and FLT_TO_INT_RPI are vector-only instructions on ↵Henri Verbeet2011-03-151-3/+6
| | | | | | Evergreen. Signed-off-by: Henri Verbeet <[email protected]>
* r600g: fix logic error in 028987c80362eddd39176628486a456b076f0427Alex Deucher2011-03-141-1/+1
| | | | | | Spotted by Henri on IRC. Signed-off-by: Alex Deucher <[email protected]>
* r600g: don't set per-MRT blend bits on R600Alex Deucher2011-03-141-5/+10
| | | | | | | | | It doesn't support them. Also, we shouldn't be emitting CB_BLENDx_CONTROL on R600 as the regs don't exist there, but I'm not sure of the best way to deal with this in the current r600 winsys. Signed-off-by: Alex Deucher <[email protected]>
* r600g: Original R600 does not support per-MRT blendsAlex Deucher2011-03-141-2/+11
| | | | | | Only rv6xx+ support them. Signed-off-by: Alex Deucher <[email protected]>
* r600g: emit SURFACE_BASE_UPDATE packet on rv6xxAlex Deucher2011-03-142-2/+25
| | | | | | | | This packet is required when updating the DB, CB, or STRMOUT base addresses on rv6xx for the surface sync logic to work correctly. Signed-off-by: Alex Deucher <[email protected]>
* r600g: Properly update MULTIWRITE_ENABLE in r600_pipe_shader_ps().Henri Verbeet2011-03-142-8/+7
| | | | | | | This sort of worked because blend state setup cleared MULTIWRITE_ENABLE again, but that's not something we want to depend on. Signed-off-by: Henri Verbeet <[email protected]>
* r600g: Fix the DB_SHADER_CONTROL mask in create_ds_state().Henri Verbeet2011-03-142-10/+8
| | | | Signed-off-by: Henri Verbeet <[email protected]>
* r600g: Properly update DB_SHADER_CONTROL in evergreen_pipe_shader_ps().Henri Verbeet2011-03-141-18/+14
| | | | | | | Disable Z_EXPORT / STENCIL_EXPORT / KILL_ENABLE again if a shader doesn't use those. This is similar to 0a6f09a76a416b8672e149c520aa5bef33174223. Signed-off-by: Henri Verbeet <[email protected]>
* r600g: Move fetch shader register setup to r600_state.c / evergreen_state.c.Henri Verbeet2011-03-146-31/+32
| | | | Signed-off-by: Henri Verbeet <[email protected]>
* r600g: Move r600_pipe_shader_ps() to r600_state.c.Henri Verbeet2011-03-143-95/+97
| | | | Signed-off-by: Henri Verbeet <[email protected]>
* r600g: Move r600_pipe_shader_vs() to r600_state.c.Henri Verbeet2011-03-143-49/+49
| | | | | | | | The idea behind this is that anything touching registers should be in r600_state.c or evergreen_state.c. This is also consistent with evergreen_pipe_shader_vs(). Signed-off-by: Henri Verbeet <[email protected]>
* r600g: Evergreen add support for log opcode.Rafael Monica2011-03-141-1/+1
| | | | Signed-off-by: Henri Verbeet <[email protected]>
* i965: Enable texture lookups whose return type is 'float'Kenneth Graunke2011-03-141-1/+4
| | | | | | | This enables the new shadow texture functions in GLSL 1.30. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Fix tex_swizzle when depth mode is GL_REDChad Versace2011-03-141-1/+2
| | | | | | | Change swizzle from (x000) to (x001). Signed-off-by: Chad Versace <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Remove dead assignmentChad Versace2011-03-141-2/+0
| | | | | | | | The assignment on line 368, `tex_swizzles[i] = SWIZZLE_NOOP`, is rendered dead by the reassignment on line 392. Signed-off-by: Chad Versace <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Explicitly specify a type when reading/printing ir_texture.Kenneth Graunke2011-03-145-33/+42
| | | | | | This is necessary for GLSL 1.30+ shadow sampling functions, which return a single float rather than splatting the value to a vec4 based on GL_DEPTH_TEXTURE_MODE.
* texture_builtins.py: Add support for 130-style Shadow sampler variants.Kenneth Graunke2011-03-141-1/+53
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* mesa: rename _mesa_texstore_a8 -> _mesa_texstore_unorm8Marek Olšák2011-03-141-6/+6
| | | | It's a generic function capable of storing A8, L8, I8, R8.
* mesa: fix up assertion in _mesa_source_buffer_existsMarek Olšák2011-03-141-0/+2
| | | | | | | | | | This was probably missed when implementing luminance and luminance alpha render targets. _mesa_get_format_bits checks for both GL_*_BITS and GL_TEXTURE_*_SIZE. This fixes: main/framebuffer.c:892: _mesa_source_buffer_exists: Assertion `....' failed.
* r300g: clamp after blending for fixed-point formats onlyMarek Olšák2011-03-143-14/+36
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* glx: the server still needs __GLXcontext.Dave Airlie2011-03-141-2/+2
| | | | | | | This file generates code for the X server and it still uses the __GLXcontext structure name. Signed-off-by: Dave Airlie <[email protected]>
* ir_to_mesa: do not check the number of uniforms against hw limitsMarek Olšák2011-03-141-5/+3
| | | | | | | | | | | | | | | | | | | | | The r300 compiler can eliminate unused uniforms and remap uniform locations if their number surpasses hardware limits, so the limit is actually NumParameters + NumUnusedParameters. This is important for some apps under Wine to run. Wine sometimes declares a uniform array of 256 vec4's and some Wine-specific constants on top of that, so in total there is more uniforms than r300 can handle. This was the main motivation for implementing the elimination of unused constants. We should allow drivers to implement fail & recovery paths where it makes sense, so giving up too early especially when comes to uniforms is not so good idea, though I agree there should be some hard limit for all drivers. This patch fixes: - glsl-fs-uniform-array-5 - glsl-vs-large-uniform-array on drivers which can eliminate unused uniforms.
* gallivm: Fix build with llvm 2.6 on 32bit platformsJosé Fonseca2011-03-131-2/+4
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* gallivm: Use LLVM MC disassembler, instead of udis86.José Fonseca2011-03-137-227/+369
| | | | | Included in LLVM 2.7+. Unlink udis86, should support all instructions that LLVM can emit.
* util: Silence gcc unitialized member warningJosé Fonseca2011-03-131-0/+1
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* draw: Fix draw_variant_output::format's type.José Fonseca2011-03-132-3/+4
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* nv50,nvc0: don't assert on cso with 0 vertex elementsChristoph Bumiller2011-03-133-6/+2
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* rbug: Use the call mutexJakob Bornecrantz2011-03-131-19/+187
| | | | Fixes crashes in [soft|llvm]pipe when replacing shaders
* r600g: Only update DB_SHADER_CONTROL once in r600_pipe_shader_ps().Mathias Fröhlich2011-03-131-16/+13
| | | | | | | | | Avoid setting the same gpu register several times in a r600_pipe_state. Compute the final value of the register and set that one time. This avoids some overhead in r600_context_pipe_state_set(). Signed-off-by: Mathias Fröhlich <[email protected]> Signed-off-by: Henri Verbeet <[email protected]>
* tgsi: Fix parsing of properties with digits in the nameJakob Bornecrantz2011-03-131-1/+1
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* rbug: Skip drawing on disabled shadersJakob Bornecrantz2011-03-131-1/+4
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* rbug: Remove flags from flushJakob Bornecrantz2011-03-132-6/+0
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* i915g: Lie more so we get GLSLJakob Bornecrantz2011-03-131-2/+3
| | | | Lots of piglit tests are lazy and wants GLSL
* i915g: Point sprite cap could be supportedJakob Bornecrantz2011-03-131-1/+2
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* i915g: Sort cap listJakob Bornecrantz2011-03-131-1/+1
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* nvc0: support edge flagsChristoph Bumiller2011-03-134-14/+88
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* nvc0: fix POLYGON_MODE_BACK macro copy/paste errorChristoph Bumiller2011-03-131-1/+1
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* nv50,nvc0: fix pipe context switchChristoph Bumiller2011-03-132-10/+64
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* nv50,nvc0: clean up flushesChristoph Bumiller2011-03-135-38/+28
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* nv50,nvc0: add some missing resource referencingChristoph Bumiller2011-03-134-7/+64
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* nvc0: mask out centroid bit for writing FP headerChristoph Bumiller2011-03-131-1/+1
| | | | It's only 2 bit per input, centroid is set in the instruction.
* nvc0: identify VERTEX_QUARANTINEChristoph Bumiller2011-03-133-8/+17
| | | | | | | | Well, not sure what exactly it is, but it certainly doesn't contain the control flow stack, but vertex data. Not sure about size, I've only seen the first few KiB written, but the binary driver seems to allocate more.
* nvc0: don't enable early-z if alpha test is enabledChristoph Bumiller2011-03-134-12/+20
| | | | | | Depth values are also written before the shader is executed, so if early tests are enabled, fragments that failed the alpha test were modifying the depth buffer, but they shouldn't.
* nvc0: move sprite coord replace state into csoChristoph Bumiller2011-03-132-27/+8
| | | | It's not dependent on any other state anymore now.
* nvc0: s/nblocksx/nblocksy for height in resource_copy_regionChristoph Bumiller2011-03-131-1/+1
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* nvc0: fix unitialized variable in TGSI sysval decl processingChristoph Bumiller2011-03-131-0/+1
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* nvc0: update/fix supported instruction src modifiersChristoph Bumiller2011-03-135-20/+31
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