summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Expand)AuthorAgeFilesLines
* ilo: update 3DSTATE_CONSTANT_x for Gen8Chia-I Wu2015-02-121-3/+16
* ilo: update 3DSTATE_URB_x for Gen8Chia-I Wu2015-02-121-1/+8
* ilo: update 3DSTATE_PUSH_CONSTANT_ALLOC_x for Gen8Chia-I Wu2015-02-121-7/+8
* ilo: update render engine common helpers for Gen8Chia-I Wu2015-02-124-34/+91
* ilo: update BLT helpers for Gen8Chia-I Wu2015-02-121-25/+58
* ilo: update MI helpers for Gen8Chia-I Wu2015-02-122-30/+59
* ilo: add functions for Gen8 relocsChia-I Wu2015-02-121-6/+39
* ilo: update the toy compiler for Gen8Chia-I Wu2015-02-125-91/+501
* ilo: update genhw headersChia-I Wu2015-02-1219-529/+1704
* ilo: clean up ilo_gpe_init_dsa()Chia-I Wu2015-02-121-54/+82
* ilo: clean up ilo_gpe_init_blend()Chia-I Wu2015-02-123-87/+106
* ilo: clean up sample patternsChia-I Wu2015-02-125-68/+71
* glsl: Optimize (f2i(trunc x)) into (f2i x).Matt Turner2015-02-111-0/+9
* glsl: Optimize round-half-up pattern.Matt Turner2015-02-111-0/+33
* glsl: Add trunc() to ir_builder.Matt Turner2015-02-112-0/+6
* i965: Add LINTERP/CINTERP to can_do_cmod().Matt Turner2015-02-111-0/+2
* program: Remove _mesa_nop_vertex_program/_mesa_nop_fragment_program.Matt Turner2015-02-112-97/+0
* nir: Recognize open-coded fmin/fmax.Matt Turner2015-02-111-0/+2
* nir: Add algebraic opt for int comparisons with identical operands.Eric Anholt2015-02-111-0/+9
* nir: Fix load_const comparisons for CSE.Eric Anholt2015-02-111-1/+1
* i965/fs: Remove conditional mod when optimizing a SEL into a MOV.Matt Turner2015-02-111-0/+1
* darwin: build fixJeremy Huddleston Sequoia2015-02-101-0/+5
* darwin: build fixJeremy Huddleston Sequoia2015-02-101-0/+1
* glsl: Optimize 1/exp(x) into exp(-x).Matt Turner2015-02-101-0/+6
* nir: Remove casts from void*.Matt Turner2015-02-104-14/+13
* nir: Replace assert(0) with unreachable().Matt Turner2015-02-101-7/+7
* nir: Remove unused has_indirect variable.Matt Turner2015-02-101-4/+0
* i965/vec4: Emit MADs from (x + abs(y * z)).Matt Turner2015-02-101-3/+15
* i965/vec4: Emit MADs from (x + -(y * z)).Matt Turner2015-02-101-0/+12
* i965/skl: Implement WaDisable1DDepthStencilNeil Roberts2015-02-101-0/+12
* i965/gen7-8: Implement glMemoryBarrier().Francisco Jerez2015-02-102-0/+41
* i965: Generalize the update_null_renderbuffer_surface vtbl hook to non-render...Francisco Jerez2015-02-104-56/+55
* i965: Allocate binding table space for shader images.Francisco Jerez2015-02-102-0/+12
* i965: Don't tile 1D miptrees.Francisco Jerez2015-02-101-0/+7
* i965/vec4: Don't set any dependency control bits for F32TO16 on Gen8.Francisco Jerez2015-02-101-0/+5
* i965: Handle negated unsigned immediate values in constant propagation.Francisco Jerez2015-02-103-19/+19
* i965/vec4: Take into account non-zero reg_offset during register allocation.Francisco Jerez2015-02-101-1/+3
* i965/vec4: Add register classes up to MAX_VGRF_SIZE.Francisco Jerez2015-02-103-7/+9
* i965/vec4: Init mlen for several send from GRF instructions.Francisco Jerez2015-02-103-5/+11
* i965/vec4: Don't infer MRF dependencies for send from GRF instructions.Francisco Jerez2015-02-101-14/+18
* i965/vec4: Fix the scheduler to take into account reads and writes of multipl...Francisco Jerez2015-02-103-5/+29
* i965/vec4: Make vec4_visitor::implied_mrf_writes() return zero for sends from...Francisco Jerez2015-02-101-1/+1
* i965/vec4: Pass dst register to the vec4_instruction constructor.Francisco Jerez2015-02-101-7/+5
* i965/vec4: Initialize vec4_instruction::predicate and ::predicate_inverse.Francisco Jerez2015-02-101-0/+2
* i965/vec4: Implement equals() method for dst_reg too.Francisco Jerez2015-02-102-0/+18
* i965/fs: Fix fs_inst::regs_written calculation for instructions with scalar dst.Francisco Jerez2015-02-101-1/+2
* i965/fs: Fix stack allocation of fs_inst and stop stealing src array provided...Francisco Jerez2015-02-102-37/+39
* i965/fs: Remove duplicate include of brw_shader.hFrancisco Jerez2015-02-101-1/+0
* i965: Move up fs_inst::flag_subreg to backend_instruction.Francisco Jerez2015-02-105-7/+16
* i965: Move up fs_inst::regs_written to backend_instruction.Francisco Jerez2015-02-103-1/+2