Commit message (Collapse) | Author | Age | Files | Lines | |
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* | intel/compiler: Fix src0/desc setter ordering | Kenneth Graunke | 2019-08-27 | 1 | -2/+2 |
| | | | | | | | | | | | | | | src0 vstride and type overlap with bits of the extended descriptor. brw_set_desc() also sets the extended descriptor to 0. So by setting the descriptor, then setting src0, we were accidentally setting a bunch of extended descriptor bits unintentionally. When using this infrastructure for framebuffer writes (in a future patch), this ended up setting the extended descriptor bit 20, which is "Null Render Target" on Icelake, causing nothing to be written to the framebuffer. Reviewed-by: Jason Ekstrand <[email protected]> | ||||
* | radeonsi: fix scratch buffer WAVESIZE setting leading to corruption | Marek Olšák | 2019-08-27 | 3 | -31/+39 |
| | | | | | Cc: 19.2 19.1 <[email protected]> Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi: unbind blend/DSA/rasterizer state correctly in delete functions | Marek Olšák | 2019-08-27 | 1 | -1/+9 |
| | | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111414 Fixes: b758eed9c37 ("radeonsi: make sure that blend state != NULL and remove all NULL checking") Cc: 19.2 <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi: align scratch and ring buffer allocations for faster memory access | Marek Olšák | 2019-08-27 | 3 | -7/+11 |
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi: consolidate determining VGPR_COMP_CNT for API VS | Marek Olšák | 2019-08-27 | 1 | -44/+32 |
| | | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: set PA_CL_VS_OUT_CNTL with CONTEXT_REG_RMW to fix edge flags | Marek Olšák | 2019-08-27 | 5 | -18/+59 |
| | | | | | | | | | | We need two different values of the register, one for NGG and one for legacy, in order to fix edge flags for the legacy pipeline. Passing the ngg flag to emit_clip_regs would be too complicated, so CONTEXT_REG_RMW is used for partial register updates. Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: remove incorrect ngg/pos_writes_edgeflag variables | Marek Olšák | 2019-08-27 | 4 | -21/+14 |
| | | | | | | It varies depending on si_shader_key::as_ngg. Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi: add PKT3_CONTEXT_REG_RMW | Marek Olšák | 2019-08-27 | 2 | -0/+31 |
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | winsys/amdgpu+radeon: process AMD_DEBUG in addition to R600_DEBUG | Marek Olšák | 2019-08-27 | 2 | -4/+8 |
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: add AMD_DEBUG=nongg | Marek Olšák | 2019-08-27 | 2 | -1/+4 |
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: finish up Navi14, add PCI ID | Marek Olšák | 2019-08-27 | 1 | -1/+2 |
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: always use the legacy pipeline for streamout | Marek Olšák | 2019-08-27 | 1 | -1/+1 |
| | | | | | | The best way to prevent GDS hangs is not to use GDS. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: don't initialize VGT_INSTANCE_STEP_RATE_0 | Marek Olšák | 2019-08-27 | 1 | -1/+2 |
| | | | | | | Only gfx9 and older use it to get InstanceID in VGPR1. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: fix InstanceID for legacy VS+GS | Marek Olšák | 2019-08-27 | 1 | -4/+9 |
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: add as_ngg variant for VS as ES to select Wave32/64 | Marek Olšák | 2019-08-27 | 3 | -13/+12 |
| | | | | | | Legacy GS only works with Wave64. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: create the GS copy shader if using legacy streamout | Marek Olšák | 2019-08-27 | 1 | -1/+3 |
| | | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: fix the PRIMITIVES_GENERATED query if using legacy streamout | Marek Olšák | 2019-08-27 | 3 | -4/+9 |
| | | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: fix tessellation for the legacy pipeline | Marek Olšák | 2019-08-27 | 1 | -0/+10 |
| | | | | | | ported from PAL Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi: move some global shader cache flags to per-binary flags | Marek Olšák | 2019-08-27 | 4 | -20/+23 |
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | radeonsi/gfx10: fix the legacy pipeline by storing as_ngg in the shader cache | Marek Olšák | 2019-08-27 | 3 | -8/+9 |
| | | | | | | It could load an NGG shader when we want a legacy shader and vice versa. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> | ||||
* | iris: Delete dead prototype | Kenneth Graunke | 2019-08-27 | 1 | -2/+0 |
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* | Revert "panfrost: Free all block/instruction objects before leaving ↵ | Boris Brezillon | 2019-08-27 | 2 | -15/+0 |
| | | | | | | | | | | midgard_compile_shader_nir()" This reverts commit 5882e0def97a47aff050f5a3f412b97a7f440e27. This commit causes a segfault. Signed-off-by: Boris Brezillon <[email protected]> | ||||
* | panfrost: Make sure bundle.instructions[] contains valid instructions | Boris Brezillon | 2019-08-27 | 1 | -0/+1 |
| | | | | | | | | Add an assert() in schedule_bundle() to make sure all instruction pointers in bundle.instructions[] are valid. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> | ||||
* | panfrost: Free all block/instruction objects before leaving ↵ | Boris Brezillon | 2019-08-27 | 2 | -0/+15 |
| | | | | | | | | | | | midgard_compile_shader_nir() Right now we're leaking all block and instruction objects allocated by the compiler. Let's clean things up before leaving midgard_compile_shader_nir(). Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> | ||||
* | panfrost: Free the instruction object in mir_remove_instruction() | Boris Brezillon | 2019-08-27 | 1 | -0/+1 |
| | | | | | | | To avoid memory leaks. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> | ||||
* | radv: make use of has_ls_vgpr_init_bug | Samuel Pitoiset | 2019-08-27 | 3 | -2/+3 |
| | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> | ||||
* | ac: add has_ls_vgpr_init_bug to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 6 | -5/+6 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: add has_msaa_sample_loc_bug to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 5 | -7/+8 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: add rbplus_allowed to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 10 | -32/+17 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: add has_tc_compat_zrange_bug to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 6 | -6/+7 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: add has_gfx9_scissor_bug to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 10 | -16/+13 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: add cpdma_prefetch_writes_memory to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 9 | -8/+6 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: add has_out_of_order_rast to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 6 | -8/+7 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: add has_load_ctx_reg_pkt to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 5 | -10/+8 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: add has_rbplus to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 8 | -9/+8 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: add has_dcc_constant_encode to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 9 | -14/+8 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: add has_distributed_tess to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 9 | -14/+9 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: add has_clear_state to ac_gpu_info | Samuel Pitoiset | 2019-08-27 | 9 | -25/+20 |
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | ac: drop llvm8 from some load/store helpers | Samuel Pitoiset | 2019-08-27 | 1 | -115/+75 |
| | | | | | | | | Cleanup. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> | ||||
* | gallivm: fix appveyor build after images changes | Dave Airlie | 2019-08-27 | 1 | -1/+2 |
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* | llvmpipe: enable ARB_shader_image_load_store | Dave Airlie | 2019-08-27 | 1 | -1/+2 |
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> | ||||
* | llvmpipe: flush on api memorybarrier. | Dave Airlie | 2019-08-27 | 1 | -0/+9 |
| | | | | | | Until we have somewhere we can do better, just hit it with a hammer. Reviewed-by: Roland Scheidegger <[email protected]> | ||||
* | gallivm: add memory barrier support | Dave Airlie | 2019-08-27 | 1 | -0/+11 |
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> | ||||
* | gallivm: add support for fences api on older llvm | Dave Airlie | 2019-08-27 | 2 | -0/+16 |
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> | ||||
* | llvmpipe: bind vertex/geometry shader images | Dave Airlie | 2019-08-27 | 3 | -0/+126 |
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> | ||||
* | llvmpipe: add fragment shader image support | Dave Airlie | 2019-08-27 | 11 | -8/+334 |
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> | ||||
* | draw: add vs/gs images support | Dave Airlie | 2019-08-27 | 8 | -7/+316 |
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> | ||||
* | gallivm: add image load/store/atomic support | Dave Airlie | 2019-08-27 | 7 | -10/+684 |
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> | ||||
* | gallivm/tgsi: add image interface to tgsi builder | Dave Airlie | 2019-08-27 | 2 | -1/+20 |
| | | | | | | | This adds the callbacks for the driver/gallium binding for image operations. Reviewed-by: Roland Scheidegger <[email protected]> | ||||
* | llvmpipe: introduce image jit type to fragment shader jit. | Dave Airlie | 2019-08-27 | 2 | -2/+67 |
| | | | | | | This adds the image type to the fragment shader jit context Reviewed-by: Roland Scheidegger <[email protected]> |