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* gallium/docs: document behavior of set_sample_mask()Brian Paul2017-12-131-1/+4
| | | | | | | | The sample mask is used even if msaa is not explicity enabled when we have a framebuffer with multisampled surfaces. That's DX behavior and what the Radeon drivers do. Not sure about other drivers at this point. Reviewed-by: Roland Scheidegger <[email protected]>
* glsl: trivial whitespace fixes in link_varyings.cppBrian Paul2017-12-131-2/+2
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* program: Don't reset SamplersValidated when restoring from shader cacheJordan Justen2017-12-131-7/+9
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103988 Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: remove second include of errors.h in src/mesa/main/glspirv.cKai Wasserbäch2017-12-121-4/+0
| | | | | | Fixes: 5bc03d2508 ("mesa: implement SPIR-V loading in glShaderBinary") Signed-off-by: Kai Wasserbäch <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* radeonsi: create get_tcs_tes_buffer_address helperTimothy Arceri2017-12-131-12/+32
| | | | | | This will be shared between the NIR and TGSI backends. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: fix nir_op_f2f64Timothy Arceri2017-12-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | Without this we get the error "FPExt only operates on FP" when converting the following: vec1 32 ssa_5 = b2f ssa_4 vec1 64 ssa_6 = f2f64 ssa_5 Which results in: %44 = and i32 %43, 1065353216 %45 = fpext i32 %44 to double With this patch we now get: %44 = and i32 %43, 1065353216 %45 = bitcast i32 %44 to float %46 = fpext float %45 to double Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir: fix shift for uint64_tTimothy Arceri2017-12-131-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* st/glsl_to_nir: skip forced array splitting for tcsTimothy Arceri2017-12-131-1/+2
| | | | | | | | | nir_lower_io_to_temporaries() does not support tcs so we cannot assume there are no indirects here. Also the radeonsi backend (the only backend to support tess) has support for tcs indirects so there is no need to lower them anyway. Reviewed-by: Nicolai Hähnle <[email protected]>
* intel/fs/bank_conflicts: Don't touch Gen7 MRF hack registers.Francisco Jerez2017-12-123-7/+19
| | | | | | | Fixes: af2c320190f3c731 "intel/fs: Implement GRF bank conflict mitigation pass." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104199 Reported-by: Darius Spitznagel <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: compute scratch space size correctly for Gen9+Kevin Rogovin2017-12-121-1/+5
| | | | | | | | Fixes: 8ecdbb61360 "i965: Pretend there are 4 subslices for compute shader threads on Gen9+." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104005 Signed-off-by: Kevin Rogovin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Eero Tamminen <[email protected]>
* i965: Program MEDIA_VFE_STATE in a more readable fashion.Kevin Rogovin2017-12-121-6/+13
| | | | | | | | This patch is purely for readability improvements when programming the MEDIA_VFE_STATE. Signed-off-by: Kevin Rogovin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* cso: add point rasterization sanity check assertionBrian Paul2017-12-121-0/+5
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallium/u_blitter: replace tabs with spacesBrian Paul2017-12-121-18/+18
| | | | Reviewed-by: Marek Olšák <[email protected]>
* xlib: call _mesa_warning() instead of fprintf()Brian Paul2017-12-121-1/+2
| | | | | | | | We use _mesa_warning() everywhere else in this code. Change requested by Rick Irons of Mathworks. CC: <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* gallium/util: don't pass a pipe_resource to util_resource_is_array_texture()Brian Paul2017-12-122-4/+4
| | | | | | | | | No need to pass a pipe_resource when we can just pass the target. This makes the function potentially more usable. Rename it too. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Charmaine Lee <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/aux: include nr_samples in util_resource_size() computationBrian Paul2017-12-121-1/+2
| | | | | | | | | | | | | This function is only used in two places: 1. VMware driver, but only for HUD reporting 2. st/nine state tracker, used for texture memory accounting Fixes: a69efa9482d ("util: add new util_resource_size() function in u_resource.[ch]") Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Charmaine Lee <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* svga: trivial whitespace/formatting fixes in svga_pipe_rasterizer.cBrian Paul2017-12-121-9/+5
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* st/mesa: trivial whitespace/formatting fixes in st_atom_rasterizer.cBrian Paul2017-12-121-20/+22
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* spirv: Handle image and sampler function parametersJason Ekstrand2017-12-121-0/+73
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* spirv/cfg: Refactor the function parameter loop a bitJason Ekstrand2017-12-121-5/+9
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* spirv/cfg: Be a bit more precise about function parametersJason Ekstrand2017-12-121-3/+2
| | | | | | Pointers with no storage type are converted to inout variables but SSA values and pointers with a storage type (which turns into a uint or uvec2) are just input variables.
* spirv: Make sampled images a real typeJason Ekstrand2017-12-122-1/+11
| | | | | | | Previously, we just gave them exactly the same type as the respective image (which already had a sampler2D or similar type). Now they have their own base type and a pointer to the vtn_type for the image. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* i915: add missing 0 definesEric Engestrom2017-12-121-0/+2
| | | | | | | | | | | Thanks to Emil's -Wundef, t_dd_dmatmp.h now complains that intel_render.c is missing a couple `#define`s. Assigning them to 0 keeps the existing behaviour; I'll let someone else turn them on if this is the behaviour that was intended. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: refuse to compile SPIR-V shaders or link mixed shadersNicolai Hähnle2017-12-122-1/+28
| | | | | | | | | | | | Note that gl_shader::CompileStatus will also indicate whether a shader has been successfully specialized. v2: Use the 'spirv_data' member of gl_shader to know if it is a SPIR-V shader, instead of a dedicated flag. (Timothy Arceri) v3: Use bool instead of GLboolean. (Ian Romanick) Reviewed-by: Ian Romanick <[email protected]>
* mesa/shaderapi: add a getter for GL_SPIR_V_BINARY_ARBNicolai Hähnle2017-12-121-0/+3
| | | | | | | v2: Use the 'spirv_data' member of gl_shader instead of a dedicated flag. (Timothy Arceri) Reviewed-by: Ian Romanick <[email protected]>
* mesa: implement SPIR-V loading in glShaderBinaryNicolai Hähnle2017-12-125-3/+97
| | | | | | | | | | | | | | | | | | v2: * Add a gl_shader_spirv_data member to gl_shader, which already encapsulates a gl_spirv_module where the binary will be saved. (Eduardo Lima) * Just use the 'spirv_data' member to know whether a gl_shader has the SPIR_V_BINARY_ARB state. (Timothy Arceri) * Remove redundant argument checks. Move extension presence check to API entry point where the rest of checks are. Retype 'n' and 'length'arguments to use the correct and more standard types. (Ian Romanick) * Fix some nitpicks. (Ian Romanick) Reviewed-by: Ian Romanick <[email protected]>
* mesa/glspirv: Add struct gl_shader_spirv_dataEduardo Lima Mitev2017-12-122-0/+42
| | | | | | | | | | | | | | | | | This is a per-shader structure holding the SPIR-V data associated with the shader (binary module, specialization constants and entry-point). This is needed because both gl_shader and gl_linked_shader need to share this data. Instead of copying the data, we pass a reference to it upon program linking. That's why it is reference-counted. This struct is created and associated with the shader upon calling glShaderBinary(), then subsequently filled up by the call to glSpecializeShaderARB(). v2: Readability improvements (Ian Romanick) Reviewed-by: Ian Romanick <[email protected]>
* mesa/glspirv: Add struct gl_spirv_moduleNicolai Hähnle2017-12-122-0/+33
| | | | | | | | | v2: * Make the SPIR-V module struct part of a larger gl_shader_spirv_data struct that will be introduced later, and don't reference it directly in gl_shader. (Eduardo Lima) * Readability improvements (Ian Romanick) Reviewed-by: Ian Romanick <[email protected]>
* mesa: add GL_ARB_gl_spirv boilerplateNicolai Hähnle2017-12-1213-0/+138
| | | | | | | | | | | | v2: * Add meson build bits (Eric Engestrom) * Return INVALID_OPERATION error on SpecializeShaderARB (Ian Romanick) v3: Include boilerplate for the GL 4.6 alias of glSpecializeShaderARB (Neil Roberts) Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* spirv: Add support for all bit sizes in OpSwitchJason Ekstrand2017-12-111-8/+26
| | | | | Reviewed-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101560
* spirv: Restructure the case loop in OpSwitch handlingJason Ekstrand2017-12-111-3/+11
| | | | | | | | | Instead of calling vtn_add_case for the default case and then looping, add an is_default variable and do everything inside the loop. This will make the next commit easier. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* spirv: Add better parameter validation for vector and matrix typesJason Ekstrand2017-12-111-3/+13
| | | | | Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* spirv: Add type validation for OpSelectJason Ekstrand2017-12-111-0/+32
| | | | | Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* spirv: Add basic type validation for OpLoad, OpStore, and OpCopyMemoryJason Ekstrand2017-12-111-4/+14
| | | | Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* spirv: Add a prepass to set types on vtn_valuesJason Ekstrand2017-12-116-3/+149
| | | | | | | | This autogenerated pass will automatically find and set the type field on all vtn_values. This way we always have the type and can use it for validation and other checks. Reviewed-by: Ian Romanick <[email protected]>
* spirv: Add a vtn_type field to all vtn_valuesJason Ekstrand2017-12-112-42/+31
| | | | | | | | | At the moment, this just lets us drop the const_type for constants and unify things a bit. Eventually, we will use this to store the types of all SPIR-V SSA values. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* anv: fix bug when using component qualifier in FS outputsSamuel Iglesias Gonsálvez2017-12-121-19/+44
| | | | | | | | | | | | | | | | | | | | | | | We can write to the same output but in different components, like in this example: layout(location = 0, component = 0) out ivec2 dEQP_FragColor_0; layout(location = 0, component = 2) out ivec2 dEQP_FragColor_1; Therefore, they are not two different outputs but only one. Fixes: dEQP-VK.glsl.440.linkage.varying.component.frag_out.* v3: - Remove FRAG_RESULT_MAX. - Add const and use sizeof (Ian). - Do three-pass to set properly the locations of fragment outputs when having arrays (Jason). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* st/mesa: swizzle argument when there's a vector size mismatchIlia Mirkin2017-12-111-1/+24
| | | | | | | | | | GLSL IR operation arguments can sometimes have an implicit swizzle as a result of a vector arg and a scalar arg, where the scalar argument is implicitly expanded to the size of the vector argument. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103955 Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallivm: fix texture wrapping for texture gather for mirror modesRoland Scheidegger2017-12-121-74/+171
| | | | | | | | | | | | | | | | | | | Care must be taken that all coords end up correct, the tests are very sensitive that everything is correctly rounded. This doesn't matter for bilinear filter (since picking a wrong texel with weight zero is ok), and we could also switch the per-sample coords mistakenly. While here, also optimize the coord_mirror helper a bit (we can do the mirroring directly by exploiting float rounding, no need for fixing up odd/even manually). I did not touch the mirror_clamp and mirror_clamp_to_border modes. In contrast to mirror_clamp_to_edge and mirror_repeat these are legacy modes. They are specified against old gl rules, which actually does the mirroring not per sample (so you get swapped order if the coord is in the mirrored section). I think the idea though is that they should follow the respecified mirror_clamp_to_edge rules so the order would be correct. Reviewed-by: Jose Fonseca <[email protected]>
* spirv: Allow ignoring decorations for workgroup variablesJason Ekstrand2017-12-111-1/+3
| | | | | | | | | | Since we switched over to lowering SLM access directly in SPIR-V -> NIR, we no longer have vtn_variables for SLM. It's all safe as with UBOs and SSBOs but we need to let it through in the assert. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104213 Fixes: 8761a04d0d9332d9c0c99164faf855fc3c741f7c Reviewed-by: Jordan Justen <[email protected]>
* spirv: Set lengths on scalar and vector typesJason Ekstrand2017-12-111-0/+4
| | | | Reviewed-by: Ian Romanick <[email protected]>
* ac/nir: Support vulkan_resource_reindex.Bas Nieuwenhuizen2017-12-121-0/+14
| | | | | Fixes: 93b4cb61eb2 "spirv: Allow OpPtrAccessChain for block indices" Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Don't load the descriptor in vulkan_resource_index.Bas Nieuwenhuizen2017-12-121-5/+13
| | | | | | | | | | | To support the reindex intrinsic, we need the result to be something on which we can adjust the index/address. Since it is all within a basic block, the compiler should be able to merge any extra loads. v2: Change visit_get_buffer_size too. Reviewed-by: Dave Airlie <[email protected]>
* winsys/amdgpu: disable local BOs again due to worse performanceMarek Olšák2017-12-111-2/+3
| | | | | Cc: 17.3 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* drirc: whitelist glthread for Mount and Blade Warband againMarek Olšák2017-12-111-0/+3
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* radv: Don't use local BOs when allocating with export options.Bas Nieuwenhuizen2017-12-101-1/+3
| | | | | | | | | If the app does not plan to put a buffer or image in it (why? But it is allowed and CTS does it), they do not need to allocate it with the deciate allocation struct. Fixes: a639d40f133 "radv: add support for local bos. (v3)" Reviewed-by: Dave Airlie <[email protected]>
* spirv: Fix loading an entire block at once.Bas Nieuwenhuizen2017-12-101-30/+33
| | | | | | | | | There is no chain, so checking the length ends with a SEGFAULT. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103579 Cc: <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Enable UBO pushingJason Ekstrand2017-12-082-0/+7
| | | | | | | | | | | | | Push constants on Intel hardware are significantly more performant than pull constants. Since most Vulkan applications don't actively use push constants on Vulkan or at least don't use it heavily, we're pulling way more than we should be. By enabling pushing chunks of UBOs we can get rid of a lot of those pulls. On my SKL GT4e, this improves the performance of Dota 2 and Talos by around 2.5% and improves Aztec Ruins by around 2%. Reviewed-by: Jordan Justen <[email protected]>
* i965/fs: Handle !supports_pull_constants and push UBOs properlyJason Ekstrand2017-12-081-1/+1
| | | | | | In Vulkan, we don't support classic pull constants and everything the client asks us to push, we push. However, for pushed UBOs, we still want to fall back to conventional pulls if we run out of space.
* anv/device: Increase the UBO alignment requirement to 32Jason Ekstrand2017-12-081-2/+10
| | | | | | | | Push constants work in terms of 32-byte chunks so if we want to be able to push UBOs, every thing needs to be 32-byte aligned. Currently, we only require 16-byte which is too small. Reviewed-by: Jordan Justen <[email protected]>
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