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* nv30: plug some memory leaks on screen destroy and shader compileIlia Mirkin2014-06-192-0/+7
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* nv50: organize screen capsIlia Mirkin2014-06-191-67/+57
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: organize screen capsIlia Mirkin2014-06-191-61/+51
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: remove vport_int hack and instead use the usual state validationIlia Mirkin2014-06-193-11/+3
| | | | | | | | Commit ad4dc772 fixed an issue with the viewport not being restored correctly. However it's rather hackish and confusing. Instead just mark the viewport dirty and let the viewport validation take care of it. Signed-off-by: Ilia Mirkin <[email protected]>
* r300g: don't advertize PIPE_FORMAT_B10G10R10X2_UNORM on < r500David Heidelberger2014-06-191-0/+1
| | | | | Signed-off-by: David Heidelberger <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: implement ARB_texture_query_lodMarek Olšák2014-06-192-25/+40
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: pass ARB_conservative_depth parameters to the hardwareMarek Olšák2014-06-194-1/+29
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium: implement ARB_texture_query_levelsMarek Olšák2014-06-195-9/+28
| | | | | | | | | The extension is always supported if GLSL 1.30 is supported. Softpipe and llvmpipe support is also added (trivial). Radeon and nouveau support is already done. Reviewed-by: Roland Scheidegger <[email protected]>
* st/mesa: set sampler_view::last_level correctlyMarek Olšák2014-06-192-6/+12
| | | | | | | | | It was set to pipe_resource::last_level and _MaxLevel was embedded in max_lod, that's why it worked for ordinary texturing. However, min_lod doesn't have any effect on texelFetch and textureQueryLevels, so we must still set last_level correctly. Reviewed-by: Roland Scheidegger <[email protected]>
* st/mesa: handle array textures in st_texture_image_copyDave Airlie2014-06-191-0/+8
| | | | | | | Marek: also handle cube arrays Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi: cosmetic changes in si_shader.cMarek Olšák2014-06-191-18/+13
| | | | reviewed by Michel Dänzer
* radeonsi: implement ARB_texture_gather and Gather functions from GLSL 4.00Marek Olšák2014-06-192-12/+123
| | | | | | All ARB_texture_gather and gather-related ARB_gpu_shader5 piglit tests pass. reviewed by Michel Dänzer
* st/mesa: fix geometry shader max texture limit in state validationMarek Olšák2014-06-191-1/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* r600g: fix the max vertex shader input limitMarek Olšák2014-06-191-1/+1
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* meta: Respect the driver's maximum number of draw buffersIan Romanick2014-06-181-2/+2
| | | | | | | | | | | | | | | Commit c1c1cf5f9 added infrastructure for saving and restoring draw buffer state. However, it universially used MAX_DRAW_BUFFERS, but many drivers support far fewer than that at limit. For example, the radeon and i915 drivers only support 1. Using MAX_DRAW_BUFFERS causes meta to generate GL errors. Signed-off-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80115 Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Kenneth Graunke <[email protected]> [on Broadwell] Tested-by: [email protected] Cc: "10.2" <[email protected]>
* gallivm: fix SCALED -> NORM conversionsRoland Scheidegger2014-06-181-16/+23
| | | | | | | | | | | | | | | Such conversions (which are most likely rather pointless in practice) were resulting in shifts with negative shift counts and shifts with counts the same as the bit width. This was always undefined in llvm, the code generated was rather horrendous but happened to work. So make sure such shifts are filtered out and replaced with something that works (the generated code is still just as horrendous as before). This fixes lp_test_format, https://bugs.freedesktop.org/show_bug.cgi?id=73846. v2: prettify by using build context shift helpers. Reviewed-by: Jose Fonseca <[email protected]>
* mesa: Remove glClear optimization based on drawable sizeKristian Høgsberg2014-06-181-5/+0
| | | | | | | | | | | | | | | A drawable size of 0x0 means that we don't have buffers for a drawable yet, not that we have a zero-sized buffer. Core mesa shouldn't be optimizing out drawing based on buffer size, since the draw call could be what triggers the driver to go and get buffers. As discussed in the referenced bug report, the optimization was added as part of a scatter-shot attempt to fix a different problem. There's no other example in mesa core of using the buffer size in this way. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74005 Cc: "10.1 10.2" <[email protected]> Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: In emit_texenv() type mismatch was forced with typecastJuha-Pekka Heikkila2014-06-181-8/+9
| | | | | | | | Type mismatch caused random memory to be copied when casted memory area was smaller than expected type. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* radeon/uvd: disable VC-1 simple/main on UVD 2.xGrigori Goronzy2014-06-181-1/+4
| | | | | | | | | It's about as broken as on later UVD revisions. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66452 Cc: "10.1 10.2" <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: add sampling of 4:2:2 subsampled texturesGrigori Goronzy2014-06-183-40/+71
| | | | | | This makes 4:2:2 video surfaces work in VDPAU. Reviewed-by: Marek Olšák <[email protected]>
* util/u_format: move utility function from r600gGrigori Goronzy2014-06-183-11/+15
| | | | | We need this for radeonsi, and it might be useful for other drivers, too.
* radeon/vce: set number of cpbs based on levelLeo Liu2014-06-182-5/+61
| | | | | | | v2: add error check for cpb size 0 Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vce: implement h264 level supportLeo Liu2014-06-181-1/+1
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* st/omx/enc: implement h264 level supportLeo Liu2014-06-181-0/+39
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl: add level interfaceLeo Liu2014-06-181-0/+1
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* st/st/omx: fix switch-case indentation in vid_enc.cLeo Liu2014-06-181-16/+16
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* glx: Add an error message when a direct renderer's createScreen() routine failsJon TURNEY2014-06-184-4/+12
| | | | | | | | | | | | | | | because no matching fbConfigs or visuals could be found. Nearly all the error cases in *createScreen() issue an error message to diagnose the failure to initialize before branching to handle_error. The few remaining error cases which don't should probably do the same. (At the moment, it seems this can be triggered in drisw with an X server which reports definite values for MAX_PBUFFFER_(WIDTH|HEIGHT|SIZE), because those attributes are checked for an exact match against 0.) Signed-off-by: Jon TURNEY <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: unit test for copy propagation and writemaskChia-I Wu2014-06-181-0/+30
| | | | | | | | This unit test demonstrates a subtle bug fixed by 4ddf51db6af36736d5d42c1043eeea86e47459ce. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4/gs: Silence warning about unused 'success' in release build.Matt Turner2014-06-171-0/+1
| | | | | Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/disasm: Mark three_source_reg_encoding[] static.Matt Turner2014-06-171-1/+1
| | | | | Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/blorp: Remove unused 'brw' member.Matt Turner2014-06-171-2/+0
| | | | | Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/blorp: Mark branch unreachable to silence uninitialized var warning.Matt Turner2014-06-171-0/+1
| | | | | Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Silence warning about unused brw in release builds.Matt Turner2014-06-171-2/+1
| | | | | Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Mark backend_instruction and bblock_t as structs.Matt Turner2014-06-172-2/+2
| | | | | | | | | They have to be marked as structs for C code elsewhere. bblock_t is already defined as a struct, and all of backend_instruction's fields are public anyway. Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Use standard SSE intrinsics instead of gcc built-ins.Matt Turner2014-06-171-5/+7
| | | | | | | | Let's this file compile with clang. Reviewed-by: Frank Henigman <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Remove unused functions from perfomance query code.Matt Turner2014-06-171-13/+0
| | | | | | | | | Perhaps useful for debugging? Never used otherwise. Added by commit 8cf5bdad. Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Petri Latvala <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Remove unused extra_EXT_texture_integer.Matt Turner2014-06-171-5/+0
| | | | | | | | Unused since commit b6475f94. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Mark default case unreachable to silence warning.Matt Turner2014-06-171-0/+1
| | | | | | | | Warned about 'coord' being undefined in the default case, which is unreachable. Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* egl: Remove unused variable dri_driver_path.Matt Turner2014-06-171-2/+0
| | | | | Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* swrast: Remove unused solve_plane_recip().Matt Turner2014-06-171-14/+0
| | | | | | | Unused since commit 9e8a961d. Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Remove 'struct' from ir_variable declaration.Matt Turner2014-06-171-1/+1
| | | | | Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* Revert "i965: Add 'wait' instruction support"Matt Turner2014-06-173-34/+0
| | | | | | This reverts commit 20be3ff57670529a410b30a1008a71e768d08428. No evidence of ever being used.
* i965/fs: Optimize SEL with the same sources into a MOV.Matt Turner2014-06-171-1/+7
| | | | | | instructions in affected programs: 474 -> 462 (-2.53%) Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Perform CSE on texture operations.Matt Turner2014-06-171-1/+10
| | | | | | | | Helps Unigine Tropics and some (old) gstreamer shaders in shader-db. instructions in affected programs: 792 -> 744 (-6.06%) Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Copy propagate from load_payload.Matt Turner2014-06-171-0/+22
| | | | | But only into non-load_payload instructions. Otherwise we would prevent register coalescing from combining identical payloads.
* i965/fs: Perform CSE on load_payload instructions if it's not a copy.Matt Turner2014-06-171-0/+18
| | | | | | | | | | | | | | Since CSE creates instructions, if we let CSE generate things register coalescing can't remove, bad things will happen. Only let CSE combine non-copy load_payloads. E.g., allow CSE to handle this load_payload vgrf4+0, vgrf5, vgrf6 but not this load_payload vgrf4+0, vgrf5+0, vgrf5+1
* i965/fs: Support register coalescing on LOAD_PAYLOAD operands.Matt Turner2014-06-171-10/+54
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* i965/fs: Emit load_payload instead of multiple MOVs for large VGRFs.Matt Turner2014-06-171-12/+21
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* i965/fs: Only consider real sources when comparing instructions.Matt Turner2014-06-171-4/+15
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* i965/fs: Apply cube map array fixup and restore the payload.Matt Turner2014-06-171-1/+14
| | | | | So that we don't have partial writes to a large VGRF. Will be cleaned up by register coalescing.
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 07:03:32 +0000