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* r600/sfn: re-use an allocated register in lookupGert Wollny2020-05-191-1/+1
* r600/sfn: Skip move instructions if they are only ssa and without modifiersGert Wollny2020-05-192-1/+26
* r600/sfn: rework getting a vector and uniforms from the value poolGert Wollny2020-05-1911-87/+151
* r600/sfn: Handle CF index loading from non-X channelGert Wollny2020-05-193-10/+29
* r600: Add support for loading index register from other than chan XGert Wollny2020-05-192-1/+2
* r600: Lower lerp after tgsi_to_nirGert Wollny2020-05-191-0/+1
* r600: Lower int64 ops from TGSI-to-NIR shaders tooGert Wollny2020-05-191-2/+11
* r600/sfn: Fix printing vertex fetch instruction flagsGert Wollny2020-05-191-1/+1
* r600/sfn: Unify semantic name and index query and use TEXCOORD semanticGert Wollny2020-05-196-20/+43
* Revert "gallium/gallivm: fix compilation issues with llvm 11"Michel Dänzer2020-05-198-20/+13
* Revert "ac,radeonsi: fix compilations issues with LLVM 11"Michel Dänzer2020-05-195-19/+15
* nir: Consider atomic counter intrinsics when setting writes_memoryCaio Marcelo de Oliveira Filho2020-05-181-0/+22
* llvmpipe: add gl_SampleMaskIn support.Dave Airlie2020-05-191-0/+10
* gallivm/nir: add sample_mask_in supportDave Airlie2020-05-193-0/+5
* llvmpipe/fs: hook up the interpolation APIs.Dave Airlie2020-05-191-0/+35
* llvmpipe: add interp instruction supportDave Airlie2020-05-193-0/+235
* llvmpipe/interp: refactor out centroid calculationsDave Airlie2020-05-191-30/+39
* llvmpipe/interp: refactor out use of pixel center offsetDave Airlie2020-05-191-8/+9
* gallivm/nir: add an interpolation interface.Dave Airlie2020-05-194-0/+74
* llvmpipe: remove non-simple interpolation paths.Dave Airlie2020-05-192-353/+25
* llvmpipe/interp: fix interpolating frag pos for sample shadingDave Airlie2020-05-191-2/+11
* llvmpipe: use per-sample position not sample id for interpDave Airlie2020-05-191-1/+1
* llvmpipe: don't use sample mask with 0 samplesDave Airlie2020-05-191-8/+0
* r600/sfn: add emit if start cayman supportDave Airlie2020-05-181-2/+2
* r600/sfn: add callstack non-evergreen supportDave Airlie2020-05-181-6/+34
* r600/sfn: cayman fix int trans op2Dave Airlie2020-05-181-9/+29
* r600/sfn: fix cayman float instruction emission.Dave Airlie2020-05-182-4/+23
* r600/sfn: plumb the chip class into the instruction emissionDave Airlie2020-05-1819-34/+59
* anv:gpu_memcpy: Emit 3DSTATE_VF_INDEXING on Gen8+Jason Ekstrand2020-05-181-0/+7
* intel/fs: Use writes_memory from shader_infoCaio Marcelo de Oliveira Filho2020-05-182-25/+3
* nir: Use deref intrinsics to set writes_memory when gathering infoCaio Marcelo de Oliveira Filho2020-05-181-0/+29
* r600: enable TEXCOORD semantic for TGSI.Dave Airlie2020-05-186-34/+35
* iris: Initialise stub iris_seqno to 0Chris Wilson2020-05-181-1/+1
* freedreno/drm: handle ancient kernelsRob Clark2020-05-182-1/+4
* freedreno/drm: don't pass thru 'DUMP' flag on older kernelsRob Clark2020-05-181-1/+2
* freedreno/a3xx: fix rasterizer discardIlia Mirkin2020-05-181-1/+3
* freedreno/fdperf: add dependency on generated headersRob Clark2020-05-181-1/+1
* etnaviv: don't expose timer queriesLucas Stach2020-05-181-3/+1
* freedreno/a3xx: parameterize ubo optimizationIlia Mirkin2020-05-173-11/+27
* freedreno: fix off-by-one in assertions checking for const sizesIlia Mirkin2020-05-174-5/+5
* freedreno/a3xx: fix const footprintIlia Mirkin2020-05-171-2/+2
* freedreno/ir3: avoid applying (sat) on bary.fIlia Mirkin2020-05-171-0/+5
* freedreno/a3xx: reinstate rgb10_a2ui texture formatIlia Mirkin2020-05-171-1/+1
* freedreno/a3xx: there's no r8i/ui rb format, only rg8i/rg8uiIlia Mirkin2020-05-172-6/+6
* radv: use util_float_to_half_rtzChristopher Egert2020-05-171-1/+1
* lima/ppir: optimize tex loads with single successorErico Nunes2020-05-162-2/+18
* lima/ppir: rework tex loweringErico Nunes2020-05-163-63/+66
* lima/ppir: improve handling for successors in other blocksErico Nunes2020-05-163-8/+12
* lima/ppir: handle failures on all ppir_emit_cf_list pathsErico Nunes2020-05-161-3/+7
* util/rand_xor: extend the urandom path to all non-Windows platformsEric Engestrom2020-05-161-2/+4
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