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* radeon: Fill in the TXOFFSET field containing the tile bits in our relocs.Eric Anholt2019-10-202-4/+5
* r100/r200: factor out txformat/txfilter setup from the TFP path.Eric Anholt2019-10-202-22/+10
* lima: fix PP stack sizeVasily Khoruzhick2019-10-191-2/+1
* freedreno/a5xx: enable a510Marijn Suijten2019-10-191-0/+1
* anv: fix vkUpdateDescriptorSets with inline uniform blocksLionel Landwerlin2019-10-191-3/+3
* freedreno/ir3: handle imad24_ir3 case in UBO loweringRob Clark2019-10-181-2/+27
* freedreno/ir3: add imul24 opcodeRob Clark2019-10-181-0/+3
* freedreno/ir3: optimize immed 2nd src to madRob Clark2019-10-181-2/+11
* freedreno/ir3: add rule to generate imad24Rob Clark2019-10-181-0/+5
* nir: add nir_lower_amul passRob Clark2019-10-187-3/+335
* nir: add address calc related opt rulesRob Clark2019-10-181-0/+16
* nir: add amul instructionRob Clark2019-10-187-7/+38
* nir: Add a new ALU nir_op_imul24Rob Clark2019-10-181-0/+3
* freedreno/ir3: Handle newly added opcode nir_op_imad24_ir3Eduardo Lima Mitev2019-10-181-0/+3
* nir: Add a new ALU nir_op_imad24_ir3Eduardo Lima Mitev2019-10-181-0/+7
* freedreno/ir3: rename mul.s/mul.uRob Clark2019-10-185-12/+12
* nir/search: fix the PoT helpersRob Clark2019-10-182-4/+7
* freedreno/ir3: enable pre-fs texture fetch for a6xxRob Clark2019-10-181-0/+6
* turnip: add support for pre-fs texture fetchRob Clark2019-10-181-3/+21
* freedreno/a6xx: add support for pre-fs texture fetchRob Clark2019-10-181-5/+23
* freedreno/ir3: Add support for texture sampling pre-dispatchHyunjun Ko2019-10-181-2/+73
* freedreno/ir3: Add a NIR pass to select tex instructions eligible for pre-fetchEduardo Lima Mitev2019-10-183-0/+199
* freedreno/ir3: force i/j pixel to r0.xRob Clark2019-10-181-0/+22
* freedreno/ir3: add pre-dispatch tex fetch to disasmRob Clark2019-10-181-0/+10
* freedreno/ir3: add dummy bary.f(ei) for pre-fs-fetchRob Clark2019-10-181-0/+19
* freedreno/ir3: fixup register footprint to account for prefetchRob Clark2019-10-181-0/+14
* freedreno/ir3: add meta instruction for pre-fs texture fetchRob Clark2019-10-186-3/+33
* freedreno/ir3: don't DCE ij_pix if used for pre-fs-texture-fetchRob Clark2019-10-183-6/+14
* freedreno/ir3: track sysval slot for inputsRob Clark2019-10-183-0/+12
* freedreno/ir3: remove unused ir3_instruction::inoutRob Clark2019-10-183-5/+0
* freedreno/ir3: Add data structures to support texture pre-fetchHyunjun Ko2019-10-181-0/+37
* freedreno: update registersRob Clark2019-10-183-3/+24
* nir: Add new texop nir_texop_tex_prefetchEduardo Lima Mitev2019-10-183-0/+6
* osmesa: add missing #include <stdint.h>Eric Engestrom2019-10-181-0/+1
* meson: Add support for wrapping llvmDylan Baker2019-10-181-5/+11
* meson/llvmpipe: Add dep_llvm to driver_swrastDylan Baker2019-10-181-1/+1
* Revert "egl: Fixes transparency with EGL and X11."Hal Gentz2019-10-187-35/+17
* Revert "egl: Puts RGBA visuals in the second config selection group."Hal Gentz2019-10-181-9/+1
* Revert "egl: Configs w/o double buffering support have no `EGL_WINDOW_BIT`."Hal Gentz2019-10-1810-78/+7
* etnaviv: check NO_ASTC feature bitJonathan Marek2019-10-181-1/+2
* etnaviv: fix TS samplers on GC7000LJonathan Marek2019-10-181-1/+2
* etnaviv: fix linear_nearest / nearest_linear filters on GC7000LiteJonathan Marek2019-10-181-2/+4
* etnaviv: GC7000: flush TX descriptor and instruction cacheLucas Stach2019-10-181-0/+7
* etnaviv: add linear texture support on GC7000Lucas Stach2019-10-181-1/+3
* etnaviv: GC7000: Texture descriptorsWladimir J. van der Laan2019-10-188-1/+440
* etnaviv: check for softpin availability on Halti5 devicesLucas Stach2019-10-181-0/+5
* etnaviv: drm: add softpin interfaceLucas Stach2019-10-185-7/+63
* etnaviv: Rework lockingMarek Vasut2019-10-189-16/+28
* etnaviv: Command buffer reallocMarek Vasut2019-10-182-1/+33
* etnaviv: Rework resource status trackingMarek Vasut2019-10-184-32/+93
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