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* mesa: plumb offset/size parameters through GetTexSubImage codeBrian Paul2015-07-211-57/+80
* mesa: replace Driver.GetTexImage with GetTexSubImage()Brian Paul2015-07-2110-54/+83
* meta: add offset, width, height parameters to decompress_texture_image()Brian Paul2015-07-211-5/+5
* meta: handle subimages in _mesa_meta_setup_texture_coords()Brian Paul2015-07-213-33/+65
* mesa: assorted whitespace, formatting fixes in teximage.cBrian Paul2015-07-211-20/+10
* mesa: allow GL_TEXTURE_CUBE_MAP_ARRAY case for glCompressedTexSubImage3D()Brian Paul2015-07-211-1/+1
* mesa: include stdarg.h for va_listJonathan Gray2015-07-211-0/+1
* gallium: replace INLINE with inlineIlia Mirkin2015-07-21395-1522/+1515
* nvc0: force cache flush when binding a new uboSamuel Pitoiset2015-07-211-0/+2
* nv50: force cache flush when binding a new uboSamuel Pitoiset2015-07-211-0/+2
* st/mesa: Silence GCC unused-variable warning.Vinson Lee2015-07-211-0/+1
* r600/sb: Fix an &/&& mistakeAdam Jackson2015-07-211-1/+1
* Revert "i965/gen9: Plugin the code for selecting YF/YS tiling on skl+"Anuj Phogat2015-07-211-92/+17
* i965: Fix stride field for the result of emit_uniformize().Francisco Jerez2015-07-214-19/+26
* i965/fs: Fix stride field for uniforms.Francisco Jerez2015-07-211-0/+6
* i965/fs: Fix stride for immediate registers.Francisco Jerez2015-07-212-0/+7
* i965/vec4: Fix liveness analysis with BRW_OPCODE_SELIago Toral Quiroga2015-07-211-1/+2
* mesa: Rename _mesa_lookup_enum_by_nr() to _mesa_enum_to_string().Kenneth Graunke2015-07-2086-423/+423
* nouveau: use bool instead of booleanSamuel Pitoiset2015-07-2170-679/+679
* gallivm: Initialize LLVM Modules's DataLayout to an empty string.Tom Stellard2015-07-201-5/+23
* nvc0: add a missing parameter to nvc0_set_shader_images()Samuel Pitoiset2015-07-201-3/+3
* nouveau: always align buffers to 0x100Samuel Pitoiset2015-07-201-7/+1
* nv50: limit the maximum number of samplers to 16Samuel Pitoiset2015-07-201-1/+1
* nv50: turn samples counts off during blitSamuel Pitoiset2015-07-201-0/+11
* nv50: add nesting support for occlusion queriesSamuel Pitoiset2015-07-202-11/+20
* i965/nir/fs: removed unneeded support for global variablesAlejandro Piñeiro2015-07-203-14/+4
* nv50: fix max level clamping on G80Ilia Mirkin2015-07-201-2/+9
* gm107/ir: fix indirect txq emissionIlia Mirkin2015-07-181-2/+8
* nvc0/ir: don't worry about sampler in txq handlingIlia Mirkin2015-07-181-22/+8
* nvc0/ir: fix txq on indirect samplersIlia Mirkin2015-07-182-2/+56
* i965: Disable resource streamer in BLORPAbdiel Janulgue2015-07-181-0/+2
* i965: Upload binding tables in hw-generated binding table format.Abdiel Janulgue2015-07-181-9/+57
* i965: Implement interface to edit binding table entriesAbdiel Janulgue2015-07-182-0/+64
* i965: Enable hardware-generated binding tables on render path.Abdiel Janulgue2015-07-188-4/+128
* i965: Enable resource streamer for the batchbufferAbdiel Janulgue2015-07-187-2/+36
* i965: Define HW-binding table and resource streamer control opcodesAbdiel Janulgue2015-07-182-0/+33
* vc4: Switch to using a separate ioctl for making shaders.Eric Anholt2015-07-174-12/+78
* mesa: fix up some texture error checksRoland Scheidegger2015-07-182-21/+21
* vc4: Fix printing of shader-db debug when shader-db isn't turned on.Eric Anholt2015-07-171-4/+6
* vc4: Add debugging on texture relocation validation failures.Eric Anholt2015-07-171-7/+13
* vc4: Also consider uniform 0 in uniform lowering.Eric Anholt2015-07-171-3/+3
* vc4: Use the pure/const attributes on a bunch of our QPU functions.Eric Anholt2015-07-172-18/+18
* mesa: Detect and provide macros for function attributes pure and const.Eric Anholt2015-07-171-0/+20
* i965/fs: don't make unused payload registers interfereConnor Abbott2015-07-171-1/+6
* i965/fs: remove special case in setup_payload_interference()Connor Abbott2015-07-171-20/+0
* i965/fs: Mark last used ip for all regs read in the payloadJordan Justen2015-07-171-1/+4
* i965/fs: fix regs_read() for LINTERPConnor Abbott2015-07-171-1/+2
* nir: add nir_foreach_instr_safe_reverse()Connor Abbott2015-07-171-0/+2
* nir: add nir_instr_is_first() and nir_instr_is_last() helpersConnor Abbott2015-07-171-0/+12
* i965/cs: Use dispatch width of 8 for cs terminate payload setupJordan Justen2015-07-161-1/+1
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