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* [965] Fix TTM relocation caching overzealousness.Eric Anholt2008-02-051-0/+47
| | | | | | | | | | | | | | The failure mode that was a available was: reloc 1 -> target_buf exec: PRESUMED_OFFSET wrong, buffer migrates, r1 entry updated. reloc 2 -> target_buf exec: suppose buffer migrates again. PRESUMED_OFFSET wrong. r2 entry updated. reloc 1 -> target_buf exec: suppose buffer doesn't migrate. PRESUMED_OFFSET right. no relocations performed. r1 has stale pointer at original location. Failures were reported with OGLconform's VBO test and SPECviewperf90, though I haven't confirmed that this fixes it.
* i965: adjust the byte order of clear color. fix #14165Xiang, Haihao2008-02-051-1/+2
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* Replace usage of DRM_BO_FLAG_MEM_TT in intel_regions.c with local/cached.Eric Anholt2008-02-041-2/+8
| | | | | | In addition to potentially binding when it was about to be mapped anyway, failure to use CACHED_MAPPED means eating a full wbinvd on validate. Thanks to airlied for catching this.
* Allow first != 0 in mesa CVA handling, and add more error checking.Eric Anholt2008-02-043-9/+27
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* [965] Convert brw_draw_upload to managing dri_bos, not gl_buffer_objects.Eric Anholt2008-02-044-209/+126
| | | | | This helps us avoid a bunch of mess with gl_client_arrays that we filled with unused data and confused readers.
* [965] Remove dead structure in brw_draw_upload.c.Eric Anholt2008-02-041-24/+0
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* [965] Move temporary vbo array storage into the function using it.Eric Anholt2008-02-042-38/+25
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* [965] Remove dead brw_vertex_element members.Eric Anholt2008-02-042-5/+0
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* [965] Add a wrapper around interleaved copy_array_to_vbo_array for profiling.Eric Anholt2008-02-041-7/+18
| | | | | If compiled with optimization, it shouldn't appear at all, and helps me for now.
* [965] Avoid overloaded use of the term 'input' for clarity.Eric Anholt2008-02-041-13/+9
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* [965] Replace VEP/VBP state structures with inline batch emits.Eric Anholt2008-02-042-67/+66
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* r300: fix isosurf on rs690Dave Airlie2008-02-041-2/+9
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* i965: fix potential NULL pointer dereference. The third regionXiang, Haihao2008-02-031-0/+3
| | | | isn't created at all for 965
* [965] Fix indentation.Eric Anholt2008-02-011-6/+6
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* Revert "intel: don't apply the relocation optimization if a target"Eric Anholt2008-02-011-14/+4
| | | | | | | | | This reverts commit e2cb905bc6e23eaafaeeb2abdc9480e70959ee3f. It was a reversion of an optimization hidden as otherwise. pre_target_buf_handle was always NULL, so the optimization was never enabled, rather than fixing the important optimization (resulting in 25-50% performance loss).
* [965] Replace XXX comment about constant swizzle with an assert.Eric Anholt2008-02-012-2/+2
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* [965] Fix some indentation in brw_vs_tnl.c.Eric Anholt2008-02-011-6/+6
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* mesa: re-define NEED_SECONDARY_COLOR. fix #14310.Xiang, Haihao2008-02-021-0/+2
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* [intel] fix for previous fixZou Nan hai2008-02-011-4/+4
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* [intel] use _mesa_copy_rect for upload compressed texture,Zou Nan hai2008-02-013-2/+22
| | | | this fix bad texture issue in some games(UT and quake).
* i965: Don't emit state if fall back to software rendering. fix #14116Xiang, Haihao2008-02-011-2/+11
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* [i965] renable regative rhw testZou Nan hai2008-01-313-16/+12
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* intel: don't apply the relocation optimization if a targetXiang, Haihao2008-01-311-4/+14
| | | | | | buffer is used for a relocatee in the former relocation process then another target buffer is used for this relocatee at the same offset in the current relocation process.
* regenerate glsl library functionsRoland Scheidegger2008-01-311-41/+42
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* fix w component of glsl vec4 asinRoland Scheidegger2008-01-311-0/+1
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* check if fb->Delete is null (bugs 13507,14293)Brian2008-01-301-1/+6
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* Add new RV380 pci idAlex Deucher2008-01-292-0/+2
| | | | bug 14289
* i965: new integrated graphics chipset supportXiang, Haihao2008-01-2924-75/+259
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* r300: add initial rs690 support to MesaDave Airlie2008-01-272-1/+22
| | | | | | The rs690 has an rs4xx style vertex-shader less 3D engine. It uses the new r500 output engine though. It also needs a new drm with rs690 support, which is just getting cleaned up.
* i965: valid message length includes message header.Xiang, Haihao2008-01-251-1/+1
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* i965: re-define the type of reg.loopcount.Xiang, Haihao2008-01-251-1/+1
| | | | | avoid some issues such that 1 + (-2) gets a big positive value.
* Bufmgr cleanup from intel-batchbuffer branch of 2d driver.Eric Anholt2008-01-243-15/+14
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* Clean up comments/dead code from relocation buffer change.Eric Anholt2008-01-241-5/+0
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* i915: move to using copy from user for relocationsDave Airlie2008-01-241-59/+22
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* Assorted patches for miniglx/linux-solo (Gavin Li <[email protected]>)Brian2008-01-233-0/+32
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* Fix some issues with glDrawBuffer(GL_NONE), bug 14198Brian2008-01-225-14/+36
| | | | | Set _ColorDrawBuffers[0] = NULL if no renderbuffers enabled. Check that _ColorDrawBuffers[0] is non-null before dereferencing in a few places.
* [intel] Clean up references to screen buffer metrics.Kristian Høgsberg2008-01-227-105/+13
| | | | | | The screen wide info such as pitch and cpp are obsoleted by the FBO changes, so clean up the last few references to those, except for setting up the legacy screen regions.
* fix pc vs. gc->ps usage (bug 14197)Brian2008-01-221-4/+4
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* [965] Fix WM unit cache keying that broke line stipple and polygon offset.Eric Anholt2008-01-191-9/+14
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* [intel] Fix memory leak with fake bufmgr.Eric Anholt2008-01-181-1/+6
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* [965] Do a little bit rotation in state hash to reduce collisions.Eric Anholt2008-01-181-2/+16
| | | | This was around 3% improvement in OA.
* [intel] Use a static array for the validation list instead of a linked list.Eric Anholt2008-01-181-167/+119
| | | | | Around 10% of a CPU was being wasted to create the linked list which we threw out immediately after passing it to the kernel.
* [intel] Make the no_rast option be standard driconf instead of INTEL_NO_RAST.Eric Anholt2008-01-173-10/+17
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* [i915] Fix driver from cliprects changes, and clean up state emission.Eric Anholt2008-01-176-103/+26
| | | | | | | | | | The fix for pageflipping with cliprects ended up causing a batch flush at an inopportune time, which is fixed by moving it up. Additionally, the recovery code for handling batch wraps at bad times is replaced by just checking for the space up front, and using a no_batch_wrap assert like on 965 to make sure that we weren't wrong about how much space that was.
* [965] Fix whitespace in c9b1fef0c9c5018efd825c42782f19ad0618696aEric Anholt2008-01-171-4/+4
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* [965] Fix potential segfaults from bad realloc.Eric Anholt2008-01-171-1/+4
| | | | | C has no order of evaluation restrictions on function arguments, so we attempted to realloc from new-size to new-size.
* i965: always call dri_emit_reloc when creating clip unit stateXiang, Haihao2008-01-171-8/+7
| | | | | | | This fix ensures it gets the starting location of the clip program if a clip unit state is same as a unit which is created when metaops is actived and it doesn't impact metaops because the clip state offset isn't emitted when metaops is actived.
* [965] Fix inversion of SLT/SGE results in vertex programs.Eric Anholt2008-01-162-6/+3
| | | | | | | The WM code had this right, so copy its behavior. This reverts a flipping of the arguments to SLT in brw_vs_tnl which came in with the GLSL code that probably occurred to work around the flipped results, and brings the code back in line with t_vp_build.c.
* [965] Rename depth_mask in CC key to depth_write, since it's a boolean enable.Eric Anholt2008-01-161-4/+3
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* [965] Fix the type of alpha_ref in CC key, fixing ppracer rendering.Eric Anholt2008-01-161-1/+1
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