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* i965/vec4: Change opt_vector_float to keep track of the last offset seen in ↵Francisco Jerez2016-09-141-3/+3
| | | | | | | | | bytes. This simplifies things slightly and makes the pass more correct in presence of sub-GRF offsets. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/vec4: Simplify src/dst_reg to brw_reg conversion by using byte_offset().Francisco Jerez2016-09-141-7/+8
| | | | | | | This should also have the side effect of fixing convert_to_hw_regs() to handle sub-GRF register offsets. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/ir: Update several stale comments.Francisco Jerez2016-09-145-26/+22
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/ir: Don't print ARF subnr values twice.Francisco Jerez2016-09-142-8/+0
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/vec4: Print src/dst_reg::offset field consistently for all register files.Francisco Jerez2016-09-141-6/+15
| | | | | | | C.f. 'i965/fs: Print fs_reg::offset field consistently for all register files.'. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Print fs_reg::offset field consistently for all register files.Francisco Jerez2016-09-141-16/+22
| | | | | | | | | | | | The offset printing code in fs_visitor::dump_instruction() was doing things differently for sources and destinations and for each register file -- In some cases it would be added to the base register number fs_reg::nr, in other cases it would follow the base register separated with a plus sign, in other cases (uniforms) it would do both (!). The sub-register offset was also being printed or not rather inconsistently. Fix it. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Misc simplification.Francisco Jerez2016-09-144-6/+6
| | | | | | | Get rid of some leftover redundant arithmetic introduced during the conversion to byte offsets and sizes that can be simplified easily. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Get rid of fs_inst::set_smear().Francisco Jerez2016-09-143-32/+15
| | | | | | | | | | | | | | | | | | | component() was generally a better alternative because of several issues set_smear() had: - It wouldn't take the original stride and offset of the register into account, which means that set_smear() on the result of e.g. another set_smear() call or an offset() call would give a bogus region as result. - It was an inherently destructive operation. See the 'nir_intrinsic_shader_clock' hunk below for how this could lead to subtle bugs in cases where set_smear() was called multiple times on the same register like 'r.set_smear(0), r.set_smear(1)' with the expectation that each call would return a separate value instead of a reference to the same subsequently mutated object. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Use region_contained_in() in compute-to-mrf coalescing pass.Francisco Jerez2016-09-141-3/+2
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Move region_contained_in to the IR header and fix for non-VGRF files.Francisco Jerez2016-09-142-14/+13
| | | | | | | Also changed the argument names since 'src' and 'dst' don't make that much sense outside of the context of copy propagation. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Change region_contained_in() to use byte units.Francisco Jerez2016-09-141-15/+10
| | | | | | | | | | | This makes the function less annoying to use and more accurate -- We shouldn't propagate a copy into a register region that wasn't fully contained in the destination of the copy (IOW, a source region that wasn't fully defined by the copy) just because the number of registers written and read by each instruction happened to get rounded up to the same GRF multiple. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Simplify copy propagation LOAD_PAYLOAD ACP setup.Francisco Jerez2016-09-141-3/+2
| | | | | | By keeping track of 'offset' in byte units. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Simplify a bunch of fs_inst::size_written calculations by using ↵Francisco Jerez2016-09-144-15/+19
| | | | | | | | | component_size(). Using component_size() is easier and generally more correct because it takes into account the register type and stride for you. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Simplify result_live calculation in dead_code_eliminate().Francisco Jerez2016-09-141-9/+3
| | | | | | No need to unroll the first iteration of the loop manually. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Simplify and fix buggy stride/offset calculations using subscript().Francisco Jerez2016-09-142-59/+17
| | | | | | | | | | | | | | | These were bashing the 'offset' and 'stride' values of several registers without taking the previous value into account, which probably didn't matter in practice for optimize_frontfacing_ternary() because the 'tmp' register already had a known region, but it would have given the wrong region as result in the other cases in lower_integer_multiplication(). subscript(..., i) is a more straightforward way to take the i-th field of a given type from each channel of a register which should give the right answer as result regardless of the original 'offset' and 'stride' parameters of the register region. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Simplify get_fpu_lowered_simd_width() by using inequalities instead ↵Francisco Jerez2016-09-141-2/+2
| | | | | | of rounding. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Simplify byte_offset().Francisco Jerez2016-09-141-8/+4
| | | | | | | | In the most common case this can now be implemented as a simple addition because the offset is already encoded as a single scalar value in bytes. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Fix signedness of the return value of fs_inst::size_read().Francisco Jerez2016-09-142-2/+2
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Switch mask_relative_to() used in compute-to-mrf to byte units.Francisco Jerez2016-09-141-10/+10
| | | | | | | This makes the helper function less annoying to use and somewhat more accurate. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Fix bogus sub-MRF offset calculation in compute-to-mrf.Francisco Jerez2016-09-141-6/+6
| | | | | | | | | | | | The 'scan_inst->dst.offset % REG_SIZE' term in the final 'scan_inst->dst.offset' calculation is obviously bogus. The offset from the start of the copy destination register 'inst->dst' where the destination of the generating instruction 'scan_inst' would be written to (before compute-to-mrf runs) is just the offset of 'scan_inst->dst' relative to the source of the copy instruction (AKA rel_offset in the code below). Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Take into account copy register offset during compute-to-mrf.Francisco Jerez2016-09-141-1/+1
| | | | | | | | | This was dropping 'inst->dst.offset' on the floor. Nothing in the code above seems to guarantee that it's zero and in that case the offset of the register being coalesced into wouldn't be taken into account while rewriting the generating instruction. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/vec4: Drop backend_reg::in_range() in favor of regions_overlap().Francisco Jerez2016-09-145-20/+12
| | | | | | | | | | This makes sure that overlap checks are done correctly throughout the back-end when the '*this' register starts before the register/size pair provided as argument, and is actually less annoying to use than in_range() at this point since regions_overlap() takes its size arguments in bytes. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/vec4: Port regions_overlap() to the vec4 IR.Francisco Jerez2016-09-141-4/+58
| | | | | | | | | | This is copy-pasted almost line by line from the FS back-end. The only reason it cannot be implemented in terms of backend_reg is that the backend_reg::nr field doesn't have the same meaning for uniforms on both back-ends. It could be easily deduplicated by using a template function. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Stop using fs_reg::in_range() in favor of regions_overlap().Francisco Jerez2016-09-141-1/+3
| | | | | | | | | | | Its only use left in the FS back-end should be using regions_overlap() instead to avoid getting a false negative result in cases where source and destination overlap but the former starts before the latter in the VGRF file. v2: Put back lost components factor (Iago). Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Drop fs_inst::overwrites_reg() in favor of regions_overlap().Francisco Jerez2016-09-147-14/+15
| | | | | | | | | | | fs_inst::overwrites_reg is rather easy to misuse because it cannot tell how large the register region starting at 'reg' is, so in cases where the destination region starts after 'reg' it may give a misleading result. regions_overlap() is somewhat more verbose to use but handles arbitrary overlap correctly so it should generally be used instead. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Fix LOAD_PAYLOAD handling in register coalesce is_nop_mov().Francisco Jerez2016-09-141-1/+3
| | | | | | | | | | | is_nop_mov() was broken for LOAD_PAYLOAD instructions in two ways: On the one hand the original destination register offset wasn't being taken into account which would give incorrect results if it was already non-zero, and on the other hand all source registers were being treated as if they had a size of 32B, which is almost never the case in SIMD16 programs for non-header sources. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Fix can_propagate_from() source/destination overlap check.Francisco Jerez2016-09-141-2/+2
| | | | | | | | | The previous overlap condition only made sure that the VGRF numbers or GRF-aligned offsets were different without taking the amount of data written and read by the instruction into consideration. Use the regions_overlap() helper instead. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Compare full register offsets in cmod propagation pass.Francisco Jerez2016-09-141-2/+1
| | | | | | | This could potentially have misoptimized a program in cases where inst->src[0] had a non-zero sub-GRF offset. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Don't consider LOAD_PAYLOAD with stride > 1 source to behave like a ↵Francisco Jerez2016-09-141-1/+1
| | | | | | | | raw copy. Noticed the problem by inspection while typing in the previous commit. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Don't consider LOAD_PAYLOAD with sub-GRF offset to behave like a ↵Francisco Jerez2016-09-141-1/+1
| | | | | | | | | raw copy. This was likely the original intention, and at least register coalesce relies on it. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/vec4: Take into account misalignment in regs_written() and regs_read().Francisco Jerez2016-09-141-4/+6
| | | | | | | | Unlike the FS counterpart of this commit this was likely not (yet) a bug, but let's fix it already in preparation for implementing support for sub-GRF offsets in the VEC4 back-end. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Take into account misalignment in regs_written() and regs_read().Francisco Jerez2016-09-142-29/+5
| | | | | | | | | | | | There was a workaround for this in fs_inst::size_read() for the SHADER_OPCODE_MOV_INDIRECT instruction and FIXED_GRF register file *only*. We should take this possibility into account for the sources and destinations of all instructions on all optimization passes that need to quantize dataflow in 32B increments by adding the amount of misalignment to the size read or written from the regs_read() and regs_written() helpers respectively. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Take into account trailing padding in regs_written() and regs_read().Francisco Jerez2016-09-141-2/+20
| | | | | | | | | | | | | | | | | | | | This fixes regs_written() and regs_read() to return a more accurate value when the padding left between components due to a stride value greater than one causes the region bounds given by size_written or size_read to overflow into the next register. This could become a problem in optimization passes that keep track of dataflow using fixed-size arrays with register granularity, because the overflow register (not actually accessed by the region) may not have been allocated at all which could lead to undefined memory access. An alternative to this would be to subtract the trailing padding already during the calculation of fs_inst::size_read and ::size_written, but that would break code that currently assumes that ::size_read and _written are whole multiples of the component size, and would be hard to maintain looking forward because size_written is assigned from a bunch of different places. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Handle fixed HW GRF subnr in reg_offset().Francisco Jerez2016-09-141-1/+2
| | | | | | | This will be useful later on when we start using reg_offset() on fixed hardware registers. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Handle arbitrary offsets in brw_reg_from_fs_reg for MRF/VGRF registers.Francisco Jerez2016-09-141-3/+2
| | | | | | | This restriction seemed rather artificial... Removing it actually simplifies things slightly. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Return more accurate read size for LINTERP from fs_inst::size_read.Francisco Jerez2016-09-141-1/+1
| | | | | | | | The LINTERP virtual instruction only reads three scalar components from the first 16B of the second source, we can now teach size_read() about it since its return value is represented with byte granularity. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Return more accurate read size from fs_inst::size_read for IMM and ↵Francisco Jerez2016-09-141-1/+1
| | | | | | UNIFORM files. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/vec4: Replace vec4_instruction::regs_read with ::size_read using byte ↵Francisco Jerez2016-09-143-13/+25
| | | | | | | | | | | | | | | units. The previous regs_read value can be recovered by rewriting each reference of regs_read() like 'x = i.regs_read(j)' to 'x = DIV_ROUND_UP(i.size_read(j), reg_unit)'. For the same reason as in the previous patches, this doesn't attempt to be particularly clever about simplifying the result in the interest of keeping the rather lengthy patch as obvious as possible. I'll come back later to clean up any ugliness introduced here. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Replace fs_inst::regs_read with ::size_read using byte units.Francisco Jerez2016-09-143-32/+34
| | | | | | | | | | | | | The previous regs_read value can be recovered by rewriting each reference of regs_read() like 'x = i.regs_read(j)' to 'x = DIV_ROUND_UP(i.size_read(j), reg_unit)'. For the same reason as in the previous patches, this doesn't attempt to be particularly clever about simplifying the result in the interest of keeping the rather lengthy patch as obvious as possible. I'll come back later to clean up any ugliness introduced here. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/ir: Drop backend_instruction::regs_written field.Francisco Jerez2016-09-141-1/+0
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/vec4: Replace vec4_instruction::regs_written with ::size_written field ↵Francisco Jerez2016-09-149-11/+12
| | | | | | | | | | | | | | | | in bytes. The previous regs_written field can be recovered by rewriting each rvalue reference of regs_written like 'x = i.regs_written' to 'x = DIV_ROUND_UP(i.size_written, reg_unit)', and each lvalue reference like 'i.regs_written = x' to 'i.size_written = x * reg_unit'. For the same reason as in the previous patches, this doesn't attempt to be particularly clever about simplifying the result in the interest of keeping the rather lengthy patch as obvious as possible. I'll come back later to clean up any ugliness introduced here. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Replace fs_inst::regs_written with ::size_written field in bytes.Francisco Jerez2016-09-1415-98/+107
| | | | | | | | | | | | | | The previous regs_written field can be recovered by rewriting each rvalue reference of regs_written like 'x = i.regs_written' to 'x = DIV_ROUND_UP(i.size_written, reg_unit)', and each lvalue reference like 'i.regs_written = x' to 'i.size_written = x * reg_unit'. For the same reason as in the previous patches, this doesn't attempt to be particularly clever about simplifying the result in the interest of keeping the rather lengthy patch as obvious as possible. I'll come back later to clean up any ugliness introduced here. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/vec4: Add wrapper functions for vec4_instruction::regs_read and ↵Francisco Jerez2016-09-146-16/+42
| | | | | | | | | | | | | | | | ::regs_written. This is in preparation for dropping vec4_instruction::regs_read and ::regs_written in favor of more accurate alternatives expressed in byte units. The main reason these wrappers are useful is that a number of optimization passes implement dataflow analysis with register granularity, so these helpers will come in handy once we've switched register offsets and sizes to the byte representation. The wrapper functions will also make sure that GRF misalignment (currently neglected by most of the back-end) is taken into account correctly in the calculation of regs_read and regs_written. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Add wrapper functions for fs_inst::regs_read and ::regs_written.Francisco Jerez2016-09-149-57/+83
| | | | | | | | | | | | | | This is in preparation for dropping fs_inst::regs_read and ::regs_written in favor of more accurate alternatives expressed in byte units. The main reason these wrappers are useful is that a number of optimization passes implement dataflow analysis with register granularity, so these helpers will come in handy once we've switched register offsets and sizes to the byte representation. The wrapper functions will also make sure that GRF misalignment (currently neglected by most of the back-end) is taken into account correctly in the calculation of regs_read and regs_written. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Replace fs_reg::subreg_offset with fs_reg::offset expressed in bytes.Francisco Jerez2016-09-146-51/+34
| | | | | | | | | | | | | | | | | The fs_reg::subreg_offset and ::offset fields are now redundant, the sub-GRF offset can just be added to the single ::offset field expressed in byte units. The current subreg_offset value can be recovered by applying the following rule: Replace each rvalue reference of subreg_offset like 'x = r.subreg_offset' with 'x = r.offset % reg_unit', and each lvalue reference like 'r.subreg_offset = x' with 'r.offset = ROUND_DOWN_TO(r.offset, reg_unit) + x'. For the same reason as in the previous patches, this doesn't attempt to be particularly clever about simplifying the result in the interest of keeping the rather lengthy patch as obvious as possible. I'll come back later to clean up any ugliness introduced here. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/ir: Remove backend_reg::reg_offset.Francisco Jerez2016-09-142-15/+2
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/vec4: Replace dst/src_reg::reg_offset with dst/src_reg::offset ↵Francisco Jerez2016-09-148-48/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | expressed in bytes. The dst/src_reg::offset field in byte units introduced in the previous patch is a more straightforward alternative to an offset representation split between ::reg_offset and ::subreg_offset fields. The split representation makes it too easy to forget about one of the offsets while dealing with the other, which has led to multiple FS back-end bugs in the past. To make the matter worse the unit reg_offset was expressed in was rather inconsistent, for uniforms it would be expressed in either 4B or 16B units depending on the back-end, and for most other things it would be expressed in 32B units. This encodes reg_offset as a new offset field expressed consistently in byte units. Each rvalue reference of reg_offset in existing code like 'x = r.reg_offset' is rewritten to 'x = r.offset / reg_unit', and each lvalue reference like 'r.reg_offset = x' is rewritten to 'r.offset = r.offset % reg_unit + x * reg_unit'. Because the change affects a lot of places and is rather non-trivial to verify due to the inconsistent value of reg_unit, I've tried to avoid making any additional changes other than applying the rewrite rule above in order to keep the patch as simple as possible, sometimes at the cost of introducing obvious stupidity (e.g. algebraic expressions that could be simplified given some knowledge of the context) -- I'll clean those up later on in a second pass. v2: Fix division by the wrong reg_unit in the UNIFORM case of convert_to_hw_regs(). (Iago) Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/fs: Replace fs_reg::reg_offset with fs_reg::offset expressed in bytes.Francisco Jerez2016-09-1417-82/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fs_reg::offset field in byte units introduced in this patch is a more straightforward alternative to the current register offset representation split between fs_reg::reg_offset and ::subreg_offset. The split representation makes it too easy to forget about one of the offsets while dealing with the other, which has led to multiple back-end bugs in the past. To make the matter worse the unit reg_offset was expressed in was rather inconsistent, for uniforms it would be expressed in either 4B or 16B units depending on the back-end, and for most other things it would be expressed in 32B units. This encodes reg_offset as a new offset field expressed consistently in byte units. Each rvalue reference of reg_offset in existing code like 'x = r.reg_offset' is rewritten to 'x = r.offset / reg_unit', and each lvalue reference like 'r.reg_offset = x' is rewritten to 'r.offset = r.offset % reg_unit + x * reg_unit'. Because the change affects a lot of places and is rather non-trivial to verify due to the inconsistent value of reg_unit, I've tried to avoid making any additional changes other than applying the rewrite rule above in order to keep the patch as simple as possible, sometimes at the cost of introducing obvious stupidity (e.g. algebraic expressions that could be simplified given some knowledge of the context) -- I'll clean those up later on in a second pass. Reviewed-by: Iago Toral Quiroga <[email protected]>
* glsl: grammar fixEero Tamminen2016-09-141-2/+2
| | | | | | Signed-off-by: Eero Tamminen <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Enable ANDROID_extension_pack_es31a on Gen9+.Kenneth Graunke2016-09-141-0/+1
| | | | | | | | | AEP requires ASTC, which is currently only enabled on Skylake and later. (It may be possible to extend this to Cherryview/Braswell in the future, but earlier hardware doesn't have ASTC support.) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
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