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* Merge branch 'mesa_7_6_branch'Brian Paul2009-09-0916-23/+59
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| * Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul2009-09-096-3/+24
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| | * mesa: bump version to 7.5.2Brian Paul2009-09-081-3/+3
| | * i965: fix incorrect test for vertex position attributeBrian Paul2009-09-083-1/+4
| | * i965: Fix warnings in intel_pixel_read.c.Eric Anholt2009-09-041-0/+4
| | * intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt2009-09-044-1/+29
| | * intel: Update Mesa state before span setup in glReadPixels.Eric Anholt2009-09-043-3/+13
| | * intel: Move intel_pixel_read.c to shared for use with i965.Eric Anholt2009-09-042-306/+307
| | * i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.Eric Anholt2009-09-041-2/+4
| | * intel: Align cubemap texture height to its padding requirements.Eric Anholt2009-09-041-0/+10
| | * intel: Align untiled region height to 2 according to 965 docs.Eric Anholt2009-09-041-0/+7
| | * i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt2009-09-043-1/+5
| | * i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt2009-09-041-1/+21
| | * i965: asst clean-ups, etc in brw_vs_emit()Brian Paul2009-09-041-11/+10
| | * i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt2009-09-041-0/+13
| | * i965: Spell "conditional" correctly.Eric Anholt2009-09-043-15/+15
| | * i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt2009-09-041-1/+5
| | * i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt2009-09-041-0/+14
| | * i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt2009-09-041-0/+11
| | * i965: Make sure the VS URB size is big enough to fit a VF VUE.Eric Anholt2009-09-041-1/+8
| | * i965: Don't emit bad packets when no VBs are referenced.Eric Anholt2009-09-041-0/+22
| | * i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt2009-09-042-29/+18
| | * i965: Set the max index buffer address correctly according to the docs.Eric Anholt2009-09-041-1/+1
| | * i965: rename var: s/tmp/vs_inputs/Brian Paul2009-09-041-8/+8
| | * gallium/xlib: silence unitialized var warningBrian Paul2009-09-031-1/+1
| | * gallium/xlib: silence uninitialized var warningBrian Paul2009-09-031-1/+1
| | * st/mesa: silence uninitialized var warningsBrian Paul2009-09-031-2/+2
| | * st/mesa: fix glCopyPixels(GL_STENCIL_INDEX) inverted positionBrian Paul2009-09-031-0/+4
| | * st/mesa: Do GL_RGBA->GL_RGB texsubimage on hardwareKeith Whitwell2009-09-021-14/+51
| | * util: add version of u_blit_pixels which takes a writemaskKeith Whitwell2009-09-024-15/+100
| | * draw: remove unused variableKeith Whitwell2009-09-021-1/+0
| | * swrast: fix selection/feedback regressionBrian Paul2009-08-311-1/+1
| | * swrast: can't use deferred texture/shading if using KIL instructionBrian Paul2009-08-311-0/+3
| | * mesa: added const qualifiers, move local varBrian Paul2009-08-311-7/+8
| | * mesa: fix saturation logic in emit_texenv()Brian Paul2009-08-311-1/+7
| | * mesa: fix 32bit cross compilation on a 64bit machineMarc Dietrich2009-08-311-1/+1
| * | gallium: Added HaikuOS platformaljen2009-09-099-19/+31
| * | mesa: disable GL_LUMINANCE case in _mesa_meta_draw_pixels()Brian Paul2009-09-091-1/+4
* | | mesa: regenerate get.c form get_gen.pyBrian Paul2009-09-091-0/+16
* | | mesa: move call to init_c_cliptest() from enable.c to tnl module.Brian Paul2009-09-094-8/+24
* | | r600: fix ftp for dri1Alex Deucher2009-09-091-3/+4
* | | intel: add B43 chipset supportZhenyu Wang2009-09-092-1/+6
* | | r600: don't setup hardware state if TFPDave Airlie2009-09-091-0/+4
* | | mesa: bump version to 7.7Brian Paul2009-09-081-3/+3
* | | gallium: added r8g8b8_get/put_tile_rgba()Brian Paul2009-09-081-1/+53
* | | mesa: fix viewport_z_clip breakageBrian Paul2009-09-081-7/+15
* | | i915g: Add buffer write callbackJakob Bornecrantz2009-09-092-0/+24
* | | i915g: Reorg vbuf code a bitJakob Bornecrantz2009-09-091-36/+61
* | | i915g: pwrite batchbuffer instead of mapJakob Bornecrantz2009-09-091-3/+18
* | | i915g: Keep vertex buffers in a fifoJakob Bornecrantz2009-09-091-5/+36
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