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* nouveau: add new shared scratch buffersChristoph Bumiller2012-04-143-0/+185
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* nvc0: only force early fragment tests if requested by shaderChristoph Bumiller2012-04-145-14/+7
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* nv50,nvc0: hold references to the framebuffer surfacesChristoph Bumiller2012-04-144-2/+32
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* r300g: align vertex buffer suballocations to 4Marek Olšák2012-04-131-1/+1
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* u_blitter: align vertex buffer suballocations to 4Marek Olšák2012-04-131-1/+1
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* xorg/nouveau: switch to libdrm_nouveau-2.0Marcin Slusarz2012-04-131-3/+3
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* targets/{egl-static,gbm}: further clean-up the nvfx remainsMartin Peres2012-04-142-2/+2
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* nvc0: remove include of old libdrm_nouveau's nouveau_reloc.hChristoph Bumiller2012-04-141-2/+0
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* nv50,nvc0: handle PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETSChristoph Bumiller2012-04-142-0/+4
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* nv30: s/DUAL_SOURCE_BLEND/MAX_DUAL_SOURCE_RENDER_TARGETSChristoph Bumiller2012-04-141-1/+1
| | | | Merge accident.
* nv30: import new driver for GeForce FX/6/7 chipsets, and Quadro variantsBen Skeggs2012-04-1444-7/+13724
| | | | | | | | | | | | | | | | | | The primary motivation for this rewrite was to have a maintainable driver going forward, as nvfx was quite horrible in a lot of ways. The driver is heavily based on the design of the nv50/nvc0 3d drivers we already have, and uses the same common buffer/fence code. It also passes a HEAP more piglit tests than nvfx did, supports a couple more features, and a few more to come still probably. The CPU footprint of this driver is far far less than nvfx, and translates into far greater framerates in a lot of applications (unless you're using a CPU that's way way newer than the GPUs of these generations....) Basically, we once again have a maintained driver for these chipsets \o/ Feel free to report bugs now!
* nouveau: switch to libdrm_nouveau-2.0Christoph Bumiller2012-04-1457-3433/+3714
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* nvc0: remove obsolete nvc0_push2.cChristoph Bumiller2012-04-142-334/+0
| | | | | Slower version of nvc0_push.c, was only used to ascertain that bugs were not the new version's fault.
* nouveau: remove automatic buffer migration heuristicsChristoph Bumiller2012-04-144-36/+0
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* nvfx: completely remove this driver (GeForce FX/6/7)Ben Skeggs2012-04-1446-14900/+5
| | | | | | | | | | This driver hasn't been maintained properly for a very long time, and for many very good reasons. It's horrible. A new driver supporting these chipsets will appear with the commits that port vieux/nv50/nvc0 to libdrm_nouveau-2.0. Signed-off-by: Ben Skeggs <[email protected]>
* nouveau: rework and simplify nv04/nv05 driver a bitBen Skeggs2012-04-148-300/+215
| | | | | | | | | | | | | | | TEXTURED_TRIANGLE and MULTITEX_TRIANGLE are both a bit special in that if you use any other graph object in the meantime they'll forget their state and spew a lovely METHOD_CNT error at you when you try to draw. The pre-newlib driver has a flush_notify() hook which does this state re-emit, and a number of random workarounds like extra flushes and state dirtying after various operations to solve this issue. I'm taking a slightly different approach to things instead, which has the nice side-effect of removing the divergent code-paths for ttri/mtri, the flush/dirty workarounds and the need for flush_notify. Also gives a few FPS boost in OA, yay.
* nouveau/vieux: switch to libdrm_nouveau-2.0Ben Skeggs2012-04-1446-1890/+1844
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* gallium: document dual source blending restrictions on galliumDave Airlie2012-04-131-1/+5
| | | | | | As per Brian's suggestion, document the restrictions on dual src blending. Signed-off-by: Dave Airlie <[email protected]>
* r600g: initial r600 dual src blending supportDave Airlie2012-04-135-16/+44
| | | | | | survives piglit with no regressions on rv610/evergreen Signed-off-by: Dave Airlie <[email protected]>
* softpipe: add dual source blending supportDave Airlie2012-04-132-12/+88
| | | | | | This adds support for a single dual source blending MRT to softpipe. Signed-off-by: Dave Airlie <[email protected]>
* util: add dual blend helper function (v2)Dave Airlie2012-04-131-0/+26
| | | | | | | | This is just a function to tell if a certain blend mode requires dual sources. v2: move to inlines as per Brian's suggestion Signed-off-by: Dave Airlie <[email protected]>
* st/mesa: add ARB_blend_func_extended support to state tracker.Dave Airlie2012-04-133-5/+12
| | | | | | | | This adds the blend mode mapping, it also uses the var->index in the glsl to tgsi convertor - this is the other half of my using 4 in the GLSL compiler. Signed-off-by: Dave Airlie <[email protected]>
* gallium: rename DUAL_SOURCE_BLEND cap to MAX_DUAL_SOURCE_RENDER_TARGETSDave Airlie2012-04-135-4/+8
| | | | | | Though I don't think we'll ever expose > 1. Signed-off-by: Dave Airlie <[email protected]>
* glsl: add support for ARB_blend_func_extended (v3)Dave Airlie2012-04-138-7/+57
| | | | | | | | | | | | | | | | | | | This adds index support to the GLSL compiler. I'm not 100% sure of my approach here, esp without how output ordering happens wrt location, index pairs, in the "mark" function. Since current hw doesn't ever have a location > 0 with an index > 0, we don't have to work out if the output ordering the hw requires is location, index, location, index or location, location, index, index. But we have no hw to know, so punt on it for now. v2: index requires layout - catch and error setup explicit index properly. v3: drop idx_offset stuff, assume index follow location Signed-off-by: Dave Airlie <[email protected]>
* mesa: add support for ARB_blend_func_extended (v4)Dave Airlie2012-04-139-6/+154
| | | | | | | | | | | | | | | | | | | | Add implementations of the two API functions, Add a new strings to uint mapping for index bindings Add the blending mode validation for SRC1 + SRC_ALPHA_SATURATE Add get for MAX_DUAL_SOURCE_DRAW_BUFFERS v2: Add check in valid_to_render to address case in spec ERRORS. v3: Add index to ir.h so this patch compiles on its own fixup comment v4: fixup Brian's comments The GLSL patch will setup the indices. Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: initial WIP SI codeTom Stellard2012-04-13195-8/+66004
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds initial support for acceleration on SI chips. egltri is starting to work. The SI/R600 llvm backend is currently included in mesa but that may change in the future. The plan is to write a single gallium driver and use gallium to support X acceleration. This commit contains patches from: Tom Stellard <[email protected]> Michel Dänzer <[email protected]> Alex Deucher <[email protected]> Vadim Girlin <[email protected]> Signed-off-by: Alex Deucher <[email protected]> The following commits were squashed in: ====================================================================== radeonsi: Remove unused winsys pointer This was removed from r600g in commit: commit 96d882939d612fcc8332f107befec470ed4359de Author: Marek Olšák <[email protected]> Date: Fri Feb 17 01:49:49 2012 +0100 gallium: remove unused winsys pointers in pipe_screen and pipe_context A winsys is already a private object of a driver. ====================================================================== radeonsi: Copy color clamping CAPs from r600 Not sure if the values of these CAPS are correct for radeonsi, but the same changed were made to r600g in commit: commit bc1c8369384b5e16547c5bf9728aa78f8dfd66cc Author: Marek Olšák <[email protected]> Date: Mon Jan 23 03:11:17 2012 +0100 st/mesa: do vertex and fragment color clamping in shaders For ARB_color_buffer_float. Most hardware can't do it and st/mesa is the perfect place for a fallback. The exceptions are: - r500 (vertex clamp only) - nv50 (both) - nvc0 (both) - softpipe (both) We also have to take into account that r300 can do CLAMPED vertex colors only, while r600 can do UNCLAMPED vertex colors only. The difference can be expressed with the two new CAPs. ====================================================================== radeonsi: Remove PIPE_CAP_OUTPUT_READ This CAP was dropped in commit: commit 04e324008759282728a95a1394bac2c4c2a1a3f9 Author: Marek Olšák <[email protected]> Date: Thu Feb 23 23:44:36 2012 +0100 gallium: remove PIPE_SHADER_CAP_OUTPUT_READ r600g is the only driver which has made use of it. The reason the CAP was added was to fix some piglit tests when the GLSL pass lower_output_reads didn't exist. However, not removing output reads breaks the fallback for glClampColorARB, which assumes outputs are not readable. The fix would be non-trivial and my personal preference is to remove the CAP, considering that reading outputs is uncommon and that we can now use lower_output_reads to fix the issue that the CAP was supposed to workaround in the first place. ====================================================================== radeonsi: Add missing parameters to rws->buffer_get_tiling() call This was changed in commit: commit c0c979eebc076b95cc8d18a013ce2968fe6311ad Author: Jerome Glisse <[email protected]> Date: Mon Jan 30 17:22:13 2012 -0500 r600g: add support for common surface allocator for tiling v13 Tiled surface have all kind of alignment constraint that needs to be met. Instead of having all this code duplicated btw ddx and mesa use common code in libdrm_radeon this also ensure that both ddx and mesa compute those alignment in the same way. v2 fix evergreen v3 fix compressed texture and workaround cube texture issue by disabling 2D array mode for cubemap (need to check if r7xx and newer are also affected by the issue) v4 fix texture array v5 fix evergreen and newer, split surface values computation from mipmap tree generation so that we can get them directly from the ddx v6 final fix to evergreen tile split value v7 fix mipmap offset to avoid to use random value, use color view depth view to address different layer as hardware is doing some magic rotation depending on the layer v8 fix COLOR_VIEW on r6xx for linear array mode, use COLOR_VIEW on evergreen, align bytes per pixel to a multiple of a dword v9 fix handling of stencil on evergreen, half fix for compressed texture v10 fix evergreen compressed texture proper support for stencil tile split. Fix stencil issue when array mode was clear by the kernel, always program stencil bo. On evergreen depth buffer bo need to be big enough to hold depth buffer + stencil buffer as even with stencil disabled things get written there. v11 rebase on top of mesa, fix pitch issue with 1d surface on evergreen, old ddx overestimate those. Fix linear case when pitch*height < 64. Fix r300g. v12 Fix linear case when pitch*height < 64 for old path, adapt to libdrm API change v13 add libdrm check Signed-off-by: Jerome Glisse <[email protected]> ====================================================================== radeonsi: Remove PIPE_TRANSFER_MAP_PERMANENTLY This was removed in commit: commit 62f44f670bb0162e89fd4786af877f8da9ff607c Author: Marek Olšák <[email protected]> Date: Mon Mar 5 13:45:00 2012 +0100 Revert "gallium: add flag PIPE_TRANSFER_MAP_PERMANENTLY" This reverts commit 0950086376b1c8b7fb89eda81ed7f2f06dee58bc. It was decided to refactor the transfer API instead of adding workarounds to address the performance issues. ====================================================================== radeonsi: Handle PIPE_VIDEO_CAP_PREFERED_FORMAT. Reintroduced in commit 9d9afcb5bac2931d4b8e6d1aa571e941c5110c90. ====================================================================== radeonsi: nuke the fallback for vertex and fragment color clamping Ported from r600g commit c2b800cf38b299c1ab1c53dc0e4ea00c7acef853. ====================================================================== radeonsi: don't expose transform_feedback2 without kernel support Ported from r600g commit 15146fd1bcbb08e44a1cbb984440ee1a5de63d48. ====================================================================== radeonsi: Handle PIPE_CAP_GLSL_FEATURE_LEVEL. Ported from r600g part of commit 171be755223d99f8cc5cc1bdaf8bd7b4caa04b4f. ====================================================================== radeonsi: set minimum point size to 1.0 for non-sprite non-aa points. Ported from r600g commit f183cc9ce3ad1d043bdf8b38fd519e8f437714fc. ====================================================================== radeonsi: rework and consolidate stencilref state setting. Ported from r600g commit a2361946e782b57f0c63587841ca41c0ea707070. ====================================================================== radeonsi: cleanup setting DB_SHADER_CONTROL. Ported from r600g commit 3d061caaed13b646ff40754f8ebe73f3d4983c5b. ====================================================================== radeonsi: Get rid of register masks. Ported from r600g commits 3d061caaed13b646ff40754f8ebe73f3d4983c5b..9344ab382a1765c1a7c2560e771485edf4954fe2. ====================================================================== radeonsi: get rid of r600_context_reg. Ported from r600g commits 9344ab382a1765c1a7c2560e771485edf4954fe2..bed20f02a771f43e1c5092254705701c228cfa7f. ====================================================================== radeonsi: Fix regression from 'Get rid of register masks'. ====================================================================== radeonsi: optimize r600_resource_va. Ported from r600g commit 669d8766ff3403938794eb80d7769347b6e52174. ====================================================================== radeonsi: remove u8,u16,u32,u64 types. Ported from r600g commit 78293b99b23268e6698f1267aaf40647c17d95a5. ====================================================================== radeonsi: merge r600_context with r600_pipe_context. Ported from r600g commit e4340c1908a6a3b09e1a15d5195f6da7d00494d0. ====================================================================== radeonsi: Miscellaneous context cleanups. Ported from r600g commits e4340c1908a6a3b09e1a15d5195f6da7d00494d0..621e0db71c5ddcb379171064a4f720c9cf01e888. ====================================================================== radeonsi: add a new simple API for state emission. Ported from r600g commits 621e0db71c5ddcb379171064a4f720c9cf01e888..f661405637bba32c2cfbeecf6e2e56e414e9521e. ====================================================================== radeonsi: Also remove sbu_flags member of struct r600_reg. Requires using sid.h instead of r600d.h for the new CP_COHER_CNTL definitions, so some code needs to be disabled for now. ====================================================================== radeonsi: Miscellaneous simplifications. Ported from r600g commits 38bf2763482b4f1b6d95cd51aecec75601d8b90f and b0337b679ad4c2feae59215104cfa60b58a619d5. ====================================================================== radeonsi: Handle PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION. Ported from commit 8b4f7b0672d663273310fffa9490ad996f5b914a. ====================================================================== radeonsi: Use a fake reloc to sleep for fences. Ported from r600g commit 8cd03b933cf868ff867e2db4a0937005a02fd0e4. ====================================================================== radeonsi: adapt to get_query_result interface change. Ported from r600g commit 4445e170bee23a3607ece0e010adef7058ac6a11.
* st/vega: silence enum cast warningsDylan Noblesmith2012-04-131-4/+5
| | | | | | | | | | | | clang warns on these: stroker.c:626:19: warning: implicit conversion from enumeration type 'VGPathCommand' to different enumeration type 'VGPathSegment' [-Wconversion] No change in the underlying value. Reviewed-by: Brian Paul <[email protected]>
* i965: fix typoDylan Noblesmith2012-04-131-1/+1
| | | | | | | | | | | | | | | | | | Noticed by clang: brw_wm_surface_state.c:330:30: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides] [MESA_FORMAT_Z24_S8] = 0, ^ brw_wm_surface_state.c:326:30: note: previous initialization is here [MESA_FORMAT_Z24_S8] = 0, ^ No functionality change, since the array is declared static so it was zero-initialized by default. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* mesa: fix truncated value warningDylan Noblesmith2012-04-131-1/+1
| | | | | | | | | | | | Silences a clang warning: format_pack.c:2546:30: warning: implicit conversion from 'int' to 'GLubyte' (aka 'unsigned char') changes value from 65535 to 255 [-Wconstant-conversion] d[i] = d[i] ? 0xffff : 0x0; ~ ^~~~~~ Reviewed-by: Brian Paul <[email protected]>
* mesa: don't cast away constDylan Noblesmith2012-04-131-1/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* egl-static: fix printf warningDylan Noblesmith2012-04-131-1/+2
| | | | | | | | | | | | | Noticed by clang: egl_st.c:57:50: warning: field precision should have type 'int', but argument has type 'size_t' (aka 'unsigned long') [-Wformat] ret = util_snprintf(path, sizeof(path), "%.*s/%s" UTIL_DL_EXT, ~~^~ NOTE: This is a candidate for the 8.0 branch. Reviewed-by: Brian Paul <[email protected]>
* st/vega: fix uninitialized valuesDylan Noblesmith2012-04-131-2/+2
| | | | | | | | | | | | | | | | | | C still treats array arguments exactly like pointer arguments. By sheer coincidence, this still worked fine on 64-bit machines where 2 * sizeof(float) == sizeof(void*), but not on 32-bit. Noticed by clang: text.c:76:51: warning: sizeof on array function parameter will return size of 'const VGfloat *' (aka 'const float *') instead of 'const VGfloat [2]' [-Wsizeof-array-argument] memcpy(glyph->glyph_origin, glyphOrigin, sizeof(glyphOrigin)); NOTE: This is a candidate for the 8.0 branch. Reviewed-by: Brian Paul <[email protected]>
* egl: fix uninitialized valuesDylan Noblesmith2012-04-131-1/+1
| | | | | | | | | | | | | | Noticed by clang: eglimage.c:48:28: warning: argument to 'sizeof' in 'memset' call is the same expression as the destination; did you mean to dereference it? [-Wsizeof-pointer-memaccess] memset(attrs, 0, sizeof(attrs)); ~~~~~ ^~~~~ NOTE: This is a candidate for the 8.0 branch. Reviewed-by: Brian Paul <[email protected]>
* util: fix uninitialized tableDylan Noblesmith2012-04-132-5/+7
| | | | | | | | | | | | | | | | | | | Most of the 256 values in the 'generic_to_slot' table were supposed to be initialized with the default value 0xff, but were left at zero (from CALLOC_STRUCT()) instead. Noticed by clang: u_linkage.h:60:31: warning: argument to 'sizeof' in 'memset' call is the same expression as the destination; did you mean to provide an explicit length? [-Wsizeof-pointer-memaccess] memset(table, 0xff, sizeof(table)); ~~~~~ ^~~~~ Also fix a signed/unsigned comparison and a comment typo here. NOTE: This is a candidate for the 8.0 branch. Reviewed-by: Brian Paul <[email protected]>
* util: fix undefined behaviorDylan Noblesmith2012-04-131-5/+10
| | | | | | | | | container_of() can legally return anything, even invalid addresses that cause segfaults, when 'sample' is an uninitialized pointer. Bug exposed by clang. NOTE: This is a candidate for the 8.0 branch.
* ir_to_mesa: Fix uninitialized member in add_uniform_to_shader.Vinson Lee2012-04-121-1/+1
| | | | | | | | | Fix uninitialized scalar field defect reported by Coverity. NOTE: This is a candidate for the 8.0 branch. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* wayland-drm: Implement wl_buffer.damage in old versions of WaylandNeil Roberts2012-04-121-0/+26
| | | | | | | | | | | | | | | | | | Commit 272bc48976 removed the damage implementation for the wl_buffer_interface because that has been removed from git master of Wayland. However this breaks building with the 0.85 branch of Wayland because it would end up initialising the struct incorrectly. For the time being it's quite convenient for some compositors to track the 0.85 branch of Wayland because the protocol is stable but they will also want to track the master branch of Mesa so that they can use the gbm surface changes. This patch adds a compile-time check for the version of Wayland so that it can work with either Wayland master or the 0.85 branch. krh: Edited to also account for API changes in 6802eaa68, which removes the timestamp argument from wl_resource_destroy().
* Revert "i915g: Implement stipple with draw."Stéphane Marchesin2012-04-122-2/+1
| | | | This reverts commit 3cff45fdb182a1327f6b89fdc4e0ddc5d680372a.
* Revert "i915g: Remove unused poly stipple state."Stéphane Marchesin2012-04-122-0/+54
| | | | This reverts commit be6a02266d1a934c6eff9aaf12fc618588b2d586.
* glx: Hook up the unit tests again using the internal gtest.Eric Anholt2012-04-122-3/+9
| | | | Reviewed-by: Ian Romanick <[email protected]>
* gtest: Fix up import of gtest 1.6.0Ian Romanick2012-04-1225-1/+21231
| | | | | | | | The include files were all missing. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]> Acked-by: Eric Anholt <[email protected]>
* gtest: Build as a convenience library.Eric Anholt2012-04-122-0/+43
| | | | Reviewed-by: Ian Romanick <[email protected]>
* gtest: Import sources from gtest 1.6.0.Eric Anholt2012-04-1210-0/+8959
| | | | | | | | | The upstream of gtest has decided that the intended usage model is for projects to import the source and use it, which is reflected in their recent removal of the gtest-config tool. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* cso: unreference saved vertex buffers when restoringMarek Olšák2012-04-121-0/+8
| | | | Reviewed-by: Brian Paul <[email protected]>
* i965: When the kernel lacks the LLC check, assume it's present on gen >= 6.Eric Anholt2012-04-111-3/+7
| | | | | The param wasn't added until drm-intel-next for 3.4, so we were missing our various LLC fast-paths.
* intel: Drop backwards compat code for not having libdrm with the LLC check.Eric Anholt2012-04-111-4/+0
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* i965/fs: Avoid generating extra AND instructions on bool logic ops.Eric Anholt2012-04-111-22/+14
| | | | | | | | | | | | | | | | | | | | | | | By making a bool fs_reg only have a defined low bit (matching CMP output), instead of being a full 0 or 1 value, we reduce the ANDs generated in logic chains like: if (v_texcoord.x < 0.0 || v_texcoord.x > texwidth || v_texcoord.y < 0.0 || v_texcoord.y > 1.0) discard; My concern originally when writing this code was that we would end up generating unnecessary ANDs on bool uniforms, so I put the ANDs right at the point of doing the CMPs that otherwise set only the low bit. However, in order to use a bool, we're generating some instruction anyway (e.g. moving it so as to produce a condition code update), and those instructions can often be turned into an AND at that point. It turns out in the shaders I have on hand, none of them regress in instruction count: Total instructions: 262649 -> 262545 39/2148 programs affected (1.8%) 14253 -> 14149 instructions in affected programs (0.7% reduction)
* i965/fs: Try to avoid generating extra MOVs to do saturates.Eric Anholt2012-04-113-12/+54
| | | | | | | | | | | | This change (before the previous two) produced a .23% +/- .11% performance improvement in Unigine Tropics at 1024x768 on IVB. Total instructions: 269270 -> 262649 614/2148 programs affected (28.6%) 179386 -> 172765 instructions in affected programs (3.7% reduction) v2: Move some of the logic of finding the instruction that produced the result of an expression tree to a helper.
* glsl: Extend the array splitting optimization pass to matrices.Eric Anholt2012-04-111-11/+18
| | | | | | | | | | | | | | This should fit in well with our lower_mat_op_to_vec code: now, in addition to having expressions on each column of a matrix, we also split the columns to separate variables so they can be tracked individually by the copy propagation, dead code, and other passes. This optimizes out some more code generation in unigine and gstreamer shaders. Total instructions: 269342 -> 269270 14/2148 programs affected (0.7%) 2226 -> 2154 instructions in affected programs (3.2% reduction)
* glsl: Add an array splitting pass.Eric Anholt2012-04-114-0/+380
| | | | | | | | | | | | | | | | | I've had this code laying around almost done for a long time. The idea is like opt_structure_splitting, that we've got a bunch of transforms at the GLSL IR level that only understand scalars and vectors, which just skip complicated dereferences. While driver backends may manage some optimization after they split matrices up themselves, it would be better to bring all of our optimization to bear on the problem. While I wasn't expecting changes quite yet, a few programs end up winning: a gstreamer convolution shader, and the Humus dynamic branching demo: Total instructions: 269430 -> 269342 3/2148 programs affected (0.1%) 1498 -> 1410 instructions in affected programs (5.9% reduction)
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